GB2527572A

GB2527572A - DC Bias unit

Info

Publication number: GB2527572A
Application number: GB1411379.9A
Authority: GB
Inventors: John Stewart Ford; Lionel Ind
Original assignee: Voltech Instruments Ltd
Current assignee: Voltech Instruments Ltd
Priority date: 2014-06-26
Filing date: 2014-06-26
Publication date: 2015-12-30
Also published as: GB201411379D0; WO2015198006A1

Abstract

A DC bias unit 2 is configured to drive a DC current through an inductor on test 6 while an AC voltage is being applied to the test inductor 6 by an inductance meter 4. AC current leakage into the DC bias unit is minimized by a first inductor 26 connected in series between the DC current supply 1 and a terminal 8 of the inductor on test. An AC current reduction circuit 28 is configured to reduce an AC current flowing through the first inductor, caused by said AC voltage, relative to the case where the AC current reduction circuit is not provided. A further inductor may be provided between the DC supply and the second terminal 10 of the inductor on test (figure 12). The AC current reduction circuit may include a capacitive element (30, figure 6) and a voltage follower (32, figure 6).

Description

DC BiAS UNIT The present invention relates to a DC bias unit and parficularly to a DC bias unit that is configured to drive a DC current through a test inductor while an AC voltage is being applied to the test inductor by an inductance meter, with a minimum of AC current leakage into the DC bias unit, it is known to use a DC bias unit in conjunction with an inductance meter to measure the inductance of a test inductor (i.e. an inductor that is being tested by the inductance meter) at different levels of DC bias (i.e. with DC currenis of different magnilude being driven through the Lesi inducLor).

The measurement of inductance may be perfonned by apping an AC voltage across the test inductor and measuring the resulting AC current through the test inductor. When carrying out the inductance measurement at different DC biases it is important that none of the AC current supplied by the inductance meter teaks into the DC bias unit. Any such eakage will cause an error in the measurement of the inductance.

Figure 1 depicts an example prior art arrangement for measuring the inductance of a test inductor 6 at different DC biases. In this arrangement, the DC bias unit 2 comprises a DC current supply unit 1 and first and second terminals 8 and 10, When a test inductor 6 is connected between the first and second terminals 8 and 10, the DC current supply unit 1 can drive a DC current through the test inductor 6. An inductance meter 4 is provided for measuring die inductance of the test inductor 6. The inductance meter 4 in this example is connected to the test inductor 6 by the same first arid second temiinals 8 of the DC bias unit 2.

Figure 2 depicts in further detail how the DC bias unit 2 may be configured. In this particular example. the DC bias unit 2 comprises a DC current supply unit 1 having a power supply unit 12, a controller 14 mid a transistor 16. The transistor 16 may for example comprise one or more p-n-p transistors or p-channd FETS. The controller 14 is configured to adjust the input 15 to the transistor 16 so as to set an output current 17 at the required level, As mentioned above, it is important for DC bias units to avoid leakage of current out of the inductance measurement circuit into the DC bias unit. However, arrangements such as that shown in Figure 2 are vulnerable to significant current leakage. The accuracy of measurements of the inductance of a test inductor 6 at different DC biases is therefore limited when using such arrangements. Sources of error due to AC current leakage into such DC bias units are discussed below.

A first source of error arises due to the finite capacitance of the transistor 16, This is depicted schematically in Figure 3. which depicts the region of the arrangement shown in Figure 2 within the dot chain line box 18. The collector capacitance 20 of the transistor 16 will provide a path for AC current when the collector of the transistor 16 is modulated with an AC voltage applied by an inductance meter for measuring the inductaiice of a test inductor connected across the first and second terminals 8 and 10. The capacitance of the collector capacitance 20 will in general vary as a thnction 1.

ofthe voltage across the transistor 16, This variation makes the effect difficult to model wid therefore difficult to correct using a model, The capacitanco is generally larger with transistors 16 that arc designed for high currents. For example, the 2SA2222 PNP Epitaxial Planar Silicon Transistor by SANYO Semiconductor Co., Ltd. has a collector capacitance of 22OpF when the collector-to-base voltage Vcb equals 2V, This would present an impedance of 723 Ohms at 1MHz. In practice a plurality of such devices are often provided in paraflel to achieve the required output current. For example, 10 of the devices may be provided in a 25A DC bias unit. This would provide an affective inipedmice of 72.3 Ohms. WiLh an applied vollage of lv mis this inipedauice would cause an error current of 13,8 mA. Furthermore the effect tends to become even more severe as the frequency increases.

A second source of error arises due to the inevitaNy non-ideal relationship between the collector current (Ic) and the collector-emitter voftage (Vce) of the transistor 16. This is illustrated schcmatically in Figure 4. which is a graph of Ic against Vce for two diffcrcnt base currents (1 OmA for curve 100 and 5mA for curve 102). In an ideal transistot Ic is independent of Vce over a working range of Vce. However, in practice all transistors show a slope in this characteristic, That is, even with a constant base current, Ic will tend to increase with increasing Vce. In the schematic example of Figure 4. for example, curve 100 can be seen to vary by Ale over a working voltage range of AVce.

As a more specific example, for the 2SA2222 transistor mentioned above, the variation in die collector current Ale is expected to be about 28mA peak-to-peak (9.9mA rms) with lv rms Vee and a load current of 2A, With 10 such devices in paralle' this effect can cause an error of lOx 9.9 mA = 99 mA mis. The slope varies with Vce and Ic and is difficult to model. Correction of errors due to this effect using a model is therefore difficult.

The error currents due to the two above-mentioned sources of error (namely the collector capacitance and the non-idea' relationship between the collector current and the collector-emitter voltagc) will add vectorially to the inductor currcnt, Thc effect will therefore not necessarily be additive, but it is nevertheless expected that the accuracy of the inductance measurements may be significantly rediLced in many situations.

It is an object of the invention to provide an improved DC bias unit which is capable of reducing the amount of AC current leakage into the DC bias unit during measurement of the inductance of a test inductor, According to an aspect of the invention. there is provided a DC bias unit for driving a DC current through a test inductor while an AC voltage is being apphed to the test inductor by an inductance meter. comprising: first and second terminals for connecting the test inductor to the DC bias uniL a DC current supply unit configured to pmvide a DC current; a first inductor connected in series between the first terminal and the DC current supply unit; and an AC current reduction circuit configured to reduce an AC current flowing through the first inductor, caused by said AC voltage, relative to the case where the AC current reduction circuit is not provided.

The provision of an inductor (the "first inductor") in series with an output from the DC current supply unit increases the impedance seen by the AC current source of the inductance meter.

The leakage of AC current into the DC bias unit is therefore reduced and the accuracy of the inductance meter is increased. In addition to this effect the AC current reduction unit acts to reduce the AC voltage across the first inductor independently of the properties of the first inductor itself. The AC current reduction unit thus causes the first inductor to behave like a much larger inductor, particularly at lower frequencies, thereby providing a more effective slLppression of AC current leakage mb the DC bias unib ab lower frequencies. Furthermore, die firsi inducLor has a higher self-resonance frequency than a real larger inductor and therefore remains effective for reducing AC current leakage at higher frequencies.

In an embodiment, the AC current reduction circuit comprises a voltage follower. The voltage follower is connected in a paralle' circuit across the first inductor, The AC current reduction circuit comprises a DC component maintenance unit configured to reduce or substantially eliminate a reduction of a DC current flowing through the first inductor caused by the voltage follower. The DC component maintenance unit may comprise a capacitive unit connected in the parallel circuit between one side of the first inductor and the voltage follower, In a particular embodiment an input to the voltage follower is connected to a point between the first inductor and the first terminal via an electrical path that does not include the first inductor. For example. the input to the voltage follower may be connected directly to the side of the first inductor that is connected to the first tenninal.

The voltage follower acts to equalise the AC voltages on either side of the first inductor and reduce the AC current that flows through the first inductor, The voltage follower has a high input impedance so provides virtually no load to the AC current source of the indlLctance meter. The capacitive unit, which may for example comprise, or consist of, a capacitor, substantially decouples the voltage follower from DC components of voltage across the first inductor, For example, the capacitive unit may decouple the voltage follower output (which will be equal to the DC component of the voltage follower input) from the side of the first indlLctor that is connected to the DC current supply unit. The decoupling ensures that the AC current reduction circuit does not disrupt the DC current supply to the test inductor, The combination of the voltage follower and capacitive unit is particularly effective at suppressing higher frequency AC currents flowing through the first inductor (for example above about kHz in a typical configuration).

In an embodiment, the AC current reduction circuit comprises an AC voltage sensor configured to provide an output proportional to (e,g. substantially equal to) an AC voltage across the first inductor. The AC current reduction circuit is configured to use an output from the AC voltage sensor to reduce the AC voltage across the first inductor, for example using a negative feedback loop.

In an embodiment, the negative feedback loop comprises an amplifier configured to amplift' the output from the AC voltage sensor. The AC current reduction circuit may further comprise a buffer configured to buffer the output from the AC voltage sensor. The output from the amplifier maybe connected to a point between the DC current supply unit and the first inductor via an electrical path that does not include the first inductor.

In embodiments of this type the output voltage from the amplifier effectively adjusts itself via the negative feedback loop to reduce the AC voltage across the first inductor, The approach is particularly effective at suppressing AC current leakage into the DC bias unit at lower frequencies.

In an embodiment, the AC current reduction circuit comprises a first branch and a second branch. The firsi branch comprises a voltage follower. The voltage follower may be configured Lo receive an input voltage from a first side of the inductor, In an embodiment, an input to the voltage follower is connected to a point between the first inductor and the first tenninal via an electrical path that does not include the first inductor. The second branch comprises an AC voltage sensor configured to provide an output proportional to (e.g. substantially equal to) an AC voltage across the first inductor and an amplifier configured to amplif\r the output from the AC voltage sensor, The second branch maybe configured for example to operate as a negative feedback ioop. In an embodiment, a signal combiner (e.g. an adder) is provided that combines an output from the first branch with an output from the second branch and provides an output to a second side of the first inductor opposite to the first side. A DC component maintenance unit may be provided to reduce or substantially eliminate a reduction of a DC current flowing through the first inductor caused by the voltage follower. The DC component maintenance unit may comprise a capacitive unit connected between the second side of the first inductor and the output from the signal combiner or between the first side of the first inductor and an input to the voltage follower. A first buffer may be provided to buffer the output from the AC voltage sensor. The amplifier may be configured to amplify the output from the buffer. In an embodiment, an output from the signal combiner is connected to a point between the DC current supply unit and the first inductor via the capacitive unit and an electrical path that does not include the first inductor.

The first branch is particularly effective at slLppressing higher frequency AC currents. The second branch is particularly effective at suppressing lower frequency AC currents. The provision of both branches provides effective suppression of AC currents over a wide range of frequencies.

In an embodiment, the DC bias unit further comprises a second inductor connected in series with the first inductor between the DC current supply unit and the first inductor, In such an embodiment, the AC current reduction circuit (e.g. an output therefrom) may be connected to a point between the first inductor and the second inductor.

The provision of the second inductor decouples the AC current reduction circuit from electronics in the DC current supply unit that could othenvise reduce perfonuance. For example, the capacitance of transistors in the DC current supply unit could negatively affect the perfonnance of op-amps in the AC current reduction circuit if the second inductor were not provided.

In an embodiment, the first terminal is a high voltage terminal and the second terminal is a low voltage terminal. In such an embodiment, the DC bias unit may further comprise a further inductor. The further inductor is connected in series between the second terminal and the DC current suppv unit. In such an embodiment, the DC bias unit may comprise a thither AC current reduction circuit. The thither AC current reduction circuit may comprise a thither voltage follower. The further AC current reduction unit may comprise a further DC component maintenance unit configured to reduce or substantially eliminate a reduction of a DC current flowing through the further inductor caused by ihe furil er voltage follower. The furil er DC componenL mainienance urul may comprise a further capacitive unit. The thither voltage follower may be connected in parallel in a further parallel circuit across the further inductor. In an embodiment. an input to the further voltage follower is connected to a point between the thither inductor and the second terminal via an &ectrical path that does not indude the thither inductor. In an embodiment, a thither capacitive unit is connected in the further parallel circuit between one side of the further inductor and the further voltage follower. In an embodiment, an outplLt from the further voltage follower is connected to a point between the DC current supply unit and the thither inductor via the further capacitive unit arid an electrical path that does not include the further inductor.

The further inductor, voltage follower and capacitive unit suppress AC currents due to stray capacitance between the second terminal and ground.

In the above embodiments, the term "capacitive unit' is understood to encompass one or more electronic components that together have a significant deetrieal capacitance. The one or more electronic components may also have a significant resistance, inductance or both, The capacitive unit may comprise, or consist of, a capacitor.

Embodiments of die invention will now be described, by way of example only, with reference to the accompanying drawings in which corresponding reference symbols indicate corresponding parts. and in which: Figure 1 depicts a prior art arrangement for measuring die inductance of a test inductor at different DC biases: Figure 2 depicts an example prior art configuration for the DC bias unit of Figure 1; Figure 3 depicts a portion of a DC bias unit of Figure 2 showing a collector capacitance; Figure 4 depicts a schematic graph showing the variation of collector current against collector-emitter voltage in a transistor for different base currents; Figure 5 depicts an embodiment of the invention in which the DC bias unit comprises a first inductor and an AC current reduction circuit; Figure 6 depicts an example of the AC current reduction circuit of Figure 4 comprising a voltage follower; Figure 7 depicts an example implementation of the AC current reduction circuit of Figure 6; Figure 8 depicts an exampk of the AC current reduction circuit of Figure 4 comprising an AC voltage sensor in a negative feedback loop; Figure 9 depicts an example implementation of the AC current reduction circuit of Figure 8; Figure 10 depicts an example of the AC current reduction circuit of Figure 4 comprising first and second branches; Figure 11 depicts an example implementation of the AC current reduction circuit of Figure 10; Figure 12 depicis a DC bias miii having a further inducior and a further AC curreni reduciion unit configured to reduce an AC current flowing through the further inductor, caused by the AC voltage, relative to the ease where the further AC current reduction circuit is not provided; Figure 3 depicts an example arrangement of the configuration of Figure 12 comprising an AC current reduction circuit of the type shown in Figure 10 and a thither AC current reduction circuit of the type shown in Figure 12; Figure 14 depicts an embodiment in which the DC bias unit further comprises a second inductor in series with the first inductor, a capacitive unit of an AC current reduction circuit being connected to a point between the first and second inductors.

As mentioned above, the present invention aims to address the problem of AC current leaking from a circuit measuring the inductance of a test inductor 6 into a DC bias unit 2 that is being used to provide a DC bias current through the test inductor 6 during the inductance measurement.

Figure 5 illustrates schematically an example embodiment of a DC bias unit 2 for driving a DC current through a test inductor 6 with reduced AC current leakage during an inductance measurement. The inductance measurement may be performed by an inductance meter 4 that applies an AC vohage across the test inductor 6. The DC bias unit 2 comprises first and second terminals 8 and 10. The first and second termin&s 8 and 10 are configured to aflow connection of the test inductor 6 to the DC bias unit 2, The DC bias unit 2 further comprises a DC current supply unit 1 configured to provide a DC current. The DC bias unit 2 further comprises a first inductor 26. The first inductor 26 is connected in series between the first terminal 8 and the DC current supply unit 1.

In the embodiment shown, the first inductor 26 is connected between the first terminal 8 of the DC bias unit 2 and a terminal 22 of the DC current supply unit 1. The DC bias unit 2 of this embodiment further comprises an AC current reduction circuit 28, The AC current reduction circuit 28 is configured to reduce an AC current flowing through the first inductor 26. Such an AC current may be caused for exampk by an AC voltage being applied across the test inductor 6 by the inductance meter 4, The AC current reduction unit 28 reduces the AC current in the first inductor 26 relative to the case where the AC current reduction circuit 28 is not provided (mid all other elements of the apparatus are unchanged).

The first inductor 26 reduces the current leakage by presenting an impedance to the AC voltage being applied at the first terminal 8 by the inductance meter 4, If the first inductor 26 were provided on its own (i.e. without the AC current reduction circuit 28) the reduction of the AC current leakage would be limited, particularly at lower frequencies. At lower frequencies, the first inductor 26 would need to be extremely large to provide adequate correction. Such large inductors are difficult or impossible to provide in many practical situations and also tend to have low self-resonance frequencies, which makes the inductors ineffective at higher frequencies.

The present embodiment thus allows use of a relatively small inductor and provides means through external circuitry (i.e. the AC current reduction circuit 28) to ensure that the AC voltage across the firsL inducLor 26 is nevertheless kepi very smalL even al low freqiLencies. The combinaLion of the small inductor mid AC current reduction circuit effectively presents an impedance to the inductance meter 4 that is equivalent to that of a very large indiLetor bitt without any problems of low self-resonance.

Figure 6 depicts an example configuration for the AC current reduction circuit 28. In embodiments of this type, the AC current reduction circuit 28 comprises a voltage follower 32. The voltage follower is connected in a parallel circuit (the circuit between points 29 and 33 via the path which does not include the first inductor 26). A DC component maintenance unit 30 is provided to reduce or substantially eliminate a reduction of a DC current flowing through the first inductor 26 caused by the voltage follower 32. In this embodiment, the DC component maintenance unit 30 comprises a capacitive unit 30 provided in the parallel circuit (e.g. in series with the voltage follower 32). The capacitive unit 30 is connected between one side of the first inductor (the left hand side in the example shown) and the voltage follower 32.

Figure 7 depicts an example implementation of an arrangement of the type shown in Figure 6 in which the voltage follower 32 is implemented using an operational amplifier. In this example, an input 27 to the voltage follower 32 is connected to a point 29 between the first inductor 26 and the first terminal 8, The connection to the point 29 is made via an electrical path that does not include the first inductor 26. In an embodiment, the input 27 is connected directly (i.e. without any intervening electronic components) to a side of the first inductor 26 that is connected to the first teiminal 8. In this example the input 27 is connected to the non-inverting input of the operational amplifier. The inverting input may be connected directly to the output of the operational amplifier in such a configuration (as shown in Figure 7). The high impedance of the input 27 to the voltage follower 32 ensures that the voltage follower 32 applies a negligible load to the inductance meter 4. An output 31 from the voltage follower 32 is connected to a point 33 between the DC current supply umt 1 and the first inductor 26 via the capacitive unit 30 and an electrical path that does not include the first inductor 26.

The voltage at the output 31 will closely follow the voltage at the input 27. The capacitive unit 30 serves to decouple the DC component of the output from the voltage follower 32 from the point 33 at which the AC current correction circuit 28 is connected between the first conductor 26 and the DC current supply unit 1. The capacitive unit 30 may for example comprise a capacitor having a large capacitance. The capacitive unit 30 prevents the AC current reduction circuit 28 disrupting the DC current being supplied by the DC current supply unit to tile test inductor 6, If the capacitance of the capacitive ILnit 30 is chosen to be sufficiently large, and has a low equivalent series resistance, the AC voltage at point 33 can be made to be ver close to the AC voltage at point 31 and hence to the AC voltage at point 29, The circuit is therefore effective for reducing flow of AC current through the first inductor 36 relative to the case where the first inductor 26 is provided without the AC current reduction circuit 28. In essence, the voltage follower 32 may be seen as slLpplying an "error curreni" which wolLid otherwise have Lo be supplied by the inductance meter 4 (and which would therefore cause an error in the inductance measurement). In an example embodiment, the capacitive unit 30 has a capacitance of 100 tF and an equivalent series resistance (FSR) of 50 mOhms. In such a configuration, the voltage drop across the capacitive unit 30 becomes ver small at frequencies above about 50kHz, Furthermore at such higher frequencies the impedance of the first inductor 26 becomes relatively large. Thus, with a small voltage difference between the points 29 and 33 on either side of the first inductor 26, and a large impedance in the first inductor 26, the current flowing through the first inductor 26 will be negligibly small, It follows that the approach depicted in Figure 5 is particularly effective for higher frequencies (e.g. above 50kHz). Conversely, at lower frequencies the impedance of the capacitive unit 30 increases and the impedance of the first inductor 26 decreases, which tends to reduce the effectiveness of this arrangement at lower frequencies (e.g. below 50kHz).

Other implementations of the DC component maintenance unit are possible. For example.

electronics may be provided, in addition or instead of a capacitive unit, to actively adjust the DC level of the output from the voltage follower so that it is equal to the DC level at the appropriate side of the first inductor 26 (such that the DC current through the first inductor is less affected, or substantially unaffected, by the presence of the voltage follower 32).

Figurc 8 depicts an example of an embodiment of the AC currcnt reduction circuit 28 which is more effective at lower frequencies. In embodiments of this type, the AC current reduction circuit 28 comprises an AC voltage sensor 38. The AC voltage sensor 38 is configured to provide an output that is proportional to the AC voltage across the first inductor 26. In an embodiment the output from the AC voltage sensor 38 is substantially equal to the AC voltage across the first inductor, The AC voltage sensor may, for example, comprise a sense winding (e.g. a coil) closely coupled to a main winding of the first inductor 26. The AC voltage sensor 38 is configured to sense the AC voltage across the first inductor 26 and ignore the DC voltage. The AC current reduction circuit 28 is then configured to use an output from the AC voltage sensor 38, for example in a negative feedback loop, to reduce the AC voltage across the first inductor 26. The negative feedback loop may comprise an amplifier 39 configured to arnpliv the output from the AC voltage sensor 38. Further components may be provided in the negative feedback loop to ensure that the feedback is negative.

Figure 9 depicts an example implementation ofan arrangement of the type shown in Figure 8, In this embodiment, a buffer 34 is provided to buffer the output from the AC voltage sensor 38, The buffer 34 ensures that no load is presented to the AC voltage sensor 38. The voltage output from the buffer 34 is then amplified by an amplifier 36, Tn tile embodiment shown iii Figure 9, the buffer 34 and the amplifier 36 are implemented using suitable operational amplifiers. The amplification factor of the amplifier 36 is determined by resistors 40 and 42. By providing a large amplification factor (e.g. 10000) the voltage at the output 37 of the amplifier 36 will adjust itself so as to reduce the voltage across the firsL inducLor 26 (and Lherefore ihe ouLput from Lhe AC voltage sensor 38) Lo a negligible amount, The AC voltage drop in the capacitive unit 30 will be compensated for by the large amplification factor in the negative feedback loop constituted by the combination of the buffer 34 and the amplifier 36. Tn the embodiment shown the output 37 from the amplifier 36 is connected to a point 33 between the DC current supply unit I and the first inductor 36 via an electrical path that does not include the first inductor 26.

In the configuration shown in Figure 9. a capacitor 44 is provided in the amplifier 36 to stabilise the negative feedback loop by rolling off the frequency response at high frequencies.

Arrangements of the type shown in Figures 8 and 9 are particularly effective at suppressing AC currents leaking through the first inductor 26 at lower frequencies. The performance at higher frequencies is less optimal, for example because of the need to roll off the frequency response of the negative feedback loop at high frequencies, which reduces the gain of the amplifier 36 and therefore reduces the effectiveness of the negative feedback, In an embodiment, a combination of the configurations shown in Figures 6 and 7 on the one hand and Figures 8 and 9 on the other hand is used to achieve effective suppression of AC currents in the first inductor 26 at both lower and higher frequencies (i.e. over a wide frequency range). An example of such an embodiment is depicted in Figure 10, In embodiments of this type the AC current reduction circuit 28 comprises a first branch 45 and a second branch 47. The first branch 45 comprises a voltage follower 32 configured to operate as described above, for example, with reference to Figures 6 and 7. The voltage follower 32 is configured to receive an input voltage from one side of the first inductor (the right hand side in the particular example shown). The second branch 47 comprises an AC voltage sensor 38 configured to operate in a negative feedback loop as described above, for example. with reference to Figures 8 and 9. The negative feedback loop comprises an amplifier 39 configured to amplify an output from the AC voltage sensor 38. A signal combiner 41 is provided. The signal combiner 41 is configured to combine an output from the first branch 45 with an output from the second branch 47. The signal combiner 41 may be an adder for example.

Figure 11 depicts an example implementation of an arrangement of the type shown in Figure 10. Tn the example, wi input 27 to the voltage follower 32 is connected to a point 29 between the first inductor 26 and the first tcrminal 8 via an electrical path that does not include the first inductor 26.

The second branch 47 comprises an AC voltage sensor 38 configured to provide an output that is proportional to (e.g. substantially equal to) an AC voltage across the first inductor 26, Thc second branch further comprises a first buffer 34 configured to buffer the output from the AC voltage sensor 38. An amplifier 36 is provided to amplify the output from the first buffer 34. The output from the first and second branches 45 and 47 are provided as input to a signal combiner 41, The signal combiner may be an adder for example, An output 53 from the signal combiner 41 is connected to a point 33 between the DC current supply unit 1 and the first inductor 26 via a capacitive unit 30 and an elecirical paLh Ihal does noL include Ihe firsi inducLor 26. In an embodimenL Lhe amplifier 36 in die second branch 47 is provided with a capacitor 44 to stabihse the feedback loop comprising the first buffer 34 and the amplifier 36 by rolling off the frequency response at higher frequencies. hi an embodiment, the first branch 45 further comprises a unity gain inverter 46 to obtain the correct phase in the first branch 45, In the example shown, the unity gain inverter is imp'emented using an operational anplificr and resistors 48 and 50 of equal resistance, hi an embodiment, the signal combiner 41 is implemented using an operational amplifier and resistors 54, 56 and 58 (all having the same resistance), In an embodiment, the first terminal 8 is a high voltage terminal and the second terminal 10 is a low voltage terminal. The low voltage terminal may, for example. be at or close to ground.

The above embodiments have sought to reduce AC current leakage through the high voltage side of the circuitry between the DC current supply unit 1 (e.g. via the first terminal 8) and the inductance meter 4, However, it is also possible that AC current may leak into the ow voltage side (e.g, via the second terminal 10), For example, even if the second terminal lOis isolated from ground, stray capacitance niay exist between the second terminal 10 and ground. Current may leak through this stray capacitance when an AC voltage is present at the second teu'minal 10. In an embodiment, this source of leakage is reduced by providing the following elements. A further inductor 60 is connected in series between the second terminal 10 and the DC current supply unit 1, A further AC current reduction circuit 62 is provided that is configured to reduce an AC current flowing through the further inductor 60, caused by an AC voltage applied to the test inductor 6, relative to the case where the fturther AC current reduction circuit 62 is not provided, An example of such a configuration is shown in Figure 12.

In an embodiment, as depicted in Figure 13 for example. the further AC current reduction circuit 62 comprises a further voltage follower 63 and a further capacitive unit 61. The further capacitive unit 61 is an example of a further DC component maintenance unit that is configured to reduce or substantially eliminate a reduction of a DC current flowing through the thither inductor caused by the further voltage follower. The further voltage follower 63 is connected in parallel in a further parallel circuit across the further inductor 60 (e.g. miming between opposite sides 65 and 67 of the further inductor 60 but not through the further inductor 60), Tn an embodiment, an input 64 to the further voltage follower 63 is connected to a point 65 between the further inductor 60 and the second termin& 10 via an electrical path that does not include the thither inductor 60, An output 66 from the further voltage follower 63 is connected to a point 67 between the DC current supply unit 1 and the further inductor 60 via a further capacitive unit 61 and an electrical path that does not include the further inductor 60, The further AC current reduction circuit 62 may therefore be configured in a similar manner to the AC current reduction circuit 28 depicted in Figures 6 and 7. In contrast to the anangement of FigureS, however, there is no load line current through the further inductor 60. but only the capacitive current through the stray capacitance. The capacitive current will fall with freqiLeney so Ihe reduced performance of Lhe arrangement of Figures 6 and 7 noLed above al lower frequencies will not be a problem for the further AC current reduction circuit 62, It is therefore not necessary to provide additional circuitry (such as the circuitry associated with the second branch 47 shown in Figures 10 and II) in order to achieve the desired performance over a wide frequency range.

In the embodiments discussed above, the first inductor 26 is connected directly to the DC current supply unit 1 via terminal 22, However, this is not essential. In an embodiment, a second inductor 70 is provided to decolLple the output of the DC current slLpply unit 1 from the AC current reduction circuit 28, An example of such an arrangement is disclosed schematically in Figure 14.

Decoupling the DC current source unit 1 from the AC current reduction circuit 28 can improve performance of the AC current reduction circuit 28 by reducing capacitive loading of components, such as op-amps, within the AC current reduction circuit 28 (due for example to capacitance of transistors in the DC current supply unit 1).

Claims

CLAIMS1. A DC bias unit for driving a DC ciLITent through a test inductor while an AC voltage is being applied to the test inductor by an inductance meter, comprising: first and second terminals for connecting the test inductor to the DC bias unit; a DC current supply unit configured to provide a DC current; a first inductor connected in series between the first tenninal and the DC current suppiy unit; and an AC current reduction circuit configured to reduce an AC current flowing through the first inductor, caused by said AC voltage, relative to the case where the AC current reduction circuit is not provided.
2, The DC bias unit of claim 1. wherein: the AC current reduction circuit comprises a voltage follower connected in a parallel circuit across the first inductor,
3. The DC bias unit according to claim 2, wherein the AC current reduction circuit comprises a DC component maintenance unit configured to reduce or substantially eliminate a reduction of a DC current flowing through the first inductor caused by the voltage follower.
4, The DC bias unit according to claim 3. wherein the DC component maintenance unit comprises a capacitive unit connected in the parallel circuit between one side of the first inductor and the vohage follower.
5, Thc DC bias unit according to any of thc preccding claims, wherein: the AC current reduction circuit comprises an AC voltage sensor configured to provide an output proportional to an AC voltage across the first inductor; and the AC current reduction circuit is configured to use the output from the AC voltage sensor to reduce the AC voltage across the first inductor using a negative feedback loop,
6. The DC bias unit according to claim 5. wherein the negative feedback loop comprises an amplifier configured to amplify the output from the AC voltage sensor,
7. The DC bias unit according to claim 1, wherein: the AC current reduction circuit comprises a first branch and a second branch; the first branch comprises a voltage follower configured to receive an input voltage from a first side of the first inductor; the second branch comprises an AC voltage sensor configured to provide on output proportional to an AC voltage across the first inductor and an amplifier configured to amplilV the output from the AC voltage sensor, the second branch being configured to operate as a negative feedback loop; and a signal combiner configured to combine an output from the first branch with an output from the second branch and provide an output to a second side of the first inductor opposite to the first side.
8. The DC bias unil according Lo claim 7, wherein Ihe AC currenL reduclion circuil comprises a DC component maintenance unit configured to reduce or substantialh' eliminate a reduction of a DC current flowing through the first inductor caused by the voltage follower.
9, The DC bias unit according to claim 8, wherein the DC component maintenance unit comprises a capacitive unit connected between the second side of the first inductor and the output from the signal combiner or between the first side of the first inductor and an input to the voltage follower.
10. The DC bias unit according to any of the preceding claims, wherein: the DC bias unit further comprises a second inductor connected in series with the first inductor between the DC current supply unit and the first inductor; and the AC current reduction circuit is connected to a point between the first inductor and the second inductor.
11. The DC bias unit according to any of the preceding claims, wherein: the first termina' is a high voltage termina' and the second terminal is a low voltage terminal.
12. The DC bias unit according to claim 11. further comprising: a further inductor connected in series between the second terminal and the DC current supply unit; and a further AC current reduction circuit configured to reduce an AC current flowing through the second inductor, caused by said AC voltage, relative to the case where the further AC current reduction circuit is not provided.
13. The DC bias unit according to claim 12, wherein: the further AC current reduction circuit comprises a further voltage follower; and the further voltage follower is connected in parallel in a further parallel circuit across the further inductor.
14. The DC bias unit according to claim 13, wherein the ftirther AC current reduction circuit comprises a further DC component maintenance unit configured to reduce or substantially eliminate a reduction of a DC current flowing through the further inductor caused by the further voltage follower.
15. The DC bias unit according to claim 14, wherein the further DC component maintenance unit comprises a further capacitive unit connected in the further parallel circuit between one side of the further inductor and the further voltage follower.
16. A DC bias unit arranged and configured to operate substantially as hereinbefore described with reference to and/or as illustrated in the accompanying drawings.