GB2517272A

GB2517272A - Method of conduction check and conduction checker apparatus

Info

Publication number: GB2517272A
Application number: GB1410673.6A
Authority: GB
Inventors: Shinichi Kawabe; Kentaroh Taniguchi; Tsuneyoshi Santoki; Tatsuya Kamimura
Original assignee: Hitachi Ltd
Current assignee: Hitachi Ltd
Priority date: 2013-06-18
Filing date: 2014-06-16
Publication date: 2015-02-18
Also published as: DE102014008750A1; GB201410673D0; JP2015001488A; GB2517272A8

Abstract

A device under test 2, e.g. a wiring harness 20 in a railway vehicle, comprises input 21 and output 22 connectors with wiring between them. A conduction test device comprises an input connector 11 and an output connector 22 to switch signals between the input and output terminals of the device. The tester is provided with an inter-device wiring list d1 mapping the wiring of the device and a correct map d11 of the expected outputs for the test. The actual test result map d12 is compared with the correct map d11 to give results indicating the conductivity and correct connection of the wires between the terminals of the device. The number of terminals on the tester does not need to be the same as the number of terminals of the device under test if conversion connectors (61, 62, figure 14) may be used between the tester and the device.

Description

METHOD OF CONDUCTION CHECK

AND

C0NDUcT0N LHDKER APPARATUS The present invention relates to technique of checking and inspecting states of conduction and connection regard.ing wirings such as wires, cables, etc. With regard to wirings such as wires, cables, and wire harnesses for connecting various instruments, to ensure reliability, checking and inspection of states of electrical conduction and mechanical connection are needed. General methods of an existing conduction check include a method using a tester or a conduction checker. In the method using a tester, a resistance value of wiring is measured by the tester and the conduction state of the wiring is checked by observing whether the resistance value is smaller than or equal to a threshold value and close to zero. In the method using a conduction checker, the conduction state is checked by buzzer sound rang in accordance with a resistance value of wiring connected to a measurement terminal of the conduction checker.

There are examples of prior art relating to the

above-mentioned wiring conduction check in Japanese Patent Application Laid-Open Publication No. 2009-118638 (Patent Document 1) and Japanese Patent Applicatiun Laid-Open PLAblicatlon No 2003-163065 (Patent Document 2) Patent Document 1 describes determining whether the. wire connection is correct or not by putting code information like number etc. on an end portion of a cable and a device and comparing read data of the code information with design data by a computer.

Patent Document 2 describes a test device of wire harness for determining good/bad of the mutual conduction status of terminals by sequentially applying signals to a plurality of terminals of the harness, Also, Patent Document 2 describes memorizing the conduction state between terminals using a two-dimer.s ion.al conduction map.

According to the method using a tester or a conduction checker explained above and the prior art examples including those in Patent Documents I and 2, a worker who carries out the conduction check and test needs to carry out operations including connection of wirings between devices and check of the connection. That is, the worker needs to connect two ends of each of a plurality of wires composing subject wiring one by one and check the conduction state per wire.

The above-mentioned operation is easy when the number of subject wires and terminals is-small. However, the more the number is; the more cumbersome the operation i, taking an extraordinary long time. Besides that, the operation has a high possibility of human errors happening including mistakenly choosing wires and their terminals to connect.As a result, three is a high possibility that the result of the check and test of the conduction test itself is erroneous.

For example, to ensurerliability, wirings of devices used in rail vehicles require check and inspection of the conduction state of the wirings. However, as the operations of check and test need operations of a large nutther of wires and terminals, there is a high possibility of mistakes and errors as mentioned above to happen.

To eliminate or reduce mistakes in operations and errors in the result, prolonged operations are needed, resulting in. an increase of burden on the worker.

When any non--conducting or abnormal connection is found as a result of the above-described check and inspection, the worker needs to identify and specify the subject portion, correct wirings of the subject portion, and recheck the conduction state. However, 3.

the existing methods are difficult to identify and specify the subject portion especially when the numbers of wires and terminals are increased and thus tile operations of correction of wirings and recheck are inefficient.

Patent Document 1 does not describe any practical and specific cor3uc ta.on state Patent Document 2 aoe not describe means for reducing time and burden required to check and inspection of conduction state.

A preferred aim of the present invention is to provide technique capable of making operations of specifying and correcting non-conducting portion on wirings upon identifying and testing states of conduction and connection of the wirings by achieving time reduction and burden related to operations to connect and check by a worker, and achieving sure inspection and test by reducing ei.rors in the operations.

Typical embodiments of the present invention are a method of conduction check and a conduction check apparatus. The embodiments have the configurations as follows.

(1) A method of conduction check of an embodiment of the present invention is a method of conduction check of wirings including a plurality of wires using a conduction checker apparatus including first connectors that include a plurality of first terminals for connecting a plurality of terminals or connectors on one side; and second connectors that include a plurality of second terminals for connecting a plurality of terminals or connectors on the other side. The method includes the steps of.: r4putting design data information including information about connection of the wirings to the conductions checker apparatus by operations of a worker; a first process of crLating a first map two-dimensionally expressing a relationship of the connection of the wirings based on the design data information; a signal transmission/reception for, as a test for checking states of conduction and connection of the w±nngs connected between the first connectors and the second connectors. inputting a t;est signal to optionally selected one(s)of the first terminals of the plurality of first terminals of the first connectors and detecting th.e test signal outputted from the plurality of second terminals of the second connectors via the wirings; a second process of creating a second map two-dimensionally expressing states of input/output of the test signal between the plurality of first terminals of the first connectors and the plurality oil second terminals of the second connectors based on a result of detection of the test signal; comparing the first map and the second map and determining good or had of states of conduction and connection of the wiring based on a result of the comparison; and outputting information including the result of the comparison or the determination, (2) According to the method of conduction check described in item (1) the conduction checker apparatus includes: first conversion connectors for connecting the first connectors and the wirings on the one side; and second conversion connectors for connecting the second connectors and the connectors on the other end of the wirings. According to the conduct ion check apparatus, the first conversion connectors include a plurality of kinds of the first conversion connectors for connecting the first connectors arid the connectors of the one end of the wirings corresponding to a situation in which a type including the number of terminals of the first connectors and a type including the number of terminals of the connectors on the one side of th.e wirings are different. The second conversion connectors include a plurality of kinds of second conversion connectors for connecting the second connectors and the connectors of the other end of the wirings corresponding to a situation in which a type including the number of terminals of the second connectors and a type including the nunther of connectors of the otLer end of the winngs are w fteenL The trethom of conduction theek ifl1Ude8 a step ott connecflng the dflngs between the first cozed:ors, and the second Ro! trs by: tile tiret :0flYfl$i0fl ç nnectors and the sedond eonverSicn do td üSth the fiflt? OOfrtUjoh a:je tt and the second cbttetsiOfl co1rnetOt 5:: t IcirtUs seLected trotu the pluraii;y ot kinds.

cççr1g k e twice at the present invention, tzpcn checkirg and iüSpSdtirig Atäté at o±idtitibitd &thtötib±t ot the: wi±:(s tithe tdtsctbri and J:td.: ralated to; work including connection and chtk by a ttsr are avhieyed and sure 10:1r!pefl?.qp!P teat dyed: bY reducing errors in the work;: utsJ a. : jj pfi& 6! the wirings arid ctttiri work cast be efficient.

draw ngs 16 flG. I is a:di*nm illuattat±: :: ostfigiir*tit of a cc kitiarf chek apparatus acccrdttg to a first enthodituent o:t the present inventIon; fl. 2 ia schematic diagram iilustràtih4: dOhfi4thatiOri enmpit o:e inter:devtee:, Wir:iflq of a test sufl:e:ct;, YXQ. 3A is: a schematic diagram:i.iustratng a ccnfigwaflpn acttaL jnter-4ev±ce wtmga in whih n example? of a connectiOn state tWeeti at i t device arid an Gutpt device:; FIG. 3B i:s a sobernatto diagram iflnstratUxg the tout £grnation example adl:ual interdevie:vdngs, iflustxatirzg a 2$ :ex1pie of op,, wire:;: FIG. IC is a aeb tic diasr;&iltxstting a.: acfLgration :eXsflp1e: of atu3 intetdetice wings iflustrating a cnf jgixrat j0 example in!h,:*a pj:aijty of wires are accommoated: in. one connector; q* :j a asagnrn illustrating a f:lw ot: an operation a:prqSze: test prqçess Qr: dheci and inspection P; cr:L. on and work by a: W9*fl C!:49 to the conductiti dheck apparatus and a method of conduction check of the first embodiment; FIG. S is a diagram illustrating a configuration of a circuit portion for testing between terminals of one wire as a configuration examp].e of. a signal transceiving circuit of the conduction check apparatus; FIG, B is a diagram illustrating a confiquration of a circuit port ion for testing between terminals of a plurality of wires as a configuration example of a signal transceivinq circuit of the conaucnon check apparatus; FIG. 7 is a diagram illustrating an example of signal input and output by the signal transceiving circuit to a connection state example of inter-device wirings; FiG. 8 is a diagram illustrating a configuration exampie of an interdevice wiring list; FIG, 9A is a diagram illustrating a configuration example of a correct map; FIG. 9.5 is a diagram illustrating a configuration example of a correct map; FIG, IDA is a diagram illustrating a configuration example of a test result map; FIG. 1DB is a diagram illustrating a configuration example of a test result map; FIG. 11 is a diagram illustrating examples of comparison results between a correct man and a test result map; FIG. l2A is a diagram illustrating an example of a display screen of a test result when the result is matched (OK) FIG. 12B is a diagram illustratin.g an example of a display screei of a test result re the resuit is nasnatchod (NC) FIG. 13 is a diagram illustrating a display example of inter--device wirings as a display screen example of a test result; FIG. 14 is a diagram illustrating a configuration of a conduction check apparatus according to a second embodiment of the ett inventjot ?±. 1$ 1s d14gu!l illustrating examp2 s converion connectors according to the second embdiüSht FIG. 16 iE a 4tflE fliAttittthg 4 fi9Uflt&ox eta*ple of 5" a connection of inter-4eflce wir1zgs using he conversion connectors pf, 44:i!k; FtC. ifl is a dià±A illttht±At1ñ4 A ãèf±uitioñ tt1é &f a test tesit tfl:; ::f, th second etodiuetat FIG. in is a tagram iflustràitng a coguration example f a teat SPZ of second P 4e;' FId. 18 jg diag&ani nmatiiauj a ttei4j.auauoi a:imp]e.

ittaittdixtg thter-devSce Wiritigs when. * izt a tettr as at. example of an exist tug methS of condttction theck o wirings PXt 19 is a diagram illustrating a configuration example ai 15;jj4 of::a: jx. the ase 0± usiny checker as an example of at existing method of aiorxduction SheSk at wirings Hereinaft:e4 embodimentt of the present invention wi 3. be : deenibed in detail with re±erence to the a mpanying drawings 4àte that caBpozen1s having the same ttn are don ted by thef same reference sy:yis thtaaitt thdtaWina ftt describtn the embodintezzt, and the eret&ti&e description thereof will, be omitted.

<FIrst ETabOdilenLt.P WSbt: eexe,e to fl45, I p fl, a naa4 at conduction check aa a tondtttiat1 hek appantua according t a first enthodimeat win bdesribeth me method of cn4uctLon chec)c an4the conduction chedtapparaui c,t e*ibddiment illuStrated it: tS. 3. to :* neon an4 a process pr&edürè dö±étthdiii to the 30v fatiat tar at aatti teat fast chstJutg the conducUon state of inter-4eTive wLrjngs 20 iSludlng a pluraifty >f wires. au: [Conduction Check Apparatus] FIG. 1 illustrates a confiiration of the conduction check apparatus and a system including the conduction check apparatus of the first embodiment, The conduction check apparatus of the first embodiment includes, as its main components, a computer 1, input connectors 11 and output connectors 12. The computer includes that includes a control unit 10. The input connectors 11 and the output connectors ±2 are connectea to the computer I. The input connectors 11 and the output connector 12 are mechanisms for connecting inter-device wirIngs 20 of a test target 2, The input connectors 11 and the output connectors 12 have a plurality of terminals, respectively. The number of the terminals and identification number of the same are denoted by "m" . The input connectors 11 can he connected with a plurality of terminals of input connectors 21 of one end of the inter-device wirings. The output connectors 12 can he connected with a plurality of terminals of output connectors 22 of the other end of the inter-device wirings 20.

The inter-device wirings 20 of the test target 2 rdepicted by the part illustrated with a dotted line in FIG. 1 includes the input connectors 21 and the output connectors 22 which are a.t two ends of the inter--device wirings 20. FIG, 2 described later illustrates an example of the inter-device wirings 20 of the test target 2, A worker connects the inter-device wirings 20 of the test target 2 between the input connectors 11 and the output connectors 12 of the conduction check apparatus to perform conduction check and inspections of the inter-device wirings 20.

The input connectors 11 are connected to a signal transceiving circuit 111 of an input/output board:L0i of a control unit 10 of $0 the computer I via an input connector cable 131. In the same manner, the output connectors 22 are connected to the signal transceiving circuit 111 of the inp ut/output board 101 via an output connector -9.

cable 132. The worker can freely operate the input connector cable 131 and the output connector cable 132.

The computer 1 includes the control unit 10. A display 103, an input device 104, and a reader 105 are connected to or embedded in the computer 1, The computer 1 is composed of a generic PC or a dedicatec dei,ice Not2 that the ieader 1u5 is used in a second embodiment described later. The computer 1 further includes general components such as a storage device, a communication device, a power-supply device, a bus, etc. not illustrated, The control unit 10 includes the input/output board 101, a CPU 102, a test 02 51, and a design DR 52. A test function by the control unit 10 is for performing an automatic test for check and inspection of the state of conduction and connection of the inter-device wirings 20 of the test target 2 connected. between the input connectors 11 and the output connectors 12, The test function by the control unit 10 includes a function of transmitting/receiving signals for test of the inter-device wirings 20 via the input connectors 11 and the output connectors 12 by the signal transceiving circuit 111 and a test control unit 121. The test function includes a function of determining and outputting a test result obtained.by an analysis of result data of the signal transmission/reception by a test process unit 122, The control unit 10 includes a function of storing each design data information in the design 1DB 52 of the storage device of the computer 1 and a function of storing each data information in the test DE 51. Moreover, the test function includes a function of inputting each data information related to tests by a test input/output unit 123 and a function of outputting each data information such as test result information etc. The input/output board 101 mounts the signal transceiving circuit Ill. The signal transceiving circuit 111 is connected with the input connectors 1:L via the input connector cable 131 and also connected with the output connectors 22 via the output connector ceThle 132. The signal transceiving circuIt 111 has a function of transmitting/receiving signals for test for conduction check and inspections on the inter-device wirings 20 connected between the input connectors 11 and the output connectors 12. The signal transceiving circuit 111 transmits the signals for test to the plurality of terminals of the output connectors 22 to input the signals and receives signals outputted from the plurality of terminals of the input connectors 11 via the interdevice wirings 20. Details o-the signal transceiving circuit 111 will be described with reference to FIG. S later.

The CPU 102 is a central process unit device. According to a software program process loading a program from a storage device noL-.llust--ated and executing the program, a process unit incLding the test control unit 121, the test process unit 122 and the test input/output unit 123 is achieved.

The test control un-it 121 controls signal input/output to the signal transceiving circuit 111. The test process unit 122 performs an automatic test process, which will he described with reference to FIG. 4 later, using an inter-device wiring list dl and data of results of signal input/output obtained from the signal transceiving circuit 111 etc. I'h.e test input/output unit 123 controls process for inputting each data information for test, a process for outputting a screen including test result information, and so forth.

The d.i splay device 103 is a device for--displaying information on a screen which the worker sees and is mounted as a generic display or a dedicated device having a dedicated information display area -The input device 104 is a device for inputting information by the worker and is mounted as a generic keyboard or a mouse, or a dedicated device having a dedicated information inputting button etc -The display device 103 and the input device 104 may be composed of an integral device, for example, a touch-sensitive, panel or the like.

The control unit 10 generates screens to he a graphical user interface (GUI) for supporting work by the worker in accordance with input operations by the worker using the test input/output unit 123 and displays the screens on the display device 103. The screens include a screen for inputting setting information such as conditions of conduction check and inspections, a screen f or inputting design data information such as the inter-device wiring list dl and commands etc. for function utilization, a screen for test result information, etc. The test input/output unit 123 controls the generation and display of the various types of screens using a screen data dls. The worker can input the various types of information on the screens, check the contents of the information, and check the test result information.

The test 1DB and the design 1DB 42 are configured and managed as an area for data base EB) inside the storage device of the computer 1. Note that the DBs may be provided externally to the computer 1. In that case, the computer 1 accesses the external DEs as needed to read and write data.

The test 1DB 51 stores each data information of a correct map dli, a test result map dl2, a first result data dl3, a second result data d14, and screen data dl5, etc. which are created and managed by the control unit 10.

The correct map dll and the test result map d12 are created by the test process unit 122, The first result data dl3 is result data according to detected signals of the test by the signal transceiving circuit Ill. The second result data dl4 is create.d by the test process unit 122. The screen data d15 is data for composing screens of th.e GUI, including definition data of input/output styles of information on the screens and data of GUI parts etc. The design 1DB 52 stores inter-device wiring list dl, a harness i2 diagram d2, an actual wiring diagram d3, work procedure information d4, etc., which are design data information. The design DR 52 stores at least the inter-device wiring list dl. These design information pieces may be previously input or input at a timing required in the process. Also, these data pieces may be directly input to the computer by the worker or forwarded or copied aireadyexisting data may be input.

The inter-device wiring list dl is one of the design data information pieces. The inter-device wiring list dl gets together information defining relationships of the plurality of wires 25 and terminal of the inter-device wirings 20 including the terminals of the input, connectors 21 and the output connectors 22 of the inter-device wirings 20 and the wires 25 for connecting the terminal with each other. The inter-device wiring list di i_s information needed ±or work of connection of tb.e inter-device wirings 20 of the test target 2 to be connected between the terminals of the input connectors 11 and the output connectors 12 of the conduction check apparatus. The inter-device wiring list dl is denoted in FIG. S described later.

The design data information such as the harness diagram dl, the actual wiring diagram d3, and the work procedure information d4, etc. are information related to the inter-device wining list dl and they can be omitted. Note that as these design data information pieces are publically known, detailed descriptions thereof are omitted. When the design data information pieces are stored in the design DR 52, by displaying the design data information on the screen that will be described later together, work by the worker such as connection of the inter-device wirings 20 is easier! [Inter-Device Wiringsl FIG. 2 illustrates a configuration example of the inter-device wirings 20, vhich is the test target 2 for conduction check and inspections, connected between the input connectors 11 and the -i3 output connectors 12 of the conduction check apparatus in FIG. I, The inter-device wirings 20 include a plurality of the wires 25.

Two ends of on' wire 25 are a terwna1 Cl the input connectors 21 and a terminal of the output connectors 22. One end of the wire 25 is connected as one terminal of the input connectors 21 and the other end is connected as one terminal of the output connectors 22.

The plurality of terminals of the input connectors 21 and the output connectors 22 are identified by positions or terminal numbers thereof. The number and identification number of the plurality of terminals of the input connectors 21 and the output connectors 22 are set as "m" in the same manner as the input connectors 11 and the output connectors 12 of the conduction check apparatus side.

For example, for the input connectors 11 and the input connectors 21 correspondingly connected, the terminal, numbers "1" to "m" are indicated from the upper position to the lower position in sequence in FIG. 2. In addition, the terminal with the terminal number "1" of the output connectors 22 of the interdevice wirings and the terminal with the terminal number "2" of the input connectors 21 are connected by the wire 25.

In the inter--device wirings 20, terminals of the wires 25 corresponding to the wirings are connected at respective positions indicated by the terminal numbers of a frame portion of the input connectors 21. In the same manner, terminals of the wires 25 corresponding to the wirings are connected at respective positions of a frame portion of the output connectors 22-In this manner, the inter-device wirings 20 of the test target 2 are con-figured.

Upon correcting the inter-device wirings 20, connections between the terminals of respective positions of the respective connectors and both ends of the respective wires 25 are corrected.

FIGS. 3A to 3C illustrate connection state examples of an actual. case of the inter-device wirings 20. FIG. 3A schematically illustrates a state in which an input device 32\ and an output device 3B are connected by the inter-device wirings 20. The input device 3k i.s a device having input connectors 31 for connecting the input connectors 71 or "the inter device wizings 20 The output device 3B is a device having output connectors for connecting the output connectors 2$ of the inter--device wirings 20. FIG. BA illustrates

an example of m = 6.

The input device 3k and the output device 3B are electronic devices or electric devices used in rail vehicles, for example. For example, the input device 3k is provided to one end of a veidcle and the output device 3E is provided to the other end of the vehicle, and the devices are connected by the inter-device wirings 20.

In the actual inter-device wirings 20, to the. iput connectors 21 and the output connectors 22, signals of predetermined function are.i.r.putted from tine terminals of the input connectors 21, then transmitted in the wires 25, and outputted from the terminals of the output conrie ctors 22, Note that the naming and classification oi "input" and "output" are expedient in the description.

One of the tern.inals of the plurality of wires 25 are connected to one of the input connectors 21, an.d the other terminal of the wires 25 is connected to one of the output connectors 22. In other words, the input connectors 21 and the output connectors 22 accommodate and connect the terminals of the plurality of wires 25, As the input connectors 31. of theinp't device 3k arid the input connectors 21 of the inter-device wirings 20 are connected, the plurality of terminals of the wires 25 can be connected at. one time -In the same manner, as the output connectors 32 of the output device 3B and the output connectors 22 of the inter-device wirings 20 are connected, the terminals of the plurality of wires can be connected The two end potions of the wires 25 are generally attaches $0 with connectors of a type corresponding to a type of the input connectors 31 of the input device BA and a type of the output connector 32 of the output device 3B. The connectors are the input connectors 21 and the output connectors 22. As the corresponding type, the number of terminal"m" is the same to the wirings on the deviceide and the wirings on the wire 25 side. Note that the connectors on the device side and the connectors on the wires 25 side to be mutually connected are opposite in type, i.e.,, male or female.

By providing the cannectors described above, not only that detachment of the device and wires 25 becomes easier but also that firmness of the connection of the device and the wires 25. Note that a configuration without the connectors as described above is possible. In this case, the terminals are connected to each other in a predetermined style. This case can be also used as the test target 2 of the conduction check of the present embodiment.

Note that, while the input device 3A and the output device 3B are separate devices in FIG. 3A, the input device 3Aand the output device 35 may be one integrated device and this can be also used as the test target 2. In. this case, the input connectors 31 and the output connectors 32 are provided in one device and these connectors are connected to each other by the interdevice wirings 20 in the same manner.

In addition, while the input device 3A has one input connector 31 and the output device 35 has one output connector 32 in FIG. 3A, also when one input device 3A has a plurality of the input connectors 31 and one output device 35 has a plurality of the output connectors 32, it can be used as the test target 2.

Most of the work of connection of the inter-device wirings is carried out by human hand. Thus, errors like erroneous wirings connecting the wire 25 between wrong terminals and erroneous wiring connecting wrong one of the wires 25 to the terminals are prone to occur. Inaddition, disconnecting (breaking) bydamages of the wire itself, connection defects of the wires 25 due to lack of firm fxaticn and c'rntact between the rermanai of ne connector ot the device side and the terminal of the connector of the wire 25 side, and so forth are prone to occur. Thus, after finishing the work of connection of the interdevice wirings 20 and other timing, check and inspection are needed to find out whether all the wires 25 of the inter-device wirings 20 are correctly wired and connected so that the terminals are conducted to eacn otner When errcrco.0 wrings and/or connection defects etc. are found, the wirings are corrected and also it is needed to check and inspect the wirings to find out whether the state of the wirings is correct or not.

However, particularly, when the wirings are complicated as a large number of ti.e wires 25 and terminals are present, and/or when a large number of the inter-device wiri:ngs 20 are present, and so forth, the work including the connection and in. .spect.ior. described above become cumbersome and it makes a required time for the work long and increases the burden of the work. Then, the possibility of errors in the connection and/or mistakes in the inspections to occur is increased -Further, a distance between the input device 3A and the output device 33 may be far, that is, the wires 25 may be long and a large number of wires 25 may be connected. For example, a first worker is set at a position of the input device 3A and a second worker is set at a position of the output device 3D, and the first and second workers work together to connect the two ends of each of the wires to the connectorq of the dence side and to check the conduction state. When a large number of the wirings 25 and terminals are present, when the wirings are complicated, and/or the distance between the terminals is long in the inter-device wirings 20, the wonc of connaLti3n becomes more difficult and thus it makes errors and/or mistakes more prone to occur.

FIG. 3!i illustrates a portion of the inter--device wirings 20 in which only one of the wires 25 is extracted. The wire 25 is a line material of a conductive metal or the like. The wire 25 may be covered with a protective covering or the like. Two ends of the wire 25 are, in this case: terminals of the input connectors 21 and the output connector 22 and may be a make plug, for example. In addition, the wire 25 may be a cable including the wire 25 as a main body! the terminal o.f the input, connector 21, and the terminal of the output connector 22. Further, the wire 25 may have its one terminal formed as one of the input connectors 21 and the other terminal formed as one of the output connectors 22. That is! the connector may have only one terminal. However.i. this case, the connectors on the device side are needed to he connectable with the connector of a single wire 25.053 FIG. 3Cillustratesanexample of a case in which two ends of the plurality of wires 25 are accommodated in one of the input connectors 21 and one of the output connectors 22 to be collected as one cable 26 or a wire harness.

The input connectors 21 and the output connectors 22 of the cable 26 are connected as the terminals of three of the wires 25 are accommodated in the frame portion. The plurality of wires 25 may bec overed with a protective covering and/or bundled by a bundling tool. In addition, when a plurality of the wires 25 are present and connected between the plurality of wires in a predetermined relationship! to reduce errors by making the work for connection easier, the plurality of' wires 25 may he bundled as one gathering.

[Flows of Test Process and Work] FIG. 4 illustrate,. an operation flow as a whole including a procedure of the test process for conduction check and inspections of the inter-device wirings 20 by the control unit 10 of the method of conduction check' and the conduction check apparatus according to the first embodiment. The flow includes the work by a worker.

The reference numeral "Si" etc. denotes a step.

(51) First, in 51, the worker connects the inter-device wirings 20 of the-test target 2 to be a target of the conduction check and inspections between the input connectors 11 and the output -18 connectors 12 of the conduction check apparatus based on a reference of the contents of the design data information such as the inter-device wiring list di etc That is, each terminal of the input connectors Ii of the apparatus side in FIG. 1 is connected with each terminal of the input connectors 21 of the wiring side in FIG. 2; and, in the same manner, each terminal of the output connectors 22 is connected with each terminal of the output connectors 22.

032) Next, in S2, the worker inputs the design data information such as the inter-device wiring list dl etc. as information about the inter-device wirings 20 of the test target 2 to the design OS 52 of the computer 1. The control unit 10 stores the inputted inter-device wiring list dl etc. in the design DE 52. For example, the inter-device wiring list dl like that in FIG. S described later is inputted.

In 82, when there is already existing inter-device wiring list dl, the -data is fetched into the computer 1, when there is no already existing inter-device wiring list dl, the worker may directly input contents data of the inter-device wiring list dl, In this case, the control unit 10 provides a screen for inputting the inter-device wiring list dl and the worker inputs information following the screen.

In addition, in 82, not only the inter-device wiring list dl hut also other design data information related to the inter-device wiring list dl, for example, the harness diagram d2, the actual wiring diagram d3, the work procedure information d4, etc. may be input together.

Note that, in 82, upon input of the inter-device wiring list dl and other design data information to the design DE 52, the control unit 10 manages the inter-device wiring list dl and respective design data information such as the harness diagram d2 etc. related to the inter-device wiring list dl by associating them with IDs etc. in addition, when there are a plurality of the inter-device wirings are present, the control unit 10 manages, by associating with -19W IDs CtC., the inter-device wiring list dl corresponded to the inter-device wirings 20, respectively.

in a state in which the inter-device wiring List di has been already inputted, the worker inputs, to the computer 1, specification of the inter-device wirings 20 of the test target 2 and instruction on executing the test for conduction check and inspections. The instruction on executing the test is, for example, select and execution of command and/or a button displayed on the screen. The specification of the inter-device wirings 20 of the test target 2 is, for example, operation of specifying the inter-device wiring list dl and/or ID of the dl, etc. The order of-91 and. S2 may be reversed. When the order is reversed, the inter--device wiring list dl inputted in SI is displayed on the screen in 92 arid the worker works on the connection in accordance with the screen.

(93) Next, in 33, the control unit 10 of the conduction check apparatus creates, using the test process unit 122, the correct map dli based on the design data information including tb.e inter-device wiring list dl in 32. Details of the correct map dii and the process of creating the correct map dil will he described later with reference to FIGS. SA and 9B etc. The correct map dli is information indicating a relation of connections of the inter-device wirings 20 between the input connectors 11 and the output connectors 12 according to designed values in a style of two-dimensional map or two-dimensional matrix.

One axis of the correct map dll shows the terminal numbers of the input connectors 11 and the other axis shows terminal numbers of the output connectors 22, and an intersection of the axis existence of a connection between the terminals.

The control unit 10 associates the created correct map dii to the inter-device wiring list dl by putting an ID and stores the correct map dim into the test DE SI. Note that, in 53, as long as the. correct map dil is once created and saved, the correct map dli can be reused later.

(54) Next, in 54, the conduction check apparatus transmits and receives signals for test to the inter-device wirings 20 of the test target 2 in the state in which the inter-device wirings 20 have been already connected between the in. .put connectors 11 and the output connectors 12, using the test control unit 121 and the signal transceiving circuit 111, The control unit 10 acquires a result of the transmission/reception of the signals as the first result data dl3 and stores the same in the test DE 51. Details of signal transmission/reception in 54 will be described later with reference to FIGS. 5 to 7.

As a summary of the signal transmission/reception of S4, th..e signal transceiving circuit 111 inputs, to a plurality of terminals of the output connectors 12, as the signals for test, signals in a binary state, i.e., ON and OFF sequentially one by one.

Corresponding to the input of the signal, in accordance with the state of the inter-device wirings 20, from the plurality of terminals of the. ir.put connectors 11, a signal of ON or OFF is outputted, and the signal transceivinq circuit 111 detects the signals. According to the signal transmission/reception in S4, the control unit 10 can detect and check the states of connection and conduction of the inter-device wirings 20 as actual measured signals.

(55) Next, in 55, the conduction check apparatus creates, using the test process unit 122, the test result map d12 based on the first result data d13. Details of the test result map and a creation process thereof will be described later with reference to FIGS. bA and lOB etc. The test result map d12 is information indicating states of connection and conduction of the inter--device wirings 20 between the terminals of the input connectors 11 and the terminals of the output connectors 12 according to the result data dl3 in a style cy.

of two-dimensional map or a two--dimensional matrix. One axis of the test result map d12 shows terminal numbers of the input connectors 11 and the other axis shows terminal numbers of the output connectors 12. An intersection of the axes shows, as a state between the terminals, a symbol corresponding to ON or OFF of the signal of 54.

Note that the terminal numbers of input/output are common among the correct map dli and the test result map di.2 and thus can be shared, in addition, the test process unit 122 may create the test result map d12 in addition to the first result data d13 based on the information of the inter-device wiring list dl and/cr the correct map dli etc. In this case, the test process unit 122 may determine identification information etc. of the wires 25 and both terminals of the wires 25 used in the inter-device wirings 20 and may store the identification information etc. in the test result map d12.

(56) Next., in SE, the test process unit 122 determines and extracts differences between the two maps by comparing and matching the correct map dli of 53 and the test result map d12 of 55 regarding the inter-device wirings 20 of the test target 2. In this manner, as well as determining the states of connection and conduction of the inter--device wirinqs 20 or good or had of the wirings, the test process unit 122 specifies portions in a not normal state. The test process unit 122 collects information including this comparison result as the second result data dl4 that is test result data. The test process unit 122 associates the second result data d14 to other data by putting II)s and saves the same in the test 1DB 51. Examples of "-ne -ompar3 non JrL 56 wili he desrnhed later v1"'r1 reference to FIG. 11 etc. The comparison result and the second result data dl4 of 56 include a result of matching (denoted by "OK") and mismatching (denoted by "NO") of the contents of the correct map dli and the Lest result nap d12 and information about the matched or mismatched portions. The information of mismatched portions includes a terminal number of the terminals of the input connectors 11 and the output connectors 12 corresponding to an area of an intersection of the map, and the identification information of the wires 25 associated to the terminals.

The mismatched portioil in the comparison result indicates a portion at which the wiring is not normal as the state of connection and conduction of the inter-device wirings 20, that is, a portion at which the possibility of erroneous wiring or connection trouble is high. The test process unit 122 determines the wires 25 and terminals associated to the mismatched portion to be in a state in which the wiring is not normal, in oth r words, no-conduction or no-connection state or to be a portion havin.g a high possibility of the states. The test process unit 122 determines the mismatched portion as a candidate portion at which the connection status of the wiring is should be checked and corrected.

Note that the second result data d14 may he managed being merged with the first result data dl3. The test process unit 122 may store, in the second result data dl4, information corresponding to the state of the wiring having been determined, for example, a symbol corresponding to a state such as erroneous wiring of the plurality of wires 25 or a connection trouble of single wire 25, etc. (87) In 87, the control unit 10 branches the process to SB and 89 in accordance with matching or mismatching in the comparison result in SE. That is, in SB and 89, when the result is matching (OK) in 87, the control unit 10 outputs a screen with contents corresponding to the matching in SB; and when the result is mismatching (NC) in S7, a screen with contents corresponding to the mismatching in 59.

(SB) In SB, the control unit 10 creates a screen containing F *23.

the test rewuZt netn of matchttw' aad displays the same on t dIsplay Sice lO' using the ttht inpiJ pd The test inputloutput unit 123 uses the intér-dèvd4 wirizi ilét d11 the second result data d14, fld the "e' "ta di5 ett to create S the screen data. In the screen in 98, a message etc. tflflng ehe is d4:spiaye4.

a thi worker Sea the. scrêèt in fl the wö±k"± &äÉ' ähSk' thä.t? the st4tes o ct"hiOtioA "4 "::ja Of the i»='ttt -device" wititgs o are ncinnal as desd.gned, that Is, the same: as the inter-devtce W' !4$ ]4st Z,. FZ 1?'ZA dsc;a,e later iflustrates a display id"eéh Sthtflpielin S8.

(s9) In S9,. the cr"tra. unit 10 treatei a. screeti ecntaining test result informaUon pf the thismatcli±ng and dispays the same on the display devict 103 using the test input/output unit 123. The ttàt ixsputj'a"t"t t"fl t23 uses the utte±'aente w1ttt list dl, F the' second. result data d14., and the screen data dis,. etc. to create the sz-eji data inc dfng'tbetea remit Sformationof mismatching, In the' screen in;s", a message etO. te'ilii"4 the t"tE"at"th1i" information about mismatched portioa, related. diagram data1. etc..

an disp:1:aye4.

t worcer sees ctze scnen Sn $9 the wqrker caa ciwfl: that the states" of tonduatio" *nd an"e'dtion of the itttt,devit wirings :20 axe not as designed arid not nona. ALso the wozicer as easiiy and quickly recgn1Ze an spec jr jr4 porUpu ot ta,,e rings tq 2 k.. co Sad accqz44,,g to the jpa:tg'cit mismatched pértion.

Fi'L 12E destzLbed later' iiluath'tes ?can example of display' screen in $9 ($io flie worker cthecks: rreee fitter -device wirings 4 P. 4:,.:, or' with the intonnAtion of mitatdhed $"±tiO±i th. is a a"tet,t the st'een ut 9. F*t example., the worker vtsuafly cbe the states 0± e wIres 25 and t!t's apeci'fl$ !.S,,,:,,,,,: pStic,a, azi4 qe "he contents of the inter-device wiring list dl etc. including correct wiring informatiofl Then trie workex zedo connection of the wires 25 arid terminals so that the wiring is correct when there is, for example, an erroneous wiring.

(511) The worker again inputs instruction on executing conduction check or test to the computer I after the correction work in 510. For example, the worker presses a retest button inside the screen inC9. Accordingly, the control unit 10 return to 54 and executes the same process from 54 regarding the state of connection at the inter-device wirings 20 at the moment.

(512) In S12 after SB, in accordance with existence of the inter-device wirings 20 of the next test target 2, when there is the inter-device wirings 20 (Y) , the process returns to 51 and repeated from Si in the same manner regarding the inter-device wirings 20 of the next test target 2; and when there is no inter-device wirings 20 (N) , the process is ended.

[Signal Transceiving Circuit) With reference to FIGS. S to 7, process of signal transmission/reception using the signal transceiving cir ait 111 corresponding to 54 described above.

FiG. 5 illustrates, as a summary of the signal transceiving circuit iii, a circuit configuration corresronding to one wire 25 The 3gna1 transcelving csrc.st 111 has, an intetnal circnt 41 and a photocoupler insulating circuit 43 on the input side to be connected to the input connectors 11, and also an internal circuit 42 and a transistor output circuit 44 on the output side to be.

connected to the output connectors 12.

The internal. circu3t 43 and the internal circuit 42 are circuits including nodes or switches for inputting and outputting.

an ON or OFF signal. Upon a test, switching of the state of ON or OFF is controlled based on a. control signal from the outside so that the internal circuit 42 of the output side outputs a signal c2 of ON or OFF corresponding to the control signal to the output circuit 44. The same goes to a contact output circuit when it is used as the transistor ouUput circuit 44. The transistor output circuit 44 amplifies and inputs the signal c2 of the input to the terminal of the output connectors 12.

The signal c2 inputted to the terminal of the output connectors 12 is transmitted to, via the terminal of the output connectors 22 of the inter-device wirings 20 connected to the terminal of the output connectors 12 and the wire 25 of the terminal of the output connectors 22, the terminal of the input connectors 21 of the inter-device wirings 20 and the terminal of the input connectors 11 connected to the terminal of the input connectors 21. Then, the signal c2 is inputted as a signal c3 from the terminal of the input connectors 11 to the photocoupler insulatiag circuit 43.

The photocoupler insulating circuit 43 receives and amplifies a signal c3 from the terminal of the input connectors 11 and inputs the same to the internal circuit 41. The internal circuit 41 outputs th.inputted signal c3 of ON or OFF to tte outside via a node or switch of the internal circuit 41.

The signal transceiving circuit Ill turns the node or the switch of the internal circuit 42 of the output side ON upon testing the inter-device wirings 20 between the terminals of the input connet-' tors 11 and the terminals of the output connectors 12. At this time, current flows when the terminals of the input connectors 21 and the terminals of the output connectors 22 of the target wires are normally connected, thereby transmitting the signal c2 of ON and thus outputting the signal c3 of ON from the node of the internal circuit on the input side. ihen the terminals are not normally connected, the signal c2 of ON is not transmitted and thus the signal c3 of OFF is outputted from the node of the internal circuit 41, FIG. 6 illustrates a circuit configuration of a part 26' corresponding to a plurality of the wires 25 connectable between the terminals of the input connectors 11 and the output connectors 12 as the signal transceivinq circuit 111. The signal transce.iving circuit ill in FIG. 6 has a configuration in which a plurality of circuits of FIG. 5 are connected in parallel corresponding to the number of the terminals "m", The plurality of parallel circuits are connected via input connector cables 131 and output connector cables 132.

Corresponding to the number of terminals "rn", the number of nodes of the internal circuit 41 and the.internal circuit 42 is the same "m" . The nodes of the internal circuit 41 are denoted by p{plpm} and the nodes of the Internal circuit 42 are denoted by t(tl-tm} A plurality of the photocoupler insulating ciz uits 43 are denoted by P{P1Pm} The plurality of transistor output circuits 44 are denoted by T{T1-Tm}. Note that, in FIG. 6, each of the internal circuit 42 on the output side and the internal circuit 43 on the input side has a configuration in which a plurality of nodes in parallel are collected as one circuit. States of ON or OFF of each of the plurality of nodes t{tltm} of the internal cix uit on the output side can be optionally controlled.

The signal transceiving circuit 111 includes a control signal input unit lllAanda detection signal output unit lIlE. The control signal input portion lilA issues the control signal cl based on the control from the test control unit 121 and inputs the sane to each node t of the internal circuit 42 on the output side via the output connector cable 132. in accordance with the control signal cl, from each node t of the internal circuit 42 on the output side, the signal c2 of ON or OFF is issued.

rrHe detection signal output unit 1118 detects and acquires the signal c3 of ON or OFF outputted from each node p of the internal circuit 41 on the input side as the detection signal c4 via the output connector cable 312, The detection signal output unit 11:18 outputs the detection signal c4 to the test control unit 121. The test control unit 121 takes the contents of the detection signal c4 as the first result data d13 The control signal input unit lilA can select an optional node t of the internal circuit 42 and control the state of ON ox' OFF of the node t by the control signal ci, In. addition, the detection signal output unit 1J1B can acquire the signal c3 from. an optional node p of the internal circuit 41 as the detection signal c4. That is, signal tn.nsceiving circuit in can select arid test, as test target(s), one or more optional number of the plurality of wires and terminals of the inter-device wirings 20.

The test control unit 121 generates a control signal for controlling transmission and reception of the signals for the test and instructs the control signal input unit lilA of the signal transceiving circuit ill following the inter-device wiring list dl of S2 or the correct map dii of S3.

To describe that in more detail, the test control unit 121 and the signal transceiving circuit ill control the plurality of nodes t of the internal circuit on the output side one by one sequentially to turn on the node t. When one node t is ON at a timing, the other nodes t are OFF. For exampie, the signal c2 of ON is inputted to, at a first timing, an optional one terminal of the plurality of terminals of the output connector 12, for example; a terminal with a terminal number "I" and the signal c2 of OFF is inputted to the other terminals. The signal transceiving circuit 111 executes the operation to all the terminals of the output connectors 12 one by one sequentially in the same manner.

In the first embodiment, the control unit 10 automatically tests the plurality of wires 25 of the inter-device wirings 20 in a bunch at one time. Upon this, the control unit 10 controls a plurality of the nodes t of the internal circuit 42 on the output side associated to a plurality of terminals of the output con. nector 12 one by one sequentially to put them in the ON state.

Corresponding to the input of the signal c2 from the output connector 12, the signal c3 of ON or OFF is outputted from the plurality of nodes p of the internal circuit. 41 on the input side connected to the input connectors 11 in accordance with the state of the inter--device wirings 20. The detection signal output unit 1113 acquires the signals c3 as the detection signals c4.

FIG. 7 illustrates an example of a connection state of the inter-device wirings 20 and an example of signal transmission and reception by the signal transceiving circuit Ill. The terminals of the input connectors 11 and the terminals of the output connectors 12 are connected with the plurality of wires 25 of the inter-device wirings 20 as illustrated. The state of the connection in FIG. 7 corresponds toan example of the inter-device wiring list dl in FIG, 8. For example, the terminal with the terminal number "1" of the output connectors 12 and the terminal with the terminal number 2" of the input connectors 11 are connected with a wire 25a with the line number of "14821" In the state in FIG. 7, by turning one optional node t of the internal circuit 42 on the output side into the ON state, the signal transceiving circuit 111 inputs the signal c2 of ON to the terminal of the output connectors 12. As sequential control, f or example, at the first timing, a first node tl is turned ON and the other nodes t are turned OFF. In this manner, the signal. c2 of QN is inputted to the terminal with the terminal number "1" of the output connectors 12 and the signal c2 of OFF is inputted to the other terminals.

Corresponding to this input, the signal is transmitted via the wire 25a with the line number "14821". Thus, the signal c3 of ON is outputted from the terminal with the terminal number "2" of the input connectors 11 via the node p2 of the internal circuit 41 on the inpu.t side and the signal c3 of OFF is outputted from the other terminal and nodes p. The control unit 10 determines from detection of the signal c3 of ON that the terminal with the terminal number" 2" of the input connectors ii and the terminal with the terminal number "1" of the output connectors 12 are normally connected and conducted. When the terminals are not normally connected, even when the node t of the internal circuit 42 on the output side is tuned ON, the signal is not transmitted to the corresponding node p of the internal circuit 41 on the input side and the signal c3 of OFF is outputted.

Thus, the control unit 10 can determine that the terminals are not normally connected.

At the following second timing, the second node t2 is tuned ON and the other nodes t are turned OFF, In this manner, the signal c3 of ON is inputted only to the terminal with the terminal number "2" of tle output connectors 12. Corresponding to thus input, from the node p3 of the internal circuit 41 on the input side, the signal c3 of ON is outputted. This operation is repeated in the same manner and the node tE s:urned ON and the other nodes t are trned OFF at the final timing. In this manner, the signal c2 of ON is inputted only to a terminal with the terminal number "6" of the output connectors 12. Corresponding to this input, from the node p5 of the internal circuit 41 on the input side, the signal c3 of ON is outputted.

[Inter-Device Wiring List] FIG S lilustrates a table tha... i.s a. configujation cxample of the inter-device wiring list dl. This table lists the terminal number of "a" and the line number of "b" in a column of information on the input side, the terminal number of "c" and the device name of connection dest anat ton of "ci" n a coluirn of information on the output side, and note of "e" in the other column. The inter-device wiring list dl is created per the inter-device wiring 20 and a plurality of the inter-device wiring lists dl are managed being added with inter-device wiring iDs. The items a to c are essential :nformation.

The terminal number of "a" is a number for identifying a position of a terminal of the input connector 11 associated with a terminal of the input connector 31 of the input device IA and a position of a terminal of the input connector 21 connected to the terminal of the input connector 11, The line number of "h" is a number for identifying the wire 25 connected to the terminal of "a".

The terminal number of "c" is a number for identifying a position of a terminal of the output connector associated with a terminal of the output connector 32 of tne output c,evice 38 and a positlon of a terminal of the output co.nector 22 connected to the terminal of the output connector 32. The device name of connection destination of "d" is information about a name etc. of the output device 38 connected to trie termnai of c Tue nc'oe of "e" is attribute information such as color, type or else of the wire 25 of "b" For example, the first line in FIG. S specifies connecting one terr-inal of the wre 25 with the liie number of "MSLL' to the terminal with the terminal number of "2" of the input connector 31, and connecting the other terminal of the wire to the terminal with the terminal number "1" of the output connector 32.

[Correct Map and Creating Process] With reference to FIG, 9, a creation process of the correct map dll corresponding to S3 of FIG. 4 will be described. Eased on the inter-device wiring list dl in FIG. 8, the inter-device wirings of the test target 2 illustrated in FIG. 7 have been already connected. FIGS. 9A and 98 illustrate state transitions of the correct map dll. The state in FIG. 9A describes connection information about the wire 25a with the line number "N821" of the inter-device wirings 20 in FIGS. 7 and 8. The state of FIG 9B describes connection information about all the wires 25 of the inter-device wIrings 20 i-FIGS 7 S Note chat, when there -Si-are test target 2-of a plurality of the test targets 2 and inter-device wiring lists di, each of a plurality of the correct maps dil is managed being added with an ID, The correct map dli in FIGS. 9A and 9B each express two-dimensional map or two-dimensional matrix having a line of the terminal number of the terminal on the input side (From) indicated by 901 as one axis of the dimensions and a column of the terminal number of the terminal on the output side (To) indicated by 902 of the other axis of the dimensions. And? the correct map d:Ll describes a symbol indicating a relationship of the terminals at an intersection of the matrix expressing combinations of the input and output terminals. As the symbol, O" means a non-connected state (OFF) and "1" means a connected state (ON) In the example of FIG. 9A, as information regarding the connection of one wire 25a. at th.e intersection of the line of the terminal number "2" on the input side and a column of the terminal number "1" on the output side, a symbol "1" indicating that the terminals are connected is stored. Then, at each of the other intersections than that of the line and column mentioned above, a symbol" 0" meaning no connection is stored. Also to the other wires of the inter-device wirings 20, the symbol il" or "0" is stored at each intersection of the matrix in the same manner, In this manner, as seen in FIG. 9B, the correct map dii.. .in which all of the intersections are filled with symbols is finished.

[Test Result Map and Creation Process] With reference to FIGS. bA. and lOB, a creation process of the test result map d12 corresponding to 55 of FIG. 4 will be described. As a premise and an example, the correct maps dli of FIGS. 921⁄2 and 93 have been already created. FIGS. bOA and lOB illustrate transitions in the state of the test result map d12 as configuration examples of the test result map d12. The state of FIG bOA descrber test recul± information scout the hire 25a with -32 -the line number "M921" of the inter-device wirings 20 in FIGS. 7 and 8. The state ot:FIO. lOB describes test result information about all of the wires 25 of the interdevice wirings 20 in FIGS. 7 and 8. Each of a plurality of the test result map d12 is managed being applied with an ID and associated with the correct map dli.

The test result map d12 in FIGS. iDA and lOB each express two--dimensional map or two--dimensional matrix having a line of the terminal number of the terminal on the input side (From) indicated by 1001 as one axis of the dimensions and a column of the terminal number of the terminal on the output side (To) indicated by 1002 of the other axis of the dimensions. The test result map d12 describes symbols indicating states of connection and conduction of terminals at intersections of the matrix-showing combinations of the input and output terminals. The symbols are the same as those of the correct map dli. The symbols indicating the states corresponds to the content of the signal c3 of ON or OFF outputted from the terminal of the input connectors 11 and the node p of the corresponding internal circuit 41 on the input side.

In the example of FIG. iDA, symbols corresponding to ON or OFF of the signal c3 of the outputs from the terminals with the terminal numbers "1" to "6" of the input connectors 11 in accordance with the input of the signal c2 to the terminal with the terminal number of "1" of the output connectors 12. That is, at each the intersections o.f the column of the terminal with the terminal number "i" on the output side and the lines of the terminal numbers "1" to "6" on the input side, "1" or "0" is stored corresponding to ON or OFF as a state of the terminals.

Since the signal cB of ON is outputted when the terminal with the terminal number "2" of the input connectors ii is connected to the terminal with the terminal number "1" of the output connectors 12 by the wire Tha in FIG. 7, the symbol "1" is stored at the ir.terection of tfle line At the otner tnrerscctlons of ilnes with the other terminal numbers on the input side, the symbol 0" is stored in accordance with the output of the signal c3 of OFF.

Regarding a result of the input of the signal c3 of ON to the terminals with the other terminal numbers of the output connectors 12 of the inter-device wirings 20, in the same manner, the symbol "I" or 0" is stored at each intersection of the matrix. In this manner, as FIG. 1013, the test result map d12 having all the intersections filled with symbols is finished.

Ecoinparison Process Example] FIG. 11. illustrates an example of the comparison of the correct map dli an.d the test; result map dl2 of S7 in FIG. 4. Since each map is data mainly containing binary symbols at intersections, the test process unit 122 can easily extract and specify matched portions and mismatched portions which are differences of the two maps by simple logical operations, for example, XOR between the symbols at intersections of the two maps. As described below, by comparing the correct map dil and the test result map d12, the states of conduction and connection of the inter-device wirings 20 can be confirmed and inspected.

In. FIG. 11, (a) illustrates a situation in which the inter-device wirings 20 are correct. In this case, the contents oil the correct map dli on the left and the test result map dfl on the right are matched and there is no mismatch of the symbols at the intersections. As a result. the matched (OK) status is determined in 56 and 97 and a screen like FIG. 12A described below is displayed in 58.

In FIG, fl, (b) illustrates a situation in which an erroneous wiring exists in the inter-device wirings 20. That is, a situation such that the wire 25 is connected to a wrong terminal or a wrong wire 25 is connected to a terminal. In this case, the contents of the correct map dli on the left and the test result map d12 on the right are mismatched. The parts surrounded by broken lines of 1101 indicate mismatched portions The mismatched portions are intersections of the column of the terminals 4" and on the output side and the lines of the terminals "4" and 5" on the input side where the symbols "1" and "0" are opposite.

Since each terminal of input/output is associated with information of the wires 25 connected thereto, the control unit 10 can understand which one of the wires 25 correspond to the mismatched portions. In the correct map dll on the left, the state of correct wirings in FIG, 7, particularly, as illustrated at the portion of 701, the terminal "5" on the input side is connected to the terminal "4" on the output side, and the terminal" 4" on the input side is connected to the terminal "5" on the output side. When th.e connection of the wirings-is wrong such that the terminal "4" on the input side is connected to the terminal "4" on the output side, and the terminal "5" on the input side is connected to the terminal "5" on the output side, the test result map d12 on the right is obtained. In this case, the test process unit 122 can determine that connections between a plurality of terminal and the wires 25 corresponding to the mismatched portions are wrong. 1s a result, the status is determines as mismatched (NG) in 56 and S7 and a screen like FIG. l2B described below is displayed in 59.

In FIG, 11, (c) illustrates asituationhavingadisconn.ection or an abnormal connection in one of the wires 25 of the inter-device wirings 20. In this case, the contents of the correct map dll on the left and the test result map dl2 on th-e right are mismatched.

The parts surrounded by dotted line of 1102 indicate mismatched portions. The mismatched portions mean intersections of the column of the terminal "5" on the output side and the line of the terminal "4" on the input side and thus the symbols are opposite. In this case, the test process unit 122 can determine regarding the connection of the wire 25 between the terminal "5" on the output side and the terminal "4" on the input side that possibility of a disconnection or erroneous connection is high. As a result, the stacus s deLetmsneu to ne rnisinaccned NG) in 36 and 5/ and a screen of mismatched result is displayed in 39 in the same manner.

[Output Screen Example] P1(3. 12 illustrates an example of a screen for displaying information containing the result of th.e test of the conduction state by the conduction checker apparatus. The control unit 10 and the test input/output unit 123 create a screen of the test result in S8 and 89 in PlC. 4 based on the result of match (OK) or mismatch (NG) of 57 and display the screen on the display device 103.

FIG. 12A is an example of th.e display for displaying a result of matched (OK) state. This screen shows that, as a result of the matched state, all of the plurality of wires 25 and terminals of the inter-device wirings 20 of the test target 2 are correctly connected. In this screen, item gi displays information of the inter-devTce wiring list dl etc. as information of t1e inter-device wirings 20 of the test target 2, Item g2 displays a message etc. telling that the state is matched or normal as information of a test result about the inter-device wirings 20 of the test target 2 corresponding to the inter-device wIring list dl of the item gl.

The item gl nay be in a style of displaying one from the plurality of inter-device wiring list dl by an operation by the worker, for example. A...lSOf the item ql may display detailed contents of the selected inter-device wiring list dl. Moreover, the item gl may display contents of the correct map dll and the test result map dl2 corresponding to the selected inter-device wiring list dl.

FIG. 126 is a screen example for displaying a result of mismatch (Na) . This screen displays that there. ts an erroneous wiring or disconnection at at least the plurality of wires 25 and terminals of the inter-device wirings 20 of the test target 2 as a result of mismatch. In this screen, the item ql is the same as the item gl in FIG. l2A. The item g2 displays, as information of a test result, a message telling that the state of the inter-device wirings is mismatched or not normal, information of mismatched portions, a message telling that the connection status of the mismatched port ions should he checked and corrected, etc. The display example of the ±tem g2 shows line numbers of the wires 25 corresponding to the mismatched portion of the comparison result, terminal numbers of the terminals of the input connectors 11 and the output connectors 12, and so forth as candidates, The example in FIG. 126 corresponds to the example in (b) in FIG. 11 and mismatched portions are line numbers 94824" and "P4825" of the wires 25, the terminal numbers of the input and output; terminals are "4" and "5" In addition, in the example in FIG. 123, since the possibility of an erroneous wiring is determined to be high according to the information of mismatched portions like the example in (b) in FIG. 11, the I tern g2 shows a message of having the erroneous wiring. In the same manner, like the example in Cc) in FIG. ii, when a disconnection or an abnormal connection of one wire 25 is determined the item g2 cows a message tellinq the disconnection or abnormal connection.

The information of mismatched portion of the item g2 may not only show the identification information and messages exemplified but also graphically show by two-dimensional images etc. For example, a display button for mismatched portion may be provided o" the screefl so that an image showsnq tne nisrnatch.2d oorton as displayed when the worker presses the button.

The item g3 shows contents like the inter-device wiring list dl or information graphically expressing the contents in a twodimensional manner etc. and drawing data related to the info:rmation, etc., which are valuable in check and correct the wirings. The test input/output uni 123 reads, as a target inter-device wiring list dl and drawing data associated to the inter-device wiring list dl, the harness diagram d2, actual wiring diagram d3 * arid work procedure information d4 etc. stored in the design DL 52 arid shows them in the item g3. In addition, the item g may ho a corresponding drawirg by providing a drawing display hutton and pressing the button.

In addition, the item g4 shows a button for retest. The worker presses the button for retest after correcting wirings following the items 92 and 93. Then, the conduction checker apparatus again executes the test process including above-described 54 in the same manner targeting the state of the inter-device wirings 20 at the moment and display a result of the test process on the screen. When the wiring is correct by the correction, the screen like FIG. 12A is obtained.

The worker can. easily and quickly recognize a conduction check result by viewing information of the screen of the test result like FIGS. i2T and l2B. The worker can easily and quickly recognize the unmatched portion(s) in the inter-device wirings 20 from the information on the screen. In addition, it is easy for the worker to work on cneck and cotreLtion of the connecton status of t'e wirings including the unmatched portion. That is, time required for the work of conduction check and inspection can be shortened and thus the burden of the work on the worker can be reduced more than the existing technique.

FIG, 13 illustrates another output screen e-ample of the conduction check apparatus according to the first embodiment. The screen example in FIG. 13 includes item gS added to FIGS. 12A and 123. The item gS graphically shows, in a two-dimensional manner, the terminals and wires 25 which are contents of the inter-device wirings 20 on which the test is executed. Regarding an inter-device wirings 20, item gsl shows contents corresponding to the correct map dil. In addition, item g 52 shows contents corresponding to the test result map d12.

The test input/output unit 123 displays a screen like FIG 13 using t:rie inter-device wiring list dl, tile correct map dli, the test result map d12, and the screen data dls, etc. The example of FIG, 13 corresponds to the examples in above-described FIGS. 8. 9B, lOB, (b) in FIG. ±1, and FIG. 12GB) , The item q3 may be graphically shown highlighting mismatched portion(s) . As the worker views the information on the screen, it is easy for the worker to check and correct mismatched portions etc. [Effect etc.] According to the method and apparatus of conduction check according to the first embodiment described above, as to the check and inspection of the states of conduction and connection of the inter-device wirings 20, time reduction, and burden reduction related to the work including connection and check by a worker can be achieved and also sure inspections and tests with reduced mistakes in the work can be achieved. In addition, specification and correction of non--conducted portion in the wirings can be efficient.

In the first embodiment, using the signal transceiving circuit ill, automatic tests can be executed on all of the terminals and wires 25 of the inter-device wirings 20 and results of the tests can he obtained as maps and screens at one time. Thus, the worker may execute the test after wiring the whole of the inter-device wirings 20 and thus work of connecting and checking the wires 25 one by one is not needed. Also when there are a laroe number of the intn-device ninns 20 and the wires 25 and the termnals of the nter-aevice wirsngs 20 of the test tctrget 2, te %-ol1cer can efficiently check conduction with a low possibility of errors in an inspection result, thereby ensuring the reliability of the inter-device wirings 20, Also, in the first embodiment, mismatched portions corresponding to erroneous wirings and abnormal connections are automatically found and displayed on the GUI screen, the worker can ?eaailV ±eOo1 é tñd ApE otT. the thiSthàtOhèd ponio±. As Wtll as that point, Ue retest attet coxrecuzgc the w4iring can be easily ezecutàd. ts., the wo4e can eftieSea'ztry work 9XZ cfl correction of All of the iñtèr-detidê wirings 2G.

:5 LEistiflg tketh*d&t Condufliofl. ebetic) FIG. 18 Illustrates,, as a cçpaiv example to the first !PSW, a co flwe4Pe et an existing generaa method r eheakth Státhtót &s:t±t oj&j:tjs; iaej'-defloe Witi:ztS tisi a tester 310. The tester 310 includes probes, 321 and F 10 and a meter. As a proGeøure ot the work on t$ existing uoSuctiion check, the worker put probes 311 and 3i of the tester no site two te±thia1S ot a. tet wilEe 25 to: eheal ite ttt±b4t state betwsn the teninais based on the desin data information of the connecIons of the inter-device wirings ZO.

For exampie to check the state of the wire wItl(thé 1j the Wtke p*Ats the ptobe 3:uotito the tentiril with the terminal number "2" of the input corn ectors 21 o± the insrc-aev±ce wLrngs and: p*s the poe X2 cito the terminal with the terminal nuet "V of th output toanetoro 2:2. me: texitthiaia are aonnected wire 25 with the line number t48i1 therebGtween, Thea the worker can check the condátion staS at: the; wre 25 betwein the y djsptay 8taeg a Matance vfln of wiring on a meter or the teeter:to or bintet sound stt. beeps in accordance wi the resistance yalue:. The worker npeats the wozic of çnnection and th check per the lire fl 0 all at the:remaSnir9 wicea of the itedév:ce wiflngs »=q of: the teat target 2.

PIG. 19 iliusttats a te of a tctig.aX'a.tiøfl o a.

conduction checker in the method usIng a coatc ion checker as :antther caparativE eaS. :Pet CCflff±9UfltOfl of a circuit of a cn&tction checker 320 12 art oSOSIlttibñ itttttit tisiztg ttatsist&n. operati prinoiple ot the iz-azSt o± the conduction checker 320 is as foalAws. etween measurement tezSaLs flt of -40' the circuit, a measured circuit, that is, two ends of a target wiring of the conduction check are connected. then, a supply voltage (Vcc) of the circuit is applied to a base of a transistor Trl through a resistor inside the circuit, putting the transistor Tr1. into a conducted state and making current flow in a collector of the transistor Trl. As the current corresponds to base current of a transistor Tr2, the transistor Tr2 is also put into a conducted state.

In this manner; current flows in a speaker 322 corresponding to the buzzer sound.

A part of the current flowing in the speaker 322 returns to thehase of the transistorTr3 tl'rougha capacitorcl In tins inannet, the current flows more in the speaker 322 inducing oscillation. When the current in the circuit reaches a certain, value, voltage charged in the capacitor Ci induces reversed biasing of the transistor Trl, This prevents the current to flow in the speaker 322. When the charges stored in the capacitor Ci are discharged, the same operation is repeated from the start. According to the foregoing, in accoxcance with the resistance of the resistor connected to the measurement terminal 321, sound is beeped from the speaker 322, However, when checking and inspecting the states 0± the interdevice wirings 20 using the existing method and apparatus of conduction check, the more the number of the wires 25 and terminals, the more the work time and the larger the burden on the worker. In addition, the possibility of mistakes of wrong wiring to occur is increased. The mistakes include mistaking the wires 25 and terminals to connect, mistakenly reading target terminal numbers from the inter--device wiring list dl, mistaking terminal to put the probes 311 and 312 of the tester 310, etc. Due to the mistakes, the possibility of errors in the result of the inspection to occur is increased.

Accordingly, the first embodiment provides the method of conduction check including the procedure of automatic test and the conduction checker apparatus including the test function so that the conduction check and inspection of the inter-device wirings 20 including a plurality of wires 25 can he surely performed with a short tirre and low burar <Second Embodiment> Next, with reference to FIGS. 14 to 17, a conduction checker apparatus and a method of con,duction check according to a second embodiment will be described. The second embodiment includes, as an element different from the first embodiment, as illustrated in FIG. 14 etc. an input/output connector unit having terminals on the conduction checker apparatus side and the inter-device wirings side being different in the number of terminals. The second embodiment also includes conversion connectors 61 arid 62 for converting the terminals and a test function corresponding to the 1.5 conversion. In addition, the input connectors 11, the output connectors 12, the input connectors 21 and the output connectors 22 which are in the input/output connector unIt are connectors accommodated and connected as a plurality of terminals collected as one.

[Conduction Checker Apparatus] FIG. 14 illustrates a configuration of the conduction checker apparatus and a system including the conduction checker apparatus of the second embodiment. The input connectors 11 and the output connectors 12 of the conduction checker apparatus are connectors of a predetermined type so that rn-terminals are collectively accommodated and connected in one frame. Also, the input connectors 21 and the output connectors 22 of the inter-device wirinqs 20 are connectors of a predetermined type so that n-wires 25 are collectively accommodated and connected. The number sm" of the terminals of the connectors on the conduction checker side is larger than the number "n" of the terminals of the connectors on the inter-device wirings 20 side.

The connectors arid terminals on the conduction checker apparatus side and the connectors and terminals on the inter-device wirings 20 side are not always tb.e same type. While the numbers sm" of connectors on the conduction checker apparatus side and the connectors on the inter device wirings 20 side are the same in the first embodiment, in the second embodiment, the numbers terminals "rn" and "n" are different regardin.g the connectors on the conduction checker app*artus side and the inter-device wirings 20 side.

Generally, there are various types and kinds of connectors.

For example, a plurality of terminals and pins are accommodated in a frame part of the connectors. In addition, in the mechanical connections between the connectors, one side of them is male type and the other side is female type. Correct connections cannot be obtained using different types or not compatible types.

The input connectors 21 and the output connectors 22 of the inter-device wirings 20 of the test target 2 are also expected to have connectors of the type having various terminals and the number thereof is n for example. 1\ccordinglv, in the second embodiment, using the conversion connectors 61 and 62, the connectors on the conduction. checker side and the connectors on the inter-device wirings 20 side are connected, The conversion connectors include the conversion connectors 61 on the input side and the conversion connectors 62 on the output side. The conversion connectors 61 on the input side connect between the input connectors 11 of the conduction checker apparatus and the input connector 21 of the inter-device wirings 20. The conversion connectors 62 on the output side connect between the output connectors l2of the conduction checker and the outout connectors 22 of the inter-device wirings I, I, The conversion connectors 61 on the input side has a connector part on one side haviLg rn-terminals for connecting rn-terminals of the input connectors 11 and also a connector part on the other side having n-terminals for connecting n-terminals of the input connectors 21. A plurality of kinds of the conversion connectors 61 and 62 are prepared to have the number of terminals are different between input and output corresponding to the inter-device wirings 20 expected to be the test target 2, The worker can connect; the connectors selectively using the conversion connectors 61 ane 52 of corresponding types "hen the number and type of the connectors are different between the conduction checker side and the inter--device wirings 20 side. In this manner, according to the second embodiment, various kinds of the inter-device wirings 20 can be easily connected to the conduction checker apparatus and thus commodity of the test function of-the conduction checker apparatus can be increased. In the same manner as the first embodiment, the second embodiment can surely achieve conduction check and inspection with a short time and small burden.

[Conversion Connector] FIG. 15 illustrates a configuration example of the conversion connectors 61 on the input side. Although not illustrated, the conversion connectors 62 on the output side have the same configuration. In the conversion connectors 61, a connector part 611 on the conduction checker apparatus side on one end has rn-terminals, and a connector part 612 on the inter-device wiring conne ction on the other end has nterminals. Among the rn-terminals oil the connector part 611 of the conversion connectors 61, input/output electronic connection is ensured regarding the n-terminal of the connector part 612 and in.nut/output electronic coni...ection is not ensured regarding the other (rn-n) -terminals.

In (a) in FIG. 15, as to the conversion connectors 61 of a first kind, the relationship of the numbers of terminals of input and output is m nI. In (b) in. FIG. 15, as to the conversion connectors 61 of a second kind, the relationship of the numbers of terminals of input and output is m n2, In the same manner, as to the conversion connectors 61 of a third kind not illustrated, the relationship of the numbers of terminals of input and output is in n3. In the relationships. ml c n2 c n3 c m. The kinds are not limited to these three and thus a plurality of kinds of the conversion connectors 61 are prepared. The same goes to the conversion connectors 62 on. the output side.

The numbers of terminals (m, n) are, as specific examples, m =36 and i-i = 8. In this case, the input connectors 11 and the test target 12 are 36-pin connectors. The input connectors 21 and the output connectors 22 of the inter-device wirings 20 are connectors having terminals of eight wires 25 are collectively accommodated and connected. The conversion connectors 61 and 62 used Itere.has the relationship of their terminals to be 36 8.

When the number of terminalsn of the input connectors 21 of 16 the inter-device wirings 20 of the test target 2 is nl for example, the worker selects and uses a first kind of the conversion connectors 61 corresponding to ni. When the number of terminals n of the input connectors 21 is n2, the worker selects and uses a second kind of the conversion connectors 61 corresponding to ri2.

The operation flow of the second embodiment is schematically the same as that in FIG. 4. Upon the work of 81, the worker connects the input connectors 21 and the output connectors 22 of the plurality of wires 25 of the inter-device wirings 20 between the input connectors 11 and the output connectors 12 of the conduction check apparatus interposing the conversion connectors 61 and 62 of the kinds corresponding to the terminal numbers (in, n) The worker connects the connector part 611 having the m-terminal of the conversion connectors 61 to the input connectors 11 having m-terminals -The types of male and female of the terminals are opposite. In addition, the worker connects the input connectors 21 having n-terminals of the inter-device wirings 20 to the connector part 612 having nterminals of the conversion connectors 61. The types of male and female are opposite. The worker also connects the output connectors 12, conversion connectors 52, and the output connectors 22:r t-e same wanner Upon the test of -S4, in the same manner as the first embodiment, the signalc2 is inputted to the rn-terminals of the output connectors 12 from the signal transceiving circuit ill. Through the n-terminals from the upper side of the conversion connectors 62, the signal c2 is inputted to n-terminals of th.e output connectors 22 of ti-ic inter-device wirings 20. Then, via the inter-device wirings 20, the signal c3 is inputted from the n-terminals of the input connectors 21, and the signal c3 is outputted from n-terminals from the upper side of the rn--terminals of the input connectors ii.

Note that the other part than-*the n-terminals of the rn--terminals, the signal c2 of ON or OFF may be or may not be inputted. In both cases, from the rn-nodes c-f tne j.rnerna circut 41 on the input side, at least -the signal c3 of ON or OFF is obtained for the terminals of the upper side. Regarding the other (rn-n) -terminals, the signal c3 of OFF is automatically outputted or no signal is outputted.

[Plurality of Wirings] With reference to FIG. 16 and 17, an example of testing the plurality of inter-device wirings 20 according to the second embodiment will be described.. In the second embodiment, by virtue of the configuration including the conversion connectors 61 and 62, when the input side and the output side of inter-device wirings 20 are divided into a plurality of parts, or a plurality of different kinds of.. inter-device wirings 20 are present, it is possible to flexibly respond to the situations and the test can be performed.

In this case, in the second embodiment, basically, while suitable ones the conversion connectors 61 and 62 are used per one inter-device wiring 20 or a part of the inter-device wirings 20, the test is performed in the same procedure as the first embodiment, In this manner, in the second embodiment, the plurality of test AO* at maps d11 ate tespectiveLy created ax*d results of eornparisons r:t the itter-4e4ce irIng i: dl an 2t P St PIG. 16 illustrates an example in whidh, aa A oofthéótie±i state of the itit -aetoe trins 20 o the teat target 2 in the second embodiment,, the oztput side of the inter"evIce wirings 20: is div ded jj:.0 a p1urJ4:y of p,ts s $flc4' two Pftt The inter-4evicó wirings i4' in FtC. 16 â±é divided ito fiBt inttt-aenae:dt 2ca td thtet-devias w±ri9s 2Gb. The input connect*rs 22. * the inter-4Mrice wirings 20 are ommo wiUt e: lint intrdevice wIrings 20a and the second inter-device *ifltqE:;Lé:t. to the ippue; &"tea'tam ii tM thee tcnversion cbzmectors 61. As th the: input c:onnectors 21.., one input device 3A j expSte4 to be a ou n-destMibia 4evice,, ,,e n of termina.a of the jnpt connectcrs 21 is, for exa"ie, IL fl.

me output a&def the tnter-devicewir±rxs 20 is divided Into tS output cozrnectczs a ot the f4ist ite-dvice' s4dag 2Oa e..4 the output conneaorEflb Of the S&'&id iIftéid#fldE" iTh'W 2Ob A first output device B is expected as a cotmectica-destinat ton 4evie to the first output connectors 22a of the inSr'dèvtce witgs tZUt. The tenna2 *wmtn a o' the output connectors fla is, for ::"ie 3 a titpttt detSe 3B a expected as a :oection-destination deflce to the output connactors 2b ol the çond wLrings 2. me it,r t!ø egup co,,netha, 22k is, r example, i'.

The $J":iitrof wires 25 of the tnter-,desrice tdags 2;O ace tfleted so that th can be accommc4atd' àj±iredted a 4ermined' nuttier of connectors. tèrmináls, on the input side ol.

the three wires 25 of the first inter-device wirings 20a are 3Q tE'netted to t'ee tetSsZs with the terminal numbers ot 1" to W3ff fxtcrn the zpper side a the In oecipra n. tie terini ala n, the OUtpiL:t $4 tthc W*:,!S 25 q the inter-device wiri±igs 20a are connected to the output connectors 22a. The terminals on the input side of the ten wires 25 of the second inter-device wirings 2Db are connected to ten terminals trot, the terminal nurrbr "4" to "n" (n = 13) from the upper side of the input connectors 21, The terminals on the output side of the ten wires 25 of the second inter-device wirings 2Db are connected to ten terminals of the output connectors 22b, In the above--described manner, the output side of the inter-device wirings 20 is divided into two parts. Thus, the worker and the conduction check apparatus perform, for example, connecting sequentially in the order of, for example, the first inter-device wirings 20a and then the second inter-device wirings 2Db and tests thereon. Note that, for example, an ID of the first inter-device wirings 20a is managed as "1001" and an ID of the second inter--device wirings 2Db is managed as "1002" First, to test on the first inter-device wirings 20a, the worker connects the input connector 21 having 13 terminals on the input side of te-.inter-device wirings 20 to the input connectors 11 via the conversion connector 61. Then, the worker connects the output connectors 22a of the inter--device wirings 20a to the output connectors 12 via the first conversion connector 62a, A relationship of the input and output terminals of the first conversion connectors 62a is 3 m. In this connection state, the conduction check apparatus executes a first test targeting the first inter--device wirings 20a. In this manner, the first test result map d12 like FIG. 17A is created.

After finishing the first test, to test on the second inter-device wirings 2Db next, the worker pulls off the output connector 22a of the first inter-device wirings 20a from the output connectors 12 leaving the input connectors 11, the conversion connectors 61, and the input connectors 21 as they are. Then, the worker connects the output connectors 22b of the second inter-device -4Th wirings 20b to the output connectors 12 via the second conversion connectors 62b. A relationship of the input and output terminals or the second. co'-yverqaon connectors 62h 15 iD m In this connection state, the conduction check anparatus executes a second test targeting the second inter-device wirings 2Gb. In this manner, the second test result trap dlz like FIG 17E described below is created Note that the contents of the inter-device wiring list dl to be original include information of the first inter-device wirings 20a and information of the second inter-device wirings 2Gb, The first test result map dl2 and the first correct map dll corresponding to the first test result map d12 are managed being associated with the inter-device wiring list dl or information of ID of the first inter-device wirings 20a, and with information of the first connection--destination device, etc. The second test result map dl2 and the second correct map dli corresponding to the second test result map d12 are managed being associated with the inter-device w±rng list dl or ID information of the second inter-device wirings 2Gb, and with information of the second connection-destination device.

[Test Result Map] FIG. l7A illustrates the first test result map dl2 corresponding to the example of FiG. 16. Based on result data dl3 by the test of the first inter-device wirings 20a, to a column of three terminals on the output side of thefirst test result map dl2, symbols corresponding to the signal c3 of ON or OFF are stored in lines of three terminals from the terminal numbers "1" to "3" from the upper side of the rn-terminals on the input side. Since there is no corresponding data in the other terminals' lines, the symbol "0" corresponding to OFF is stored or deleted.

FIG. 17E illustrates the second test result map dl2 corresponding to the example of FIG. 16. Based on the result data 13 by the test of the second inter-device wirings 2Gb, to a column -49.

of ten terminals on the output side of the second test result map d12, in a line of ten terminal-s of the terminal numbers "4" to "rn" of the rn-terminals on the input side, symbols corresponding to the signal c3 of ON or OFF are stored. Since there is no corresponding data in the other terminals' lines, the symbol "0" corresponding to OFF as stores or deleted Note that, while the example in which the output side of the inter-device wirings 20 is divided into two has been described, the test is possible in an example of dividing into three or more. In addition, the test is possible in an example in which the input side of the inter-device wirings 20 is divided into a plurality of parts.

Further, the plurality of test result maps d12 and the plurality of correct maps dil may be managed being integrated as one, respectively.

[identification of a Plurality of Wirings] Further, when there are a plurality of the inter-device wirings 20 and parts thereof to be the test target 2 like the example described above, upon the work by the worker, the possibility of mistakes of the inter-device wirings 20 and connection of the wirings is increased. Thus, in the second embodiment, a system such that, to each of the inter--device wirings 20 or a part of the inter-device wirings 20, identification information such as an inter-device wiring ID, connection--destination device It) etc. are issued and applied to process them electronically.

In the example of FIG. 15, the first inter-device wirings 20a is applied with an inter-device wiring ID "1001" and the second inter-device wiring 2Gb is applied wit-h an inter-device wiring ID "1002". The inter-device wiring ID is managed being associated with the inter-device wiring list dl. The inter-device wiring list dl 3-0 in FIG. 8 is an example of one inter-device wiring 20 with an inter-device wiring ID "001" . Note that item of the inter-device wiring ID may be provided in the table of the inter-device wiring list dl. In the same manner, apluralityof the inter-device wiring lists di are managed with ti.ie inter-device wiring IDs, in adc.ition, an TO of a connec'tlon-destinat3on device scn as the output device 33 may he applied to each of the plurality of inter-device wirings 20 to process electronically. For example, in the table fr. FIG. 8, the connection-destination device ID may be stored in the connection-destination name of U, in the example cf FiG, 16, an ID of the first output device 33 tc which the output connectors 22a of the first inter-device wirings 20a are connected and an ID of the output device 33 to which the output connectors 22b of the inter-device wirings 2Db are connected are managed.

As described above, in the second embodiment, the inter-device wiring ms and the connection-destination device lOs are issued and applied and the identification information is displayed as one piece of information of the screen. For example, in the screen of FIG. 12, the inter-device wiring ID may be displayed in the item gi and the inter-device wiring ID may be displayed in information of mismatched portion of the ±tem g2, In addition, a plurality of inter-device wiring ID may be displayed as a list of the test target 2 to be selectable on the screen.

In more details, before the inspection, each of the plurality of inter-device wirings 20 is applied with the inter-device wiring ID etc. The computer 1 issues a value of the inter-device wiring ID per the inter-device wiring 20 and associate the value with the inter-device wiring list dl to manage the same. The work of issuing IDs can be done as a work of setting to the computer 1 by a worker or a work of a part of information input of the inter-device wiring list dl of S2 in FIG, 4, Here, values of the IDs may he directly decided by the worker or autowatically decided by the conduction check apparatus Tn adtht'ion, pcr the sntLz-oeilcL w±nng 20, information containing the inter-device wiring ID is physically applied. For example, per the inter-device wiring 20, a sticker on which information containing the interdevice wiring ID is barcoded and printed or else is applied.

The conduction check apparatus according to the second embodiment includes a reader 105 that is a device connected. to the computer 1 and having a function of reading harcodes. The reader is need for reading information such as IDe related to the test of the inter-device wirings 20 The reader 105 reads harcodes applied to the wires 25 of the inter-device wirings 20 and their connectors etc. in addition, the reader 105 may be a reader/writer having a function of writing harcodes by printing or else.

Upon the inspection, the worker touches the reader J05 on a barcode applied to the target inter -device wiring 20 so that the reader 105 reads information containing an ID of a barcode. The coirLutex 1 inputs nfonation contalnn2 the ID Cf the harccde which having been read. The control unit 10 reads the inter-device wiring list dl associated with the ID from the design DP 52, The control unit 10 uses the ID and the inter-device wiring list dl as information for identifying and specifying the inter-device wirings 20 of the test target 2.

After specifying the inter-device wirings 20 of the test target 2 by the IDe and the inter--device wiring list di, the worker can test the i:nter--dev:tce wirings 20 of the test target 2 only by operation of execution instruction of the test. In the second embodiment the work of 52 in FIG. 4 is eased and thus operations such as manually specifying the inter-device wiring list dl are not needed.

[Effects etc.] According to the method of conduction check and device of the second embodiment, in addition to the effects same as the first embodiment, when there are a plurality of the inter-device wirings of the test target 2 or parts thereof are present, mistakes in the works of conduction check and inspection by a worker can be reduced and thus work can be more efficient. Mistakes like mistaking wrong inter-device wiring 20 of the test target 2 can be prevented.

In the foregoing, the invention made by the inventors of the present invention has been concretely described based on the embodiments. However.., it is needless to say that the present invention is riot limited to the foregoing embodiments and various modifications and alterations can be made within the scope of the present invention.