GB2449749B - Virtual address to physical address translation with support for page attributes - Google Patents

Virtual address to physical address translation with support for page attributes

Info

Publication number
GB2449749B
GB2449749B GB0809264A GB0809264A GB2449749B GB 2449749 B GB2449749 B GB 2449749B GB 0809264 A GB0809264 A GB 0809264A GB 0809264 A GB0809264 A GB 0809264A GB 2449749 B GB2449749 B GB 2449749B
Authority
GB
United Kingdom
Prior art keywords
support
page attributes
physical address
virtual address
address translation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB0809264A
Other languages
English (en)
Other versions
GB2449749A (en
GB0809264D0 (en
Inventor
Ohad Falik
Ben-Zion Friedman
Jacob D Doweck
Eliezer Weissmann
James B Crossland
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of GB0809264D0 publication Critical patent/GB0809264D0/en
Publication of GB2449749A publication Critical patent/GB2449749A/en
Application granted granted Critical
Publication of GB2449749B publication Critical patent/GB2449749B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1009—Address translation using page tables, e.g. page table structures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/342—Extension of operand address space
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/50—Control mechanisms for virtual memory, cache or TLB
    • G06F2212/507—Control mechanisms for virtual memory, cache or TLB using speculative control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/657—Virtual address space management
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/68—Details of translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/68—Details of translation look-aside buffer [TLB]
    • G06F2212/684—TLB miss handling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Executing Machine-Instructions (AREA)
GB0809264A 2007-06-01 2008-05-22 Virtual address to physical address translation with support for page attributes Active GB2449749B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/757,103 US8799620B2 (en) 2007-06-01 2007-06-01 Linear to physical address translation with support for page attributes

Publications (3)

Publication Number Publication Date
GB0809264D0 GB0809264D0 (en) 2008-06-25
GB2449749A GB2449749A (en) 2008-12-03
GB2449749B true GB2449749B (en) 2010-03-03

Family

ID=39596288

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0809264A Active GB2449749B (en) 2007-06-01 2008-05-22 Virtual address to physical address translation with support for page attributes

Country Status (5)

Country Link
US (7) US8799620B2 (enExample)
JP (5) JP2008299844A (enExample)
CN (2) CN102789429B (enExample)
DE (1) DE102008025476A1 (enExample)
GB (1) GB2449749B (enExample)

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US10713177B2 (en) 2016-09-09 2020-07-14 Intel Corporation Defining virtualized page attributes based on guest page attributes
US10324857B2 (en) * 2017-01-26 2019-06-18 Intel Corporation Linear memory address transformation and management
CN108132894B (zh) * 2017-12-23 2021-11-30 天津国芯科技有限公司 一种cpu中tlb多命中异常的定位装置及方法
US10997083B2 (en) * 2018-09-04 2021-05-04 Arm Limited Parallel page table entry access when performing address translations
US11954026B1 (en) * 2018-09-18 2024-04-09 Advanced Micro Devices, Inc. Paging hierarchies for extended page tables and extended page attributes
CN109918131B (zh) * 2019-03-11 2021-04-30 中电海康无锡科技有限公司 一种基于非阻塞指令cache的指令读取方法
US10877788B2 (en) 2019-03-12 2020-12-29 Intel Corporation Processing vectorized guest physical address translation instructions
KR102400977B1 (ko) * 2020-05-29 2022-05-25 성균관대학교산학협력단 프로세서를 통한 페이지 폴트 처리 방법
CN116662224A (zh) * 2022-02-17 2023-08-29 华为技术有限公司 内存访问的方法、装置、存储介质及计算机程序产品

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Also Published As

Publication number Publication date
JP6567618B2 (ja) 2019-08-28
US20220050791A1 (en) 2022-02-17
US8799620B2 (en) 2014-08-05
DE102008025476A1 (de) 2008-12-18
US20140304488A1 (en) 2014-10-09
US20140351553A1 (en) 2014-11-27
JP2008299844A (ja) 2008-12-11
JP2012123814A (ja) 2012-06-28
US20140351554A1 (en) 2014-11-27
CN102789429A (zh) 2012-11-21
US20080301398A1 (en) 2008-12-04
US20160041921A1 (en) 2016-02-11
US9158703B2 (en) 2015-10-13
US11074191B2 (en) 2021-07-27
US9164916B2 (en) 2015-10-20
JP2016066372A (ja) 2016-04-28
GB2449749A (en) 2008-12-03
US20180060246A1 (en) 2018-03-01
JP2014067445A (ja) 2014-04-17
CN101315614A (zh) 2008-12-03
CN102789429B (zh) 2016-06-22
GB0809264D0 (en) 2008-06-25
US9164917B2 (en) 2015-10-20
CN101315614B (zh) 2012-07-04
JP2018022508A (ja) 2018-02-08
JP5855632B2 (ja) 2016-02-09
JP6212102B2 (ja) 2017-10-11

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