GB2409347A - Memory card - Google Patents

Memory card Download PDF

Info

Publication number
GB2409347A
GB2409347A GB0329029A GB0329029A GB2409347A GB 2409347 A GB2409347 A GB 2409347A GB 0329029 A GB0329029 A GB 0329029A GB 0329029 A GB0329029 A GB 0329029A GB 2409347 A GB2409347 A GB 2409347A
Authority
GB
United Kingdom
Prior art keywords
substrate
memory card
holes
heat sink
filled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB0329029A
Other versions
GB0329029D0 (en
Inventor
Jackson Hsieh
Jichen Wu
Abnet Chen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kingpak Technology Inc
Original Assignee
Kingpak Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to DE20319173U priority Critical patent/DE20319173U1/en
Application filed by Kingpak Technology Inc filed Critical Kingpak Technology Inc
Priority to GB0329029A priority patent/GB2409347A/en
Publication of GB0329029D0 publication Critical patent/GB0329029D0/en
Publication of GB2409347A publication Critical patent/GB2409347A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/056—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an organic insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/117—Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04—Assemblies of printed circuits
    • H05K2201/043—Stacked PCBs with their backs attached to each other without electrical connection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15—Position of the PCB during processing
    • H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components

Abstract

A small memory card (for an electrical device) comprises a first substrate 20 and a second substrate 24, each having an upper and a lower surface. The upper surface 32 of the first substrate and the lower surface 50 of the second substrate each comprise a plurality of contacts 36, 52, and a plurality of through holes 40, 54, which are filled with a metal 42. The upper surface of the first substrate also includes a plurality of gold fingers 38 which are in electrical contact with the contacts. A heat sink 22 is provided having a top surface 44 which is mounted to the lower surface of the first substrate and a bottom surface 46 which is mounted to the upper surface of the second substrate. At least one memory chip is mounted on the upper surface of the first substrate, and at least one memory chip is mounted on the lower surface of the second substrate, with each memory chip being encapsulated by a glue layer 30.

Description

SMALL MEMORY CARD
BACKGROUND OF THE INVENTION
Field of the invention
The present invention relates to a small memory card, and in particular to a small memory card that has a long lifetime and high durability.
Description of the Related Art
The prior method for producing a general memory card always packs chips to single integrated circuit, then mounts the IC onto a printed circuit board by the way of surface mount technique (SMT). The chip may be a memory element, such (it as flashmemory. The golden fingers mounted on the printed circuit board for inserting into a slot of a computer main- board. In addition to some passive elements such as resistance, capacitor and inductor are mounted on the memory card.
Referring to FIG I showing a side schematic illustrate of a prior memory card, the golden finger 15 is used to insert into a slot of a computer main-board, there are active elements and passive elements on the module card, the active elements usually are packed to an integrated circuit 11. Each integrated circuit 11 encapsulates a chip 12, the chip 12 may be a memory chip, for example a flash memory chip. The pins 13 of integrated circuit 11 are mounted on the printed circuit board 14 of the memory card by SMT, the printed circuit board 14 has a solder point 17 connected to pin 13. The prior arts has the following disadvantages: ]. A chip 12 must be packed then mounted on the circuit board 14, so more steps is unnecessary leads to the cost in manufacturing and packing will be increased.
2. A memory card always includes many ICs so that the integrated circuit 11 must be mounted on the PCB 14 one by one during manufacturing the module card.
3. The cost of SMT is expensive. Special manufacture devices such as a SMT machine and a solder furnace will extra the cost of equipment.
4. The memory card is manufactured separately so that the throughput is low.
5. As a result of integrated circuit 11 cannot be dispersed heat effectively, therefore the quality and durability of the small memory card is not excellent.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a small memory card may be manufactured conveniently, the manufacturing processes may be simplified and the manufacturing cost may decreased.
Another object of the present invention is to provide a small memory card having high function of disperse heat to promote its durability and lifetime effectively.
To achieve the above-mentioned object, the present invention includes a first substrate, a heat sink, and a second substrate, at least one upper memory chip, at least one bottom memory chip, and a glue layer. The first substrate has an upper surface and a lower surface, a plurality of the connected points, a plurality of golden fingers are formed on the upper surface of the substrate connected electrically the plurality of connected points and a plurality of the through hole penetrate upper surface to lower surface, and the through hole be filled with metals, the heat sink has a top surface and a bottom surface, the top surface is formed on the lower surface of the first substrate contact with the metals which are filled within the plurality of through holes of the substrate, the second substrate has an upper surface and a lower surface, the lower surface formed a plurality of connected points and a plurality of through holes penetrate upper surface to lower surface, and the through holes filled with metals, the upper surface of the second substrate is mounted on the bottom surface of the heat sink, and the metals which are filled within the plurality of through holes contact with the heat sink, the upper memory chip is arranged on the upper surface of the first substrate and connected electrically to connected points of the first substrate by way of coating manner, the bottom memory chip is arranged on the lower surface of the second surface and connected electrically to connected points of the second substrate, and the glue layer coated the upper surface of the first substrate and the lower surface of the second substrate for encapsulating each of the up memory chips and bottom memory chips at the same time.
According to one aspect of the present invention, the heat of the upper memory chip and bottom memory chip may be traveled to the heat sink via the metal, which are filled within the plurality of through holes. Therefore, proving the durability and dependability of the small memory card.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a schematic illustrate showing a conventional small memory card structure.
FIG 2 is the first schematic illustrates showing a small memory card structure of the present invention.
FIG 3 is the second schematic illustrates showing a small memory card structure of the present invention.
FIG 4 is the third schematic illustrates showing a small memory card structure of the present invention.
DETAILED DESCRIPTION OF THE INVENTION
FIG2, FIGS, and FIG4 are the schematic illustrates showing a small memory card structure of the present invention, which include a first substrate 20, a heat sink 22, a second substrate 24, at least one upper memory chip 26, at least one bottom memory chip 28 and a glue layer 30.
The first substrate 20 has an upper surface 32 and a lower surface 34, the upper surface 32 formed with a plurality of contact points, 36 and a plurality of golden fingers 38 are electrically connected to a plurality of connected points 36, and a plurality of through holes 40 penetrate upper surface 32 to lower surface 34, the through holes 40 are filled metals 42, the metal 42 may be copper, the first substrate 20 is used to arrange in an electric device for electrically connecting the golden finger 38 to this electric device.
The heat sink 22 is made of copper or aluminum, formed a top surface 44 and a bottom surface 46, the top surface 44 is mounted on the lower surface 34 of the first substrate 20 and Contacted with the metal 42 which is filled within a plurality of through holes 40 of the first substrate 20.
The second substrate 24 has an upper surface 48 and a lower surface 50, the lower surface 50 fonned a plurality of connected points 52 and a plurality of through holes 54 penetrate upper surface 48 to lower surface 50, and the through holes 54 filled with metal 42, the upper surface 48 of the second substrate 24 is mounted on the bottom surface 46 of the heat sink 22, and the metal 42 which is filled within the through holes 54 contacted with heat sink 22.
In the embodiment comprise two upper memory chips 26 are mounted on the upper surface 32 of the first substrate 20 connected electrically to the connected points 52 of the first substrate 20 via golden ball 56 by filledcehip manner.
In the embodiment comprise two bottom memory chips 28 are mounted on the lower surface 50 of the second substrate 24 connected electrically to the connected points 52 of the second substrate 24 via golden ball by filledchip manner.
Glue layer 26 coated the upper surface 32 of the first substrate 20 and the lower surface 50 of the second substrate 24 for encapsulating two up memory chips 20 and two bottom memory chips 28 at the same time.
Therefore, the small memory card of the present invention has the following advantages.
1. Since the heat of the upper memory chip 26 may be traveled to the heat sink 22 via the metal 42 which is filled within the through hole of the first substrate 20, the heat can be rapidly spread out through heat sink 22, and the heat of the bottom memory chip 28 may be traveled to the heat sink via the metal 42 which is filled within the through hole 54 of the second substrate 24, the heat can be rapidly spread out through heat sink 22, so that, proving the durability and dependability of the small memory card.
2. Since the upper memory chip 26 is arranged on the upper surface 32 of the first substrate 20, and the bottom memory chip 28 is arranged on the lower surface 50 of the second substrate 24, then, the glue layer 30 coated every upper memory chips 26 and every bottom memory chips 28. So as to the manufacturing processes can be simplified, and the manufacturing costs also can be lowered.
While the invention has been described by way of an example and in terms of a preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiment. To the contrary, it is intended to cover various modifications. Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications.

Claims (4)

  1. WHAT IS CLAIMED IS: 1. A small memory card to be set in an electric
    device, comprising: A first substrate having an upper surface and a lower surface, the upper surface formed with a plurality of connected points, a plurality of golden fingers electrically connected to the plurality of connected points, and a plurality of through holes penetrate the upper surface to the lower surface of the substrate, and the through holes being filled with metals, the first substrate is used to set in the electric device for electrically connecting the electric device to the golden finger; A heat sink having a top surface and a bottom surface, the top surface being arranged under the lower surface of the first substrate, and being contacted with the metals, which is filled to the through holes; A second substrate having an upper surface and a lower surface, the lower surface formed with a plurality of connected points and a plurality of through holes penetrate upper surface to lower surface of the substrate, and the through holes being filled with metals, the upper surface of the second substrate being arranged under the bottom surface of the heat sink, and the metal in the through holes contact with the heat sink; At least one upper memory chip being mounted on the upper surface of the first substrate, and electrically connected to the connected points of the first substrate by flled-chip manner; At least one bottom memory chip being mounted on the lower surface of the second substrate, and electrically connected to the connected points of the second substrate by coating manner; A glue layer being coated the upper surface of the first substrate and the lower surface of the second substrate for encapsulating the each of the top memory chips and bottom memory chips.
  2. 2. The small memory card according to claim 1, wherein the metal filled with the each of through hole of the first substrate is copper.
  3. 3. The small memory card according to claim 1, wherein the metal filled with the each of through hole of the second substrate is copper.
  4. 4. the small memory card according to claim 1, wherein the heat sink is made of copper or aluminum.
GB0329029A 2003-12-10 2003-12-15 Memory card Withdrawn GB2409347A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE20319173U DE20319173U1 (en) 2003-12-10 2003-12-10 Small memory card
GB0329029A GB2409347A (en) 2003-12-10 2003-12-15 Memory card

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE20319173U DE20319173U1 (en) 2003-12-10 2003-12-10 Small memory card
GB0329029A GB2409347A (en) 2003-12-10 2003-12-15 Memory card

Publications (2)

Publication Number Publication Date
GB0329029D0 GB0329029D0 (en) 2004-01-14
GB2409347A true GB2409347A (en) 2005-06-22

Family

ID=34796590

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0329029A Withdrawn GB2409347A (en) 2003-12-10 2003-12-15 Memory card

Country Status (2)

Country Link
DE (1) DE20319173U1 (en)
GB (1) GB2409347A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4478007B2 (en) * 2004-12-16 2010-06-09 日立オートモティブシステムズ株式会社 Electronic circuit device and manufacturing method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5239198A (en) * 1989-09-06 1993-08-24 Motorola, Inc. Overmolded semiconductor device having solder ball and edge lead connective structure
US5563773A (en) * 1991-11-15 1996-10-08 Kabushiki Kaisha Toshiba Semiconductor module having multiple insulation and wiring layers
US6472741B1 (en) * 2001-07-14 2002-10-29 Siliconware Precision Industries Co., Ltd. Thermally-enhanced stacked-die ball grid array semiconductor package and method of fabricating the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5239198A (en) * 1989-09-06 1993-08-24 Motorola, Inc. Overmolded semiconductor device having solder ball and edge lead connective structure
US5563773A (en) * 1991-11-15 1996-10-08 Kabushiki Kaisha Toshiba Semiconductor module having multiple insulation and wiring layers
US6472741B1 (en) * 2001-07-14 2002-10-29 Siliconware Precision Industries Co., Ltd. Thermally-enhanced stacked-die ball grid array semiconductor package and method of fabricating the same

Also Published As

Publication number Publication date
DE20319173U1 (en) 2004-03-11
GB0329029D0 (en) 2004-01-14

Similar Documents

Publication Publication Date Title
US6720649B2 (en) Semiconductor package with heat dissipating structure
US6313998B1 (en) Circuit board assembly having a three dimensional array of integrated circuit packages
KR950021447A (en) Semiconductor device and manufacturing method thereof
US7023085B2 (en) Semiconductor package structure with reduced parasite capacitance and method of fabricating the same
US6910637B2 (en) Stacked small memory card
JP2001085602A (en) Multi-chip semiconductor module and manufacturing method thereof
US6320249B1 (en) Multiple line grids incorporating therein circuit elements
US20070013079A1 (en) Die pad arrangement and bumpless chip package applying the same
US7126219B2 (en) Small memory card
US20050078457A1 (en) Small memory card
US7310224B2 (en) Electronic apparatus with thermal module
KR100623867B1 (en) Semiconductor PCB layout method
US6565008B2 (en) Module card and a method for manufacturing the same
JP2544976B2 (en) Semiconductor integrated circuit module
GB2409347A (en) Memory card
JP2005166892A (en) Stack type small-sized memory card
GB2409346A (en) Stacked memory card
US20060006533A1 (en) Motherboard structure for preventing short circuit
US20010040297A1 (en) Multiple line grid for use in a packaging of a testing application
KR100367729B1 (en) Multiple line grid array package
US20050077620A1 (en) Miniaturized small memory card structure
US20040159925A1 (en) Semiconductor device and method for manufacture thereof
KR0163868B1 (en) Down set pcb and mounting module
JP2005166891A (en) Small-sized memory card
KR100678229B1 (en) Side-mounting type ballgrid array package and method for manufacturing thereof

Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)