GB2371146A - Dual damascene interconnect between conducting layers of integrated circuit - Google Patents

Dual damascene interconnect between conducting layers of integrated circuit Download PDF

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Publication number
GB2371146A
GB2371146A GB0121198A GB0121198A GB2371146A GB 2371146 A GB2371146 A GB 2371146A GB 0121198 A GB0121198 A GB 0121198A GB 0121198 A GB0121198 A GB 0121198A GB 2371146 A GB2371146 A GB 2371146A
Authority
GB
United Kingdom
Prior art keywords
layer
conductive member
level
conductive
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB0121198A
Other languages
English (en)
Other versions
GB0121198D0 (en
Inventor
Richardson O Adebanjo
Yifeng Winston Yan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Agere Systems LLC
Original Assignee
Agere Systems Guardian Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agere Systems Guardian Corp filed Critical Agere Systems Guardian Corp
Publication of GB0121198D0 publication Critical patent/GB0121198D0/en
Publication of GB2371146A publication Critical patent/GB2371146A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Layout of the interconnection structure
    • H01L23/5283—Cross-sectional geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
GB0121198A 2000-08-31 2001-08-31 Dual damascene interconnect between conducting layers of integrated circuit Withdrawn GB2371146A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US65244900A 2000-08-31 2000-08-31

Publications (2)

Publication Number Publication Date
GB0121198D0 GB0121198D0 (en) 2001-10-24
GB2371146A true GB2371146A (en) 2002-07-17

Family

ID=24616872

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0121198A Withdrawn GB2371146A (en) 2000-08-31 2001-08-31 Dual damascene interconnect between conducting layers of integrated circuit

Country Status (3)

Country Link
JP (1) JP2002164430A (enrdf_load_html_response)
KR (1) KR20020018610A (enrdf_load_html_response)
GB (1) GB2371146A (enrdf_load_html_response)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8674404B2 (en) 2006-01-13 2014-03-18 Micron Technology, Inc. Additional metal routing in semiconductor devices

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100505682B1 (ko) * 2003-04-03 2005-08-03 삼성전자주식회사 금속-절연체-금속 커패시터를 포함하는 이중 다마신 배선구조 및 그 제조방법

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5693563A (en) * 1996-07-15 1997-12-02 Chartered Semiconductor Manufacturing Pte Ltd. Etch stop for copper damascene process
FR2754391A1 (fr) * 1996-10-08 1998-04-10 Sgs Thomson Microelectronics Structure de contact a facteur de forme eleve pour circuits integres
US6028362A (en) * 1997-05-12 2000-02-22 Yamaha Corporation Damascene wiring with flat surface
GB2345791A (en) * 1999-01-12 2000-07-19 Nec Corp Interconnect having intermediate film functioning as etch stop and barrier film
US6100190A (en) * 1998-02-19 2000-08-08 Rohm Co., Ltd. Method of fabricating semiconductor device, and semiconductor device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5693563A (en) * 1996-07-15 1997-12-02 Chartered Semiconductor Manufacturing Pte Ltd. Etch stop for copper damascene process
FR2754391A1 (fr) * 1996-10-08 1998-04-10 Sgs Thomson Microelectronics Structure de contact a facteur de forme eleve pour circuits integres
US6239025B1 (en) * 1996-10-08 2001-05-29 Sgs-Thomson Microelectronics S.A. High aspect ratio contact structure for use in integrated circuits
US6028362A (en) * 1997-05-12 2000-02-22 Yamaha Corporation Damascene wiring with flat surface
US6100190A (en) * 1998-02-19 2000-08-08 Rohm Co., Ltd. Method of fabricating semiconductor device, and semiconductor device
GB2345791A (en) * 1999-01-12 2000-07-19 Nec Corp Interconnect having intermediate film functioning as etch stop and barrier film

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8674404B2 (en) 2006-01-13 2014-03-18 Micron Technology, Inc. Additional metal routing in semiconductor devices

Also Published As

Publication number Publication date
GB0121198D0 (en) 2001-10-24
KR20020018610A (ko) 2002-03-08
JP2002164430A (ja) 2002-06-07

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)