GB2356286A

GB2356286A - Transistor with highly doped collector region to reduce noise when used as an amplifier

Info

Publication number: GB2356286A
Application number: GB9915855A
Authority: GB
Inventors: James Rodger Leitch
Original assignee: Individual
Current assignee: Individual
Priority date: 1999-07-07
Filing date: 1999-07-07
Publication date: 2001-05-16
Anticipated expiration: 2019-07-07
Also published as: GB2356286B; GB9915855D0

Abstract

A bipolar junction transistor (BJT) contains a highly doped n<SP>++</SP> region in the collector adjacent to the base. This region has the effect of reducing noise, such as shot noise and 1/f or flicker noise when the transistor is operating as an amplifier. Preferably, this highly doped region is connected to an external capacitor.

Description

2356286 Object This is a proposal for reducing the noise level in

semiconductor devices, by modifying the active profiles in the silicon structure. The solution to this problem should not have an adverse effect on the high frequency capabilities of the active structure, and should be compatible with current fabrication technologies for VLSI ICs.

Scope The introduction of such a semiconductor device would have a general impact on electronic signal processing applications, in pushing back the threshold of usefulness of a broad range of electronic amplifiers and current sources etc. made from this form of transistor. In particular signal amplifiers and active functions operating at low current densities.

This would enable the detection of lower signal levels by improving the signal to noise ratio, and also would have general applicability in detection, oscillator or demodulation systems.

The ability to produce a spectrally pure oscillation is limited by the phase error introduced by noise in the active oscillator circuits, and so this proposal could have a considerable reduction in phase noise or jitter.

This ability would mean the device bias currents could be reduced to achieve the same levels of noise.

Areas of application would be primarily in analogue applications including communications, and in analogue to digital encoders and decoders for digital signal processing applications.

Background

The performance of semiconductor devices is governed by the physics of their construction.

The main factors causing noise are the temperature of the semiconductor, and the dynamics of the carrier transport mechanisms in the silicon, as well as imperfections in the manufacture.

The main mechanisms considered here are thermal, and shot noise mechanisms, although high f frequency noise will be mentioned to provide completeness.

This document describes the main mechanisms that defines the proposed structure, and identifies the areas considered to be innovative and worthy of patent protection.

The treatment of the various known forms of noise is not covered in a great deal of depth, and is easily found in various literatures.

r Thermal The base line is of course the thermal noise floor, and the random nature of the charge transport. The thermal noise is given by: - Si = 4kT/R, Sv=4kT/R where Si is the Spectral Density of the current noise, and S, the spectral density of the voltage. The thermal noise can also be expressed in terms of noise temperature, and this is a unit of measurement common in communications literature.

Ilf noise This form of noise appears to be due to imperfections in the crystal lattice of the silicon, and these defects and the effects of carrier recombination cause a random noise that contributes to the overall noise figure attainable.

This is given b: - S" (f) = A"2 4r,, / (1 + 2)7ft,)2 Where A,, _ J2 Shot Noise Shot noise is one of the dominant mechanisms in the device, and arises from the statistical nature of the charge transport mechanism and the diffusion process occurring when current flows across a semiconductor.

Si(f 2e 2 < n ≥ 2eI, Where I is the current flowing.

The spectral density is -2eI, and is spectrally white.

The schottky noise current is given by I,, = UqB Where q is the electron charge, and B is the bandwidth.

The noise floor of present semiconductor technology determines the lower value attainable, and this value can only be approached in the limit.

The noise factor is defined as: - Current best practice is a noise figure of approximately 0.2dB at 20 degrees C.

Objective This paper proposes a new semiconductor structure that reduces the noise from I and shot processes, not f by preventing them, but by suppressing their effects in the device.

The initial simulation work has been carried out using bipolar structures, as they are felt to be more controllable, partly due to their high predictability, and the longer history of manufacturing technology contained in the current state of the art.

The initial feasibility study has been carried out using a functional model of an idealised silicon crystal lattice, and the modeling of charge transport mechanisms Theory The fundamental source of the noise is the quantum change in the current caused by the statistical nature of the charge, and its effect as a percentage of the total charge flowing in the junction i.e. the current.

There are several types of noise, and they are defined below.

Shot Noise 11T J2 =(I_j d)2 f U - Id)2dt 0 i2 = 2qdAf (A 2) Where q = 1.6e-19, Af is the bandwidth in Hz The amplitude of the shot noise varies randomly with time, and can only be specified by a probability density function. It can also be shown that the amplitude distribution is Gaussian in nature.

If cy is the standard deviation, then C 2 =(J_J d)2 and a = 12q Id Af Flicker Noise or 11f noise Flicker noise is always associated with the flow of direct cur-rent and displays a spectral density of the form - K, I - Af i2 = fb Where a is a constant between 0.5 and 2, K, is a constant for a particular junction, and b is approximately unity.

If b = I then the Flicker noise has a dependence, and hence the name noise.

f f Burst Noise or Popcorn Noise This is also a low frequency noise, and appears to be due to heavy-metal ion contamination. Gold doped devices show very high levels of burst noise.

- K2Ic The spectral density is given by i2 f fc Where K2 is a constant for the particular junction, c is a constant between 0.5 and 2, and fc is a particular frequency for a given noise process.

Since this paper is concerned with low noise devices that are the basis for LSI, then there will not be any further mention of Burst Noise, as the LSI process does not tend to suffer from heavy ion contamination.

The introduction of a means for creating a fixed charge level into the device could then be used to reduce the effect of this quantum variation on the collector current. The random arrival of the charge carriers at this fixed charge or energy level would have the effect of averaging out the resulting quantum steps in the current.

This would reduce the effects of both noise and also shot noise, and reduce the noise levels closer to the f absolute minimum levels defined by the inherent thermal noise.

The noise can not be eliminated at the lower end of the frequency range, but can be substantially f reduced at the middle to upper frequency range.

The mechanism would need to able to be implemented in a way that had a minimum impact on the gain and frequency performance, but reduced the quantum charge fluctuations.

The design of a planar device will be outlined here to meet the objectives proposed above.

The standard planar device was chosen as a starting point and an analysis of the carrier mechanisms involved in the noise process. A novel method was conceived from this understanding to act as a filter mechanism for the individual charge carriers, and to reduce the charge fluctuations, without impairing the high frequency response.

The method proposed would theoretically improve the high frequency performance of the underlying device.

Physical Construction The diagram in Figure 1 shows the construction of a conventional BJT.

The device consists of an n type region forming the emitter, a thin p type junction forming the base, and a n type region forming the collector. The normal operation is achieved when the device is connected as shown in figure 2.

At normal signal levels of operation the collector current can be from a few hundred micro-amps, up to a few thousand micro-amps. A typical gain for this device might be from 50 to 300, and so the base current might be in the range of 1 to 500 micro-amps. At these low levels of base and collector current, the spectral density of the shot noise will be significant, and so the resultant noise levels will be relatively high. The shot noise amplified from the base, and the collector shot noise will determine the noise figure for a particular design of transistor. The equivalent electrical model for this device is shown in Figure 4.

The Low Noise semiconductor By introducing another doping profile in the collector region, at the base end of the collector bulk, the noise characteristics of the device can be improved with only a small modification to the manufacturing process. The physical layout is shown in Figure 3.

The device diffusion profile is shown in Figure 4.

Description of the Low noise device

The main difference of this device over a conventional BJT is the addition of a highly doped n++ layer Z between the base and the bulk collector region. This region has a contact i.e. a recombination center at the contact labeled C,,.

The design of the new n++ layer is almost like an anti-base, in that it has a lot of opposite design objectives. The new region should have high recombination, and not low, as in the base, and high conductivity. The new region doping should have a doping of about 10 times the bulk collector region.

Standard BJT In the standard NPN junction, shown in Figure 2, the base is a very narrow region and is designed to minimise recombination in the base, thus keeping the gain high. The forward biased emitter base junction injects minority charge into the base region, and these carriers are swept across the collector base depletion region, and into the bulk collector region.

Device operation In the device the emitter base is forward biased and as in the standard case, the emitter injects minority carriers into the base region. The presence of the n ++region does not affect the collector base depletion region greatly. The main difference the is that due to the higher doping in the n ++ region, the depletion width between the metallurgical base and the edge of the depletion region in the collector is reduced over the standard, more lightly doped case. The gain of the transistor is not altered greatly as there is little change in the field profile and so negligible change to the recombination in the base region.

The n ++ region is designed to be several times the width of the base region, and this in conjunction with the much higher doping level is designed to create a much higher level of recombination. This occurs in the region of the n++ layer outside the edge of the collector base depletion region, i.e. towards the collector end of the bulk n + region.

The intrinsic resistance of the n ++ region is much lower than that of the base, and is designed to offer a low conductivity layer through which the carriers to the external charge reservoir can pass.

The reverse bias across the collector base creates an electric field that collects the injected carriers from the err.dtter, and as they pass on through the base region. When they reach the edge of the base collector depletion region they are swept into the high field region present. This high electric field causes the carriers to be swept or rapidly diffuse from this constant charge region towards the collector. The flow is intercepted by the n++ region and this recombination centre generates an equalisation function with the external reservoir of charge. The carriers are still in the collector base electric field at this point, and so they continue to diffuse from the energy level of the n++ region towards the collector by normal the normal diffusion process. This new current made up from the injected charge from the emitter base depletion region, entering the n++ region, minus the instantaneous equalisation current, makes up the new collector current. This equalisation current is due to the energy difference between the statistical nature of the charge carriers and the constant charge level of the external reservoir, at that point in time.

There is a depletion capacitance between the n ++ region and the base region, and this is shown as cc 1 b in the high frequency model show in figure 5.

The value of this capacitance is given by: - C - C'U0 Where V is the applied voltage.

V)n VO The resistance rc,, is the between the external contact, or recombination centre, and the main carrier flow through the n++ region, and is shown as the resistance of the n++ region. The external Cn contact can be connected to an external capacitor of an appropriate value to create a fixed charge level for a given collector voltage. This capacitor would form two functions. The first is to provide a charge storage reservoir for the n++ region, and so reduce the amplitude of noise due to quantum fluctuations.

This device would best be described as a dual collector Bipolar Junction Transistor, with a main collector and a second 'noise collector Reduction in Shot Noise The amplitude of the change in the n++ region due to a random quantum step i.e. an electronic unit of charge, is given by AV = AQ / C, where AQ =q the electronic charge = 1.6e-19, and C is the sum of the collector base depletion capacitance and the external capacitance connected to the C,, connection.

The collector transition region capacitance per unit area is defined by: C e --0 2(- + -)(-Vd - V) Nd N, Where Vd is the voltage across the junction and (p is the contact potential (P = kT in n 1.2 e N,, Nd If N,, = 1021, Nd = io22 0.698 V Nd and N,, the n-region and p-region doping densities respectively.

6, = 12 for Si C, = Aq [1.6e-19x 8.85e-12 x 12/2( 1/10A 22+ I/IOA 23)) x 114 (-V - =A q [ 1.5E-6] x [3.27E-5] = A x 4 4.9le-1 1 = A x 7e-6 If the junction is 1 Oe-6m x I Oe-6m A= le-14 Ct = le- 14 x 7e-6 = 7e-20 The intrinsic collector depletion capacitance alone is not sufficient to reduce the noise in the collector current to the level required, and so an external capacitance is needed.

The C capacitance is shown as cc in the model of Figure 5. This is an important parameter in a normal I lb t, device as it limits the upper frequency limit. This capacitance is representative of the bulk collector to base capacitance and is connected as a miller capacitance between collector and base, causing the collector to roll off at higher frequencies.

The miller capacitance in the normal BJT is magnified by the gain of the transistor, and the effect of this is that the capacitance cc, is magnified by the transistor gain, A, i.e. c f =Ax ccil By inserting the n++ region, the bulk capacitance from the collector to base capacitance, ccl, is reduced by the effect of the external capacitance connected to C".

This reduces the effective size of cci, and the capacitance is now coupled to ground by C,t, and so the miller capacitance is considerably reduced.

Since AV = AQ/C and AQ = q = 1.6e- 19 An external capacitance of I OpF connected to C,, would give AV = 1. 6e- 19/1 Oe- 12 = 16nV (16 nano-volts) i.e. -155dB reduction in the peak to peak level of the shot noise voltage for a 10pF capacitance value. The schematic for operating the device is shown in Figure 8.

This size of capacitance could easily be fabricated on an integrated circuit, with clearly an increase in the area of those devices requiring low noise performance levels. This capacitance would probably be fabricated from an oxide dielectric structure. Some further work needs to be completed to determine if a diffusion capacitance would be sufficiently low noise to create an on silicon capacitance.

Reduction in Yf Noise P The graph of Flicker noise spectral density Af versus frequency is shown below in Figure 6.

Clearly with the mechanism proposed, as the frequency approaches zero the value of the current fluctuations are relatively large in amplitude, as the energy increases in this part of the spectrum. With a fixed size of external capacitance, the lower the frequency and the greater charge disturbance, then AO the ratio of increases, and the less effective the noise collector junction becomes. C The reduction in this form of noise would be described by: - AV = NC-Q where C is C,.,,, and AQ is the level of energy present between the mean of the distribution and the individual carrier.

Ki Ja Since i 2 f b Af Ki Afn'q' f K,Afnaq a f K2 HAfq f Because AV = AQ C AV = K2q a Cf As frequency reduces, AV increases For a given frequency AV increases by K2 qa where a 0.5 to 2 C If q = 1 AV = Kq i.e. K2 times greater than the shot noise case.

C f The energy (charge) at the low frequency spectrum cannot be removed by this high frequency suppression 1 mechanism, and so another approach is necessary for reducing - noise.

f to ffighfrequency f2 noise.

Given 2 = 2q IB,K' IB" + Ic where K, K, 2q Af f 1,6(ico)l' 18(ff) = A WhereA, is the low frequency gain.

I+j f A fT IC 2) P 2q- 2q -Lc-(l + f A 2qIc - at high frequencies.

1,8(ff)1 2 A 2 f2 T fT 2 The input referred noise at high frequencies rises, because the current gain begins to fall at these high frequencies.

This is shown on the graph in figure 9.

Z kk Summary In summary the effect of the c,, junction, and associated reservoir capacitance, is to reduce the normal gaussian distribution of the charge transport, due to noise mechanisms, around the mean collector current. The distribution then becomes a much narrower distribution or spectral density Si and approximates to the thermal distribution, or noise temperature of the bulk collector. The optimum noise performance should be reached with the highest practical bulk collector conductivity. This will keep the intrinsic resistance of the collector region to a low level, reducing the thermal noise level. The noise spectrum will show a peak at the I very low frequency end of the - range, and a distinctive peak for any heavy metal element impurities in f the junction, which have an energy trap value, et where 6,,, q where q is the electronic charge.

r, Approximation to the proposed device for reducing Rf noise only The reduction of - at the low frequency end of the noise frequency spectrum can be approximated using f the schematic shown in figure 7 below. The difference between this 'lumped' approach of Figure 7 and the Low noise BJT discussed above is that the base resistance rbb is present between the charge storage device and the collected charge from the collector at the base collector junction.

V - Vbeti Figure 7 shows a low noise current source with the current equal to R The current density in the base emitter of T I is mirrored in the base of the identical transistor T2.

1 The approximation is only suitable for reducing the - noise in a very low frequency to DC mode, due to f the gain reduction caused by the external capacitor.

Transistor TI sets the current density, and so the mirror current for T2, and the storage element for the base charge of T2 is supplied by C.

12

Claims

1 A low noise semiconductor amplifier using a semiconductor structure of several doped regions and a distinct highly doped region used to attenuate electrical noise disturbances in the structure.

2. A low noise semiconductor amplifier as claimed in Claim 1 with a distinct layer or region with an external electrical connection connected to an external capacitor.

3. A low noise semiconductor amplifier as claimed in Claiml with a distinct layer or region with the property of having a greater intrinsic base2 to collector capacitance, or gate2 to drain capacitance.

4. A low noise semiconductor amplifier as claimed in Claiml or Claim2 or Claim3 with a distinct layer or region created by changing the doping profile of the region to create a distinctive electrical region, with an external electrical connection connected to an external capacitor.

5. A low noise semiconductor amplifier as claimed in Claiml or Claim2 or Claim3 or Claim4 with a distinct layer or region created by changing the doping profile of the region to create a distinctive electrical region, with the property of having a greater intrinsic capacitance.

6.1 A low noise semiconductor amplifier as claimed in any preceding claim using any semiconductor material such as Silicon, Germanium, Gallium Arsenide, Gallium Phosphide or Gallium Sulfide.

7. A low noise semiconductor amplifier as claimed in any preceding claim using any material created by doping a base material with an impurity to create a semiconductor.

8. A low noise semiconductor amplifier as claimed in any preceding claim using a surface field effect to control the conduction of the semiconductor, with a distinct layer or region created by selective doping to form a noise suppression function in the function of the device output.

9. A low noise semiconductor amplifier claimed in any preceding claim made from any combination of the materials mentioned.

10. A low noise amplifier as claimed in any preceding claim using any physical configuration to impose a distinct layer or region in the conduction path with the purpose of reducing electrical noise.

11. A low noise amplifier substantially as herein described and illustrated in the accompanying drawings