GB2348307A - - Google Patents

Info

Publication number
GB2348307A
GB2348307A GB0010818A GB0010818A GB2348307A GB 2348307 A GB2348307 A GB 2348307A GB 0010818 A GB0010818 A GB 0010818A GB 0010818 A GB0010818 A GB 0010818A GB 2348307 A GB2348307 A GB 2348307A
Authority
GB
United Kingdom
Prior art keywords
bus
attached
agp
pci
screen controllers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB0010818A
Other versions
GB0010818D0 (en
GB2348307B (en
Inventor
Karim Rahemtulla
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Checkout Holdings Ltd
Original Assignee
Checkout Holdings Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Checkout Holdings Ltd filed Critical Checkout Holdings Ltd
Publication of GB0010818D0 publication Critical patent/GB0010818D0/en
Publication of GB2348307A publication Critical patent/GB2348307A/en
Application granted granted Critical
Publication of GB2348307B publication Critical patent/GB2348307B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1423—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
    • G06F3/1438—Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display using more than one graphics controller

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Graphics (AREA)
  • Human Computer Interaction (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Digital Computer Display Output (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

A standard PC architecture is modified to enable a plurality of screens to be driven from a single PC motherboard. A plurality of screen controllers is attached to the AGP bus and the bus extended correspondingly. A plurality of screen controllers is also attached to an extended PCI bus. An MPEG II decoder, on the PCI bus is attached to each of the screen controllers on the AGP bus via a multimedia channel. Each display controller is addressed by and connected to only one of the PCI and AGP buses.
GB0010818A 1998-11-16 1999-08-31 PC based systems for driving of multiple screens Expired - Fee Related GB2348307B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB9825107.7A GB9825107D0 (en) 1998-11-16 1998-11-16 Multiple screen pc based systems
PCT/GB1999/002854 WO2000029934A1 (en) 1998-11-16 1999-08-31 Pc based systems for driving of multiple screens

Publications (3)

Publication Number Publication Date
GB0010818D0 GB0010818D0 (en) 2000-06-28
GB2348307A true GB2348307A (en) 2000-09-27
GB2348307B GB2348307B (en) 2003-06-25

Family

ID=10842539

Family Applications (2)

Application Number Title Priority Date Filing Date
GBGB9825107.7A Ceased GB9825107D0 (en) 1998-11-16 1998-11-16 Multiple screen pc based systems
GB0010818A Expired - Fee Related GB2348307B (en) 1998-11-16 1999-08-31 PC based systems for driving of multiple screens

Family Applications Before (1)

Application Number Title Priority Date Filing Date
GBGB9825107.7A Ceased GB9825107D0 (en) 1998-11-16 1998-11-16 Multiple screen pc based systems

Country Status (7)

Country Link
EP (1) EP1131696A1 (en)
JP (2) JP2000148110A (en)
KR (1) KR20010093077A (en)
AU (1) AU5526999A (en)
GB (2) GB9825107D0 (en)
HK (1) HK1041060A1 (en)
WO (1) WO2000029934A1 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6734862B1 (en) 2000-06-14 2004-05-11 Intel Corporation Memory controller hub
US7116331B1 (en) 2000-08-23 2006-10-03 Intel Corporation Memory controller hub interface
US6859208B1 (en) 2000-09-29 2005-02-22 Intel Corporation Shared translation address caching
GB0107458D0 (en) * 2001-03-24 2001-05-16 Patterson Simon D Method and apparatus
KR100494169B1 (en) * 2002-11-07 2005-06-08 엘지전자 주식회사 Method and apparatus for processing image signal of dual monitor
TWM240594U (en) * 2002-12-06 2004-08-11 Shuttle Inc Improved arrangement of integrated motherboard slot
AU2003100018B4 (en) * 2003-01-09 2003-06-12 Jones Mccue Multi Display Systems Pty Limited Display system
CN100336045C (en) * 2004-11-19 2007-09-05 威盛电子股份有限公司 Multifunction chip set and relative method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5488385A (en) * 1994-03-03 1996-01-30 Trident Microsystems, Inc. Multiple concurrent display system
EP0814401A2 (en) * 1996-06-14 1997-12-29 Texas Instruments Incorporated Computer having a feature bus with buffers for external devices

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5488385A (en) * 1994-03-03 1996-01-30 Trident Microsystems, Inc. Multiple concurrent display system
EP0814401A2 (en) * 1996-06-14 1997-12-29 Texas Instruments Incorporated Computer having a feature bus with buffers for external devices

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
http://www.intel.com/technology/agp/agp_index.htm, 4.5.1998 Intel Corp., AGP Interface Spec Rev 2.0 *

Also Published As

Publication number Publication date
JP2000148110A (en) 2000-05-26
GB9825107D0 (en) 1999-01-13
WO2000029934A1 (en) 2000-05-25
AU5526999A (en) 2000-06-05
KR20010093077A (en) 2001-10-27
EP1131696A1 (en) 2001-09-12
JP2001166760A (en) 2001-06-22
GB0010818D0 (en) 2000-06-28
GB2348307B (en) 2003-06-25
HK1041060A1 (en) 2002-06-28

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20050831