GB2320806B - Dynamic random access memory cell array - Google Patents

Dynamic random access memory cell array

Info

Publication number
GB2320806B
GB2320806B GB9726854A GB9726854A GB2320806B GB 2320806 B GB2320806 B GB 2320806B GB 9726854 A GB9726854 A GB 9726854A GB 9726854 A GB9726854 A GB 9726854A GB 2320806 B GB2320806 B GB 2320806B
Authority
GB
United Kingdom
Prior art keywords
memory cell
random access
access memory
cell array
dynamic random
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9726854A
Other versions
GB9726854D0 (en
GB2320806A (en
GB2320806A8 (en
Inventor
Woo Bong Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hyundai Electronics Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Industries Co Ltd filed Critical Hyundai Electronics Industries Co Ltd
Publication of GB9726854D0 publication Critical patent/GB9726854D0/en
Publication of GB2320806A publication Critical patent/GB2320806A/en
Publication of GB2320806A8 publication Critical patent/GB2320806A8/en
Application granted granted Critical
Publication of GB2320806B publication Critical patent/GB2320806B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
GB9726854A 1996-12-24 1997-12-22 Dynamic random access memory cell array Expired - Fee Related GB2320806B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960071496A KR100227640B1 (en) 1996-12-24 1996-12-24 Dynamic random access memory cell array

Publications (4)

Publication Number Publication Date
GB9726854D0 GB9726854D0 (en) 1998-02-18
GB2320806A GB2320806A (en) 1998-07-01
GB2320806A8 GB2320806A8 (en) 1998-08-03
GB2320806B true GB2320806B (en) 2001-12-19

Family

ID=19490705

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9726854A Expired - Fee Related GB2320806B (en) 1996-12-24 1997-12-22 Dynamic random access memory cell array

Country Status (4)

Country Link
JP (1) JP3247862B2 (en)
KR (1) KR100227640B1 (en)
DE (1) DE19757878A1 (en)
GB (1) GB2320806B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6218696B1 (en) * 1999-06-07 2001-04-17 Infineon Technologies North America Corp. Layout and wiring scheme for memory cells with vertical transistors

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5250831A (en) * 1990-03-28 1993-10-05 Mitsubishi Denki Kabushiki Kaisha DRAM device having a memory cell array of a divided bit line type

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5250831A (en) * 1990-03-28 1993-10-05 Mitsubishi Denki Kabushiki Kaisha DRAM device having a memory cell array of a divided bit line type

Also Published As

Publication number Publication date
JP3247862B2 (en) 2002-01-21
KR100227640B1 (en) 1999-11-01
JPH10189892A (en) 1998-07-21
GB9726854D0 (en) 1998-02-18
GB2320806A (en) 1998-07-01
KR19980052492A (en) 1998-09-25
DE19757878A1 (en) 1998-06-25
GB2320806A8 (en) 1998-08-03

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20101222