GB2319658B - Method of fabricating a word line - Google Patents
Method of fabricating a word lineInfo
- Publication number
- GB2319658B GB2319658B GB9624435A GB9624435A GB2319658B GB 2319658 B GB2319658 B GB 2319658B GB 9624435 A GB9624435 A GB 9624435A GB 9624435 A GB9624435 A GB 9624435A GB 2319658 B GB2319658 B GB 2319658B
- Authority
- GB
- United Kingdom
- Prior art keywords
- fabricating
- word line
- word
- line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9624435A GB2319658B (en) | 1996-09-21 | 1996-11-25 | Method of fabricating a word line |
DE19648733A DE19648733C2 (de) | 1996-09-21 | 1996-11-25 | Verfahren zur Herstellung von Wortzeilen in dynamischen Schreib-Lesespeichern |
JP9011965A JPH10107034A (ja) | 1996-09-21 | 1997-01-07 | ワードラインの製造方法 |
NL1007868A NL1007868C2 (nl) | 1996-09-21 | 1997-12-23 | Werkwijze voor het vervaardigen van een woordregel, en hiermee verkregen geïntegreerde halfgeleiderschakeling. |
FR9800082A FR2773418B1 (fr) | 1996-09-21 | 1998-01-07 | Procede de fabrication d'un conducteur de mot |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW085111565A TW316326B (en) | 1996-09-21 | 1996-09-21 | Manufacturing method of word line |
GB9624435A GB2319658B (en) | 1996-09-21 | 1996-11-25 | Method of fabricating a word line |
NL1007868A NL1007868C2 (nl) | 1996-09-21 | 1997-12-23 | Werkwijze voor het vervaardigen van een woordregel, en hiermee verkregen geïntegreerde halfgeleiderschakeling. |
FR9800082A FR2773418B1 (fr) | 1996-09-21 | 1998-01-07 | Procede de fabrication d'un conducteur de mot |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9624435D0 GB9624435D0 (en) | 1997-01-15 |
GB2319658A GB2319658A (en) | 1998-05-27 |
GB2319658B true GB2319658B (en) | 2001-08-22 |
Family
ID=27447012
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9624435A Expired - Fee Related GB2319658B (en) | 1996-09-21 | 1996-11-25 | Method of fabricating a word line |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPH10107034A (fr) |
DE (1) | DE19648733C2 (fr) |
FR (1) | FR2773418B1 (fr) |
GB (1) | GB2319658B (fr) |
NL (1) | NL1007868C2 (fr) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100290781B1 (ko) * | 1998-06-30 | 2001-06-01 | 박종섭 | 반도체 소자 및 그 제조방법 |
JP2000294775A (ja) * | 1999-04-07 | 2000-10-20 | Sony Corp | 半導体装置の製造方法 |
US7243027B2 (en) | 2005-07-07 | 2007-07-10 | Schlumberger Technology Corporation | Method and system to generate deliverable files |
KR100771538B1 (ko) | 2005-12-14 | 2007-10-31 | 주식회사 하이닉스반도체 | 낮은 저항의 텅스텐-폴리사이드 게이트 및 리세스채널을갖는 반도체소자의 제조방법 |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4128670A (en) * | 1977-11-11 | 1978-12-05 | International Business Machines Corporation | Fabrication method for integrated circuits with polysilicon lines having low sheet resistance |
JPS61263243A (ja) * | 1985-05-17 | 1986-11-21 | Matsushita Electronics Corp | 高融点金属シリサイド配線の製造方法 |
JPS63133672A (ja) * | 1986-11-26 | 1988-06-06 | Nec Corp | 半導体装置 |
US4851295A (en) * | 1984-03-16 | 1989-07-25 | Genus, Inc. | Low resistivity tungsten silicon composite film |
JPH0273669A (ja) * | 1988-09-09 | 1990-03-13 | Sony Corp | 半導体装置 |
US4910578A (en) * | 1985-06-25 | 1990-03-20 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having a metal electrode interconnection film with two layers of silicide |
EP0400821A2 (fr) * | 1989-05-31 | 1990-12-05 | STMicroelectronics, Inc. | Interconnexion locale pour circuits intégrés |
US5070038A (en) * | 1988-12-24 | 1991-12-03 | Samsung Electronics Co., Ltd. | Method of forming low-resistive contact to N+/P+ preohmic regions in very large scale integrated devices |
EP0497596A2 (fr) * | 1991-01-31 | 1992-08-05 | STMicroelectronics, Inc. | Procédé de fabrication des structures de circuit intégré |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4389257A (en) * | 1981-07-30 | 1983-06-21 | International Business Machines Corporation | Fabrication method for high conductivity, void-free polysilicon-silicide integrated circuit electrodes |
JPS61276373A (ja) * | 1985-05-31 | 1986-12-06 | Nippon Texas Instr Kk | 半導体装置の製造工程 |
US4690730A (en) * | 1986-03-07 | 1987-09-01 | Texas Instruments Incorporated | Oxide-capped titanium silicide formation |
JPS6376479A (ja) * | 1986-09-19 | 1988-04-06 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
US4737474A (en) * | 1986-11-17 | 1988-04-12 | Spectrum Cvd, Inc. | Silicide to silicon bonding process |
JPS63227058A (ja) * | 1987-03-17 | 1988-09-21 | Matsushita Electronics Corp | 高融点金属シリサイドゲ−トmos電界効果トランジスタ |
JPS63272028A (ja) * | 1987-04-30 | 1988-11-09 | Oki Electric Ind Co Ltd | 高融点金属シリサイド膜の形成方法 |
US4774201A (en) * | 1988-01-07 | 1988-09-27 | Intel Corporation | Tungsten-silicide reoxidation technique using a CVD oxide cap |
US4981442A (en) * | 1989-03-23 | 1991-01-01 | Nippon Acchakutanshi Seizo Kabushiki Kaisha | Electrical harness |
US5591674A (en) * | 1991-12-30 | 1997-01-07 | Lucent Technologies Inc. | Integrated circuit with silicon contact to silicide |
JP3067433B2 (ja) * | 1992-12-04 | 2000-07-17 | キヤノン株式会社 | 半導体装置の製造方法 |
JPH06334453A (ja) * | 1993-05-25 | 1994-12-02 | Canon Inc | 増幅装置 |
US5635765A (en) * | 1996-02-26 | 1997-06-03 | Cypress Semiconductor Corporation | Multi-layer gate structure |
-
1996
- 1996-11-25 GB GB9624435A patent/GB2319658B/en not_active Expired - Fee Related
- 1996-11-25 DE DE19648733A patent/DE19648733C2/de not_active Expired - Fee Related
-
1997
- 1997-01-07 JP JP9011965A patent/JPH10107034A/ja active Pending
- 1997-12-23 NL NL1007868A patent/NL1007868C2/nl not_active IP Right Cessation
-
1998
- 1998-01-07 FR FR9800082A patent/FR2773418B1/fr not_active Expired - Fee Related
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4128670A (en) * | 1977-11-11 | 1978-12-05 | International Business Machines Corporation | Fabrication method for integrated circuits with polysilicon lines having low sheet resistance |
US4851295A (en) * | 1984-03-16 | 1989-07-25 | Genus, Inc. | Low resistivity tungsten silicon composite film |
JPS61263243A (ja) * | 1985-05-17 | 1986-11-21 | Matsushita Electronics Corp | 高融点金属シリサイド配線の製造方法 |
US4910578A (en) * | 1985-06-25 | 1990-03-20 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having a metal electrode interconnection film with two layers of silicide |
JPS63133672A (ja) * | 1986-11-26 | 1988-06-06 | Nec Corp | 半導体装置 |
JPH0273669A (ja) * | 1988-09-09 | 1990-03-13 | Sony Corp | 半導体装置 |
US5070038A (en) * | 1988-12-24 | 1991-12-03 | Samsung Electronics Co., Ltd. | Method of forming low-resistive contact to N+/P+ preohmic regions in very large scale integrated devices |
EP0400821A2 (fr) * | 1989-05-31 | 1990-12-05 | STMicroelectronics, Inc. | Interconnexion locale pour circuits intégrés |
EP0497596A2 (fr) * | 1991-01-31 | 1992-08-05 | STMicroelectronics, Inc. | Procédé de fabrication des structures de circuit intégré |
Also Published As
Publication number | Publication date |
---|---|
JPH10107034A (ja) | 1998-04-24 |
NL1007868C2 (nl) | 1999-06-24 |
FR2773418A1 (fr) | 1999-07-09 |
DE19648733C2 (de) | 2002-11-07 |
DE19648733A1 (de) | 1998-04-16 |
FR2773418B1 (fr) | 2002-12-06 |
GB2319658A (en) | 1998-05-27 |
GB9624435D0 (en) | 1997-01-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
AT | Applications terminated before publication under section 16(1) | ||
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20091125 |