GB2302870A - Method of forming a boron phosphorous silicate glass film - Google Patents
Method of forming a boron phosphorous silicate glass film Download PDFInfo
- Publication number
- GB2302870A GB2302870A GB9603071A GB9603071A GB2302870A GB 2302870 A GB2302870 A GB 2302870A GB 9603071 A GB9603071 A GB 9603071A GB 9603071 A GB9603071 A GB 9603071A GB 2302870 A GB2302870 A GB 2302870A
- Authority
- GB
- United Kingdom
- Prior art keywords
- film
- bpsg
- temperature
- forming
- silicate glass
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title description 30
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 title description 23
- 229910052796 boron Inorganic materials 0.000 title description 22
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 title description 22
- 239000005368 silicate glass Substances 0.000 title description 14
- 238000001816 cooling Methods 0.000 description 10
- 238000010521 absorption reaction Methods 0.000 description 9
- 238000000137 annealing Methods 0.000 description 7
- 239000004065 semiconductor Substances 0.000 description 7
- 238000010583 slow cooling Methods 0.000 description 5
- 238000000151 deposition Methods 0.000 description 4
- 239000002019 doping agent Substances 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 230000007704 transition Effects 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229920006395 saturated elastomer Polymers 0.000 description 2
- 241000206607 Porphyra umbilicalis Species 0.000 description 1
- 208000037656 Respiratory Sounds Diseases 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 241000124960 Turris Species 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 206010037833 rales Diseases 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
-
- C—CHEMISTRY; METALLURGY
- C03—GLASS; MINERAL OR SLAG WOOL
- C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
- C03C27/00—Joining pieces of glass to pieces of other inorganic material; Joining glass to glass other than by fusing
- C03C27/04—Joining glass to metal by means of an interlayer
-
- C—CHEMISTRY; METALLURGY
- C03—GLASS; MINERAL OR SLAG WOOL
- C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
- C03C27/00—Joining pieces of glass to pieces of other inorganic material; Joining glass to glass other than by fusing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Organic Chemistry (AREA)
- Materials Engineering (AREA)
- Geochemistry & Mineralogy (AREA)
- General Chemical & Material Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Ceramic Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Description
2302870 METHOD OF FORMING A BORON PHOSPHOROUS SILICATE'GLA:SS FILM
FIELD OF THE INVENTION
The present invention relates to a method of forming a boron phosphorous silicate glass(hereinafier referred to simply as BPSC,) film used for an insulaung film in a semiconductor device.
BACKGROUND OF THE INVENTION
A BPSG film, which is used for an insulating film in a semiconductor device, is widelv used in the manufacturing process of the semiconductor device due to its good planarity properties as well as its good insulation properties. As device dimensions are scaled down in ULSI, it is highly required that the planarity rate of the BPSG film which is used as an insulating film be high. The BPSG film in which boron (13) and phosphorous (P) are heavily doped has the properties to induce a refloxv to easily Occur. Therefore, the planarity rate of BPSG film can be improved by heavily doping boron (B) and phosphorous (P). -Adso, a more heavily. doped BPSG film makes it possible to manufacture a semiconductor device having a shallow junction since the BPSG film can be planarized a'L a low The heavily doped 13PSG film, however, has some difficullies that it has a strong moisture absorption nature and 11 also causes to increase the out diffusion of boron (B) and phosphorous (P) contained in the WSG film during annealing process- As a result, out diffused boron (B) and phosphorous (P) create an extracted crvstal on the surface of the WSG film, and the extracted crystal decreases the reliability of a semiconductor device since it acts as defect factor. As the size of a contact hole becomes narrowed because the device ciiniensioii,, are scaled down in ULSI, 11, is rather clifficult to fill the coniac hole with conducting rnaierials as desired. resulting in deterioration of stepcoverage in Lhe contact hole. In order to improve stepcoverage. so called. a wlne-glass shaped contact hole must be formed by two process steps: a \ei etch process and a dry etch process. High boron and phosphorous containing 13PSG film, however, makes it difficult to achieve the wine-glass shaped contact hole during wet and dry etch processes. As the highly doped WSG film has a strong moisture absorption nature, a photoresist, which is coated on WSG film, has a poor adhesion with the WSG film, m-hereby an excessive lateral etch compared with a vertical etch is brought about because chemical etchant is easily infiltrated into the interface of the photoresist and the WSG film during the wet-etch process. Such effects results in some problems that they form a contact hole like a shallow dish and, in worst case, that they may connect neighboring contact holes together or lift the photoresist.
As described above, in order to Improve the planarization of the 13PSG film, the concentrauon of the impurity should be high.However, in case that the concentration of the impurity becomes high; there is a limitation in lowering the wet-etched ratio without degradation of planarity of the BPSG film because the lateral to vertical wet-etched ratio becomes great.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a method of fori-ning a WSG film which can lower the ivet-etched r-aElo while it increases tile planarity of the 13PSG film. To achieve the above object, the present invention provides a method of forming a boron phosphorous silicate glass (BPSG) film, comprising the steps of: depositing a boron phosphorous silicate glass WSG) film on the entire structure surface after a plurality of underlying layers are formed on a wafer; loading said wafer into a furnace; increasing an internal temperature of said furnace; flattening the surface of said WSG film using a reflow process; rapidly cooling the internal temperature of said furnace so that the surface of said WSG film turns to be a rapid cooling region and the internal thereof turns to be a slow cooling region; and unloading said wafer.
BRIEF DESCRIPTION OF THE DRAWINGS
For fuller understanding of the nature and objects of the invention. reference should be had to the following detailed description taken in conjunction with the accompanying drawings in which.
Fig. 1A and Fig. 1B sho,,v sectional views of semiconductor device e--, plaii-iin,cr, the method of forming a 13PSG film in accordance \\11h Ille present invenLlon.
Fig. 2 sho,-s a graph illustrating wet-etched ratio as a fuiic-,lot of ramp down ratio.
Fig. 3 shows a graph illustrating wet-etched ratio as a function of unloading temperature.
Similar reference characters refer to similar parts through the several views of the drawings.
DESCRIPTION OF THE INVENTION
Fig. 1A and Fig. IB show sectional views of a semiconductor device explaining the method of forming a 13PSG film in accordance vith the present invention.
Fig. 1A shows a 13PSG film 3, used for an insulation film, is deposited on the entire surface after a plurality of underlying layers 2 are formed on the wafer 1. The surface of the deposited BPSG lilm 3 is uneven due to the underlying layers 2.
Referring to Fig. 113, the WSG film 3 is planarized bv the annealing process in accordance with the present in,,,ention, thereby obtaining a planarized 13PSG film 3A.
An annealing process for flattening the WSG film may be classified into following five steps; a loading. a raMP LIP. a reflow, a ramp down and em unloading steps. Depending upon 1he rarrip down - step and [he unloading step, a moisture absorption nat,,.ii-e of the BPSCi filTn is determined.
An annealing process for forming the WSG film 3A, the surface of which is flattened, is as follows.
The wafer 1, on which the 13PSG film 3 is deposited, is loaded in the furnace. At this time, loading temperature is approximately 4001C. In the ramp up step, an internal temperature of the furnace is increased to the temperature of 800 through 9501C higher 25 through 35% than the temperature of 650 through 7001C, which is a transition temperature of the 13PSG film. In the reflow step, the surface of the BPSG film 3 should be flattened at the temperature of 800 through 9.50C in an inert gas such as nitrogen (N,) or argon (A,). In the ramp down step, the temperature range should be kept at 90 through 95% of the reflow temperature for example, 700 through 9001C with the ramp down rate being -20 through - 50'C/min. At this temperature, the wafer 1 is unloaded.
On the one hand, %,,hen the 13PSG film is annealed at high temperature over a transition temperature, the viscosity of the BPSG film becomes low enough, and all atoms within the film can move freely. In the ramp down step, when the ramp down rate becomes slow all atoms within the film will have a great possibility that they will be crystallized, a contractile rate thereof will be great, and the density of the film %vIII be increased. On the contrary, when the ramp down rate beconles rapid. Llic, strucLure of the film at high tempera[ure remains intact ard it has a property Lhat. Lhe dens1tv of the film %,-III be decreased iha- v.hen the ramp dwvn rate becomes slow, and the etch ratio will be ircreased. In addition, the BPSG film fornied by a slow cooling has a property that its moisture absorption becomes sensitive to the impuricy concentration within the film. but the BPSG film formed by a relatively rapid cooling has a property that its moisture absorption becomes insensitive to the impuritv concentration within the film.
As the present invention makes use of the characteristics of such BPSG film, the BPSG film 3A formed as a result of the above annealing process has a different internal structure. In practical, the surface of the BPSG film 3A turns to be a rapid cooling region A the structure of which at reflow temperature (800 through 9501C) remains intact, and the internal of the BPSG film 3A turns to be a slow cooling region B all the materials within which are crystallized after being cooled slowly at reflow temperature MO through 9501C). In the BPSG film 3A having this type of structure, a compressive stress applies to the rapid cooling region A because a contractile force in the slow cooling region B is relatively large than that in the rapid cooling region A. The compressive stress can suppress an extracted cnstal from being created on the surface of the BPSG film 3A and also can reduce a moisture absorption of the BPSG film 3A. Therefore, in increasing the planarity of the BPSG film, such problems as creation of the extracted crystal and increase of moisture absorption deserve 11Ie consideration even Ihough each concentraLioll of boron and phosphorous is high enough. for e\amplle 5 ihi-ough 6%vtl/o, respectively. As such, the present invention can lo,ver the xvet-etched ratio while increasing the planarity of BPSG 111m.
When the contact hole is formed by two steps: wet and dry etch process in the BPSG film 3A formed in accordance with the present invention, the profile of the contact hole turris to be a wine-glass shaped contact formation. That is, the present invention can control the lateral to vertical wet-etched ratio (DL/Dv) of the BPSG film 3A to 1.125 through 1. 5, and this will be explained below by reference to the experimental data shown in Fig. 2 and Fig.3.
Fig. 2 shows a wet-etched ratio as a function of ramp down rate at unload temperature of 8001C. Ramp down rates being varied from -3 to -30 IC /min. The experimental data shows that, when the ramp down rate is faster than 25C/rrUn, the wet-etched ratio (DuDv) is saturated less than 15 regardless of dopant concentration.
Fig. 3 shows a wet-etched ratio as a function of unload temperature at ramp down rate of -25C/min'. Unload temperature being varied from 600 to 800 C. The experimental data shows that, when the unload temperature is over 700C, the wet-etched ratio (DL/Dv) is saturated less than 1.5 regardless of the dopant concentration.
As the dopant concentration becomes high, a moisture absorption of the BPSG filril results in reduction of the adhesion \'-Ith phooresls,L. In annealing process for flattening the BFSG film, if Lhe cl(mi- raLe becomes great and it Is unloaded at high temperature. the effects, oil tile dopant concentration can be effectively minimized, thereby re-sulting ill ail impro,,,ed formation of contact hole.
Therefore, the present invention can improve the planarity of BPSG film because it can implant, in depositing the BPSG film, higher concentration of boron and phosphorous compared with a depositing of the existing BPSG film so as to increase a surface planarity, and it can also prevent the adhesion with photoresist from decreasing due to a moisture absorption of the BPSG film by improving annealing process of the BPSG film and then forming a rapid cooling region in the surface of the BPSG film, wherebv it can suppress an extracted crystal from being created on BPSG film and it can also form an improved formation of a contact hole- The foregoing description, although described in its preferred embodiment with a certain degree of particularity, is only illustrative of the principle of the present invention. It is to be understood that the present invention is not to be limited to the preferred embodiments disclosed and - 8 illustrated herein. Accordingly, all expedient variations that may be made within the scope and spirit of the present invention are to be encompassed as further embodiments of the present invention.
We clalin.:' 1. A method of forming a boron phosphorous silicate glass (BPSG) film, comprising the steps of '. depositing a boron phosphorous silicate glass (13PSG) film on the entire structure surface after a plurality of underlying lavers are formed on a wafer', loading said xvafer irto a furnace.
increasing, an temperature of said fLirnace, flaiLening the surface of said BPSC, film using a reflow process'.
rapidly cooling the internal temperature of said. furnace so that the surface of said 13PSG film turns to be a rapid cooling regglon and the internal thereof turns to be a slow cooling region; and unloading said wafer.
2. A method of forming a boron phosphorous silicate glass WSG) film according to claim 1, wherein loading temperature is approximately 4001C.
3. A method of forming a boron phosphorous silicate glass (13PSG) film according to claim 1, wherein said reflow process is performed at temperature range higher 25 through 35% than the transition temperature of boron phosphorous silicate glass (BPSG) film.
4. A method of forming a boron phosphorous silicate glass (13PSG) film 10 according to claim 3, wherein said transition temperature of the boron phosphorous silicate glass WSG) film ranges from 650 to 700 IC - 5. A method of forming a boron phosphorous silicate glass (BIPSG) film according to claim 1, wherein said reflox process is performed at temperature of 800 through 950'C.
6. A nieihod of forming a boron phosphorous silicate glass (BPSG) film according to claim 1. wherein said rapid cooling process is performed at ramp down rate of -20 through -50'C/'riiin until said, temperature reaches about 90 through 95% of said reflow temperature.
7. A method of forming a boron phosphorous silicate glass WSG) film according to claim 1, wherein unloading temperature ranges from 700 to 900 'C.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950018554A KR0172039B1 (en) | 1995-06-30 | 1995-06-30 | Method of forming bpsg |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9603071D0 GB9603071D0 (en) | 1996-04-10 |
GB2302870A true GB2302870A (en) | 1997-02-05 |
GB2302870B GB2302870B (en) | 1999-04-28 |
Family
ID=19419019
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9603071A Expired - Fee Related GB2302870B (en) | 1995-06-30 | 1996-02-14 | Method of forming a boron phosphorous silicate glass film |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPH0917781A (en) |
KR (1) | KR0172039B1 (en) |
CN (1) | CN1061635C (en) |
DE (1) | DE19605787B4 (en) |
GB (1) | GB2302870B (en) |
TW (1) | TW288166B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2006082468A1 (en) * | 2005-02-03 | 2006-08-10 | S.O.I.Tec Silicon On Insulator Technologies | Method for high-temperature annealing a multilayer wafer |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100802451B1 (en) * | 2004-03-05 | 2008-02-13 | 쇼와 덴코 가부시키가이샤 | Boron phosphide-based semiconductor light-emitting device |
CN111540783B (en) * | 2020-01-16 | 2023-09-26 | 重庆康佳光电科技有限公司 | Metal-oxide semiconductor field effect transistor and preparation method thereof |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2538722B2 (en) * | 1991-06-20 | 1996-10-02 | 株式会社半導体プロセス研究所 | Method for manufacturing semiconductor device |
KR940009599B1 (en) * | 1991-10-30 | 1994-10-15 | 삼성전자 주식회사 | Forming method of inter-dielectric film for semiconductor device |
US5409858A (en) * | 1993-08-06 | 1995-04-25 | Micron Semiconductor, Inc. | Method for optimizing thermal budgets in fabricating semiconductors |
-
1995
- 1995-06-30 KR KR1019950018554A patent/KR0172039B1/en not_active IP Right Cessation
-
1996
- 1996-02-14 GB GB9603071A patent/GB2302870B/en not_active Expired - Fee Related
- 1996-02-16 TW TW085102003A patent/TW288166B/en active
- 1996-02-16 JP JP8028788A patent/JPH0917781A/en active Pending
- 1996-02-18 DE DE19605787A patent/DE19605787B4/en not_active Expired - Fee Related
- 1996-02-18 CN CN96105729A patent/CN1061635C/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2006082468A1 (en) * | 2005-02-03 | 2006-08-10 | S.O.I.Tec Silicon On Insulator Technologies | Method for high-temperature annealing a multilayer wafer |
US7544058B2 (en) | 2005-02-03 | 2009-06-09 | S.O.I.Tec Silicon On Insulator Technologies | Method for high-temperature annealing a multilayer wafer |
Also Published As
Publication number | Publication date |
---|---|
KR0172039B1 (en) | 1999-03-30 |
GB2302870B (en) | 1999-04-28 |
DE19605787A1 (en) | 1997-01-02 |
GB9603071D0 (en) | 1996-04-10 |
KR970003653A (en) | 1997-01-28 |
TW288166B (en) | 1996-10-11 |
DE19605787B4 (en) | 2007-05-16 |
CN1145336A (en) | 1997-03-19 |
CN1061635C (en) | 2001-02-07 |
JPH0917781A (en) | 1997-01-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5395790A (en) | Stress-free isolation layer | |
US7714325B2 (en) | Trench isolation structure | |
US6844259B2 (en) | Method for forming contact plug in semiconductor device | |
US6511888B1 (en) | Method of fabricating a semiconductor device using trench isolation method including hydrogen annealing step | |
US6265749B1 (en) | Metal silicide transistor gate spaced from a semiconductor substrate by a ceramic gate dielectric having a high dielectric constant | |
JP2005197643A (en) | Method for manufacturing flash memory devices | |
US20200035794A1 (en) | Non-volatile memory device and method for manufacturing the same | |
US4455325A (en) | Method of inducing flow or densification of phosphosilicate glass for integrated circuits | |
US5285103A (en) | Structure and method for contacts in CMOS devices | |
GB2302870A (en) | Method of forming a boron phosphorous silicate glass film | |
KR100237666B1 (en) | Method for manufacturing semiconductor device | |
US6204196B1 (en) | Method of forming a film having enhanced reflow characteristics at low thermal budget | |
US5972779A (en) | Method for forming field oxide film of semiconductor device with silicon and nitrogen containing etching residue | |
US7368401B2 (en) | Integrated circuit having a doped porous dielectric and method of manufacturing the same | |
EP0535553B1 (en) | Process for plugging defects in a dielectric layer formed on a semiconductor device | |
KR100495921B1 (en) | Method of fabrication semiconductor device for remove stress | |
US5759869A (en) | Method to imporve metal step coverage by contact reflow | |
KR0172528B1 (en) | Method of forming oxide film in a semiconductor device | |
JPH0682668B2 (en) | Method for manufacturing semiconductor device | |
KR100235962B1 (en) | Method for manufacturing semiconductor device | |
KR100510070B1 (en) | Planarization method of interlayer insulating film of semiconductor device | |
KR100400279B1 (en) | Method for manufacturing semiconductor device with tungsten silicide | |
KR100304688B1 (en) | Method for manufacturing semiconductor device | |
KR20060037823A (en) | Method for gapfilling in semiconductor device using deposition-etch-etch-deposition | |
KR100351982B1 (en) | Manufacturing method for insulator flim on semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20100214 |