GB2298065A - Method for realizing a parallel connection, and a parallel connection - Google Patents

Method for realizing a parallel connection, and a parallel connection

Info

Publication number
GB2298065A
GB2298065A GB9607561A GB9607561A GB2298065A GB 2298065 A GB2298065 A GB 2298065A GB 9607561 A GB9607561 A GB 9607561A GB 9607561 A GB9607561 A GB 9607561A GB 2298065 A GB2298065 A GB 2298065A
Authority
GB
United Kingdom
Prior art keywords
parallel connection
realizing
data
parallel
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9607561A
Other versions
GB2298065B (en
GB9607561D0 (en
Inventor
Esko Tapio Rautanen
Olli Rissanen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Oyj
Original Assignee
Nokia Telecommunications Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Telecommunications Oy filed Critical Nokia Telecommunications Oy
Publication of GB9607561D0 publication Critical patent/GB9607561D0/en
Publication of GB2298065A publication Critical patent/GB2298065A/en
Application granted granted Critical
Publication of GB2298065B publication Critical patent/GB2298065B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Advance Control (AREA)

Abstract

The invention relates to a method for realizing a parallel interface in a device that is connected to a microcontroller, and a parallel interface. The interface comprises several signal interfaces (B0 ... B7) in parallel, and the value of each signal is expressed by a corresponding data bit (D0 ... D7) in a memory location, such as a register. To eliminate malfunctions, the data bits (D0 ... D7) of the signal interfaces are divided between the data register (DATA1 ... DATA8) appearing in different addresses (A+1 ... A+8), and in at least one predetermined control address is provided control data (C0 ... C7; M) indicating in which addresses the data bits (D0 ... D7) appear.
GB9607561A 1993-10-13 1994-10-12 Method for realizing a parallel connection, and a parallel connection Expired - Fee Related GB2298065B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI934522A FI94189C (en) 1993-10-13 1993-10-13 Method for implementing a parallel connection and a parallel connection
PCT/FI1994/000460 WO1995010807A1 (en) 1993-10-13 1994-10-12 Method for realizing a parallel connection, and a parallel connection

Publications (3)

Publication Number Publication Date
GB9607561D0 GB9607561D0 (en) 1996-07-03
GB2298065A true GB2298065A (en) 1996-08-21
GB2298065B GB2298065B (en) 1998-01-14

Family

ID=8538770

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9607561A Expired - Fee Related GB2298065B (en) 1993-10-13 1994-10-12 Method for realizing a parallel connection, and a parallel connection

Country Status (5)

Country Link
AU (1) AU7815194A (en)
DE (1) DE4497672T1 (en)
FI (1) FI94189C (en)
GB (1) GB2298065B (en)
WO (1) WO1995010807A1 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0056008A2 (en) * 1981-01-05 1982-07-14 Sperry Corporation Apparatus for writing into variable-length fields in memory words
EP0507951A1 (en) * 1990-09-18 1992-10-14 Fujitsu Limited Exclusive control method for shared memory

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0056008A2 (en) * 1981-01-05 1982-07-14 Sperry Corporation Apparatus for writing into variable-length fields in memory words
EP0507951A1 (en) * 1990-09-18 1992-10-14 Fujitsu Limited Exclusive control method for shared memory

Also Published As

Publication number Publication date
WO1995010807A1 (en) 1995-04-20
FI94189B (en) 1995-04-13
FI934522A0 (en) 1993-10-13
GB2298065B (en) 1998-01-14
AU7815194A (en) 1995-05-04
DE4497672T1 (en) 1996-10-17
FI94189C (en) 1995-07-25
GB9607561D0 (en) 1996-07-03

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20111012