GB2284713A - Mounting of an intergrated circuit package on a circuit board - Google Patents

Mounting of an intergrated circuit package on a circuit board Download PDF

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Publication number
GB2284713A
GB2284713A GB9325195A GB9325195A GB2284713A GB 2284713 A GB2284713 A GB 2284713A GB 9325195 A GB9325195 A GB 9325195A GB 9325195 A GB9325195 A GB 9325195A GB 2284713 A GB2284713 A GB 2284713A
Authority
GB
United Kingdom
Prior art keywords
package
circuit board
stud
hole
combination according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9325195A
Other versions
GB2284713B (en
GB9325195D0 (en
Inventor
Nicholas Ian Saunders
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Europe Ltd
Original Assignee
Sony United Kingdom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony United Kingdom Ltd filed Critical Sony United Kingdom Ltd
Priority to GB9325195A priority Critical patent/GB2284713B/en
Publication of GB9325195D0 publication Critical patent/GB9325195D0/en
Publication of GB2284713A publication Critical patent/GB2284713A/en
Application granted granted Critical
Publication of GB2284713B publication Critical patent/GB2284713B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49517—Additional leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/143—Digital devices
    • H01L2924/1433—Application-specific integrated circuit [ASIC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10295—Metallic connector elements partly mounted in a hole of the PCB
    • H05K2201/10303—Pin-in-hole mounted pins
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10393—Clamping a component by an element or a set of elements
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10409—Screws
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10568—Integral adaptations of a component or an auxiliary PCB for mounting, e.g. integral spacer element
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10659—Different types of terminals for the same component, e.g. solder balls combined with leads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/167—Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Metallurgy (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

A package for an integrated circuit, especially an ASIC, is of the PQFP type and provided with one or more holes therein to engage studs (3, Fig. 1B) on the circuit hoard (2). The studs and holes are sized and positioned accurately to ensure accurate alignment of pins (5) and tracks (6). Electrical connection is ensured by retaining means, e.g. a nut (4) or solder joint, holding the IC on the stud. In another embodiment, the studs (3) are used to provide power supply or earth connections to the intergrated circuit. <IMAGE>

Description

INTEGRATED CIRCUIT PACKAGE The present invention relates to packages for integrated circuits (IC's) and particularly packages for application specific IC's (ASIC's).
The use of ASICs is increasing as is their complexity.
With an increase in complexity, and the function they can perform, the package cost, board assembly costs, pin counts and power consumption all increase.
There are presently two common types of package used for ASIC's; Plastic Quad Flat Pack (PQFP) and ceramic Pin Grid Array (PGA), each having advantages and disadvantages. The PQFP is cheaper than the PGA but has a lower thermal conductivity and requires to be surface mount soldered. In surface mount soldering, a blob of solder is put on the end of each pin, the chip put on the circuit board and the board heated to melt the solder. The fine lead pitch of PQFP can also cause alignment problems. The PGA is advantageous in not requiring surface mount soldering and in having a higher thermal conductivity, but it is considerably more expensive.
There is therefore a need for a new type of package combining the cheapness of the PQFP with better thermal conductivity and reduced assembly/mounting costs.
It has been known to provide holed tags on IC's and other components, usually power amplifiers or other high current devices, for connection to heat sinks. Although this does assist in conducting heat away from the component it does not ease assembly, but rather necessitates an additional step to mount the device and consequent extra cost.
According to the present invention there is provided a combination of a circuit board and at least one integrated circuit package mounted on said board by engagement of at least one stud and at least one hole, electrical contact between the pins of said IC package and tracks of said circuit board being made by force exerted between said IC package and said board by means retaining said stud in said hole.
The present invention also provides an integrated circuit package having at least one through hole therein for receiving at least one stud thereby to be mounted on a circuit board, the or a hole being sufficiently accurately positioned relative to pins of said package to ensure correct alignment thereof on mounting of said package on said circuit board.
Further, the present invention provides a circuit board having at least one projecting stud to engage a corresponding hole on an IC package to mount said package on said board, the or a stud being accurately positioned relative to tracks on said circuit board to ensure correct alignment of said IC package when it is mounted on said circuit board.
The hole may be used, in conjunction with the or a projecting stud to accurately locate the IC relative to the tracks on the board. The hole and stud should have a combined tolerance of preferably less than half the width of a track on the board. The package may be fixed to the circuit board by providing, for example, a nut on the stud or by soldering to the stud, or by any other suitable retaining means. Electrical connections between the pins of the IC and tracks on the board may be ensured by the force exerted by the retaining means.
The use of the stud or hole to align the chip or to make the electrical connections makes both assembly and disassembly easier as well as ensuring more reliable electrical connection.
To assist in locating the IC there may be several holes of different sizes or the holes may be non-circular with appropriate keying surfaces.
Earth or power supply connections may be made to the IC through one or more of the holes and studs.
Preferably the studs are provided on the circuit board and holes in the IC packages, so that the chips are still compatible with normal boards and may be surface mount soldered in the normal manner.
The present invention can thus avoid the need to solder the pins of the IC to the circuit board.
Although the invention is described herein primarily with regard to ASIC's and surface mount IC's, to which it is most advantageously applied, it is of course also applicable to other forms of IC.
The present invention will be further described hereinafter with reference to the following description of exemplary embodiments and the accompanying drawings, in which: Fig 1A is a plan view of a first embodiment of the invention; Fig 1B is a side view of the first embodiment of the invention mounted on a circuit board; Fig 2A is a plan view of a second embodiment of the invention; and Fig 2B is a side view of the second embodiment of the invention mounted on a circuit board.
The first embodiment of the invention will be described with reference to Figs 1A and B.
The IC 1 is held on circuit board 2 via two studs 3 which project from the circuit board. In this embodiment the studs 3 are threaded and two nuts 4 are provided to hold the IC 1 in place and urge it against the circuit board 2. The force provided as nuts 4 are tightened ensures the pins 5 make a good electrical contact with the corresponding tracks 6 on the circuit board.
Alignment of the pins and tracks may be ensured by accurate positioning of the projecting studs 3 on the circuit board 2 and the corresponding holes on the IC 1 which are made to fit the studs closely. The two studs can be made different sizes, with the corresponding holes being of corresponding sizes, so that correct orientation of the IC is ensured.
The size, position and number of studs is chosen to ensure sufficient pressure to make a good contact between all of the pins and the corresponding tracks without excessive distortion of the IC package. On a small chip one stud only might be used, in which case the lower part of it might be made non-circular to ensure correct alignment of the chip, e.g. by the provision of a flat face to engage a corresponding face in the hole on the IC.
The chip itself is of the PQFP type and requires little modification other than the provision of the holes and ensuring that the internal wiring of the chip is rerouted if necessary.
The mounting of the IC via the studs and the positive pressure holding the IC to the circuit board eliminates the need to solder the leads to the tracks, substantially reducing assembly costs. The studs can also act as heat sinks and conduct heat out of the IC, thus enabling a more powerful IC to be put into a smaller package.
A second embodiment of the invention will be described with reference to Figures 2A and B.
In this embodiment most parts are the same as in the first and are designated by like reference numerals. The principal difference lies in the studs 13, which are used to provide power supply and earth connections to the IC. Rather than using nuts to hold the IC down, it is soldered 14, to the studs 13.
Supplying the power through the larger studs leads to a cleaner supply and earth, with reduced earth bounce.
The present invention also aids conduction of heat away from the chip, both through the stud and because the body of the chip is brought into closer contact with the circuit board than is the case with normal surface mount soldering. If the circuit board is provided with a thermal plane, a metal sheet used to assist the conduction of heat away from components, the studs may be advantageously arranged to make a good thermal contact to it, thus further assisting conduction of heat from the IC.

Claims (23)

1. A combination of a circuit board and at least one integrated circuit package mounted on said board by engagement of at least one stud and at least one hole, electrical contact between the pins of said IC package and tracks of said circuit board being made by force exerted between said IC package and said board by means retaining said stud in said hole.
2. A combination of a circuit board and at least one integrated circuit package mounted on said circuit board by engagement of at least one stud and at least one hole, the position of the or a stud and the or a hole being in predefined relation to the pins of the IC package and tracks of the circuit board to ensure correct alignment of pins of said IC package and tracks of said circuit board.
3. A combination according to claim 2 further comprising retaining means for retaining said stud in said hole and exerting a force between said IC package and said circuit board to make electrical connections between pins of said IC package and tracks of said circuit board.
4. A combination according to claim 1, 2 or 3 wherein at least a part of the or a stud and the or a hole are noncircular in cross-section.
5. A combination according to claim 1, 2, 3 or 4 having a plurality of studs and holes for mounting said package, at least two of said studs and holes being different sizes or shapes than each other.
6. A combination according to any one of claims 1 to 5 wherein at least part of at least one of said studs is threaded and said retaining means is at least one nut.
7. A combination according to any one of claims 1 to 6 wherein the retaining means is at least one solder joint.
8. A combination according to any one of the preceding claims wherein the or each stud is provided on the circuit board and the or each hole provided on the IC package.
9. A combination according to any one of claims 1 to 8 wherein at least one power or earth connection to said chip is made through the or a stud and hole.
10. A combination according to any one of the preceding claims wherein the IC is of the surface mount type.
11. An integrated circuit package for use in a combination according to any one of the preceding claims.
12. A circuit board for use in a combination according to any one of the preceding claims.
13. An integrated circuit package having at least one through hole therein for receiving at least one stud thereby to be mounted on a circuit board, the or a said hole being sufficiently accurately positioned relative to pins of said package to ensure correct alignment thereof on mounting of said package on said circuit board.
14. A package according to claim 13 whereby the or a said hole is non-circular in cross-section.
15. A package according to claim 13 or 14 having a plurality of through holes at least two of which are of different shapes or sizes than each other.
16. A package according to any one of claims 13 to 15 where at least one power or earth connection to the IC is made through the or some stud(s) when the chip is mounted on said circuit board.
17. A package according to any one of claims 13 to 16 and of the surface mount type.
18. An integrated circuit package constructed and arranged to operate substantially as hereinbefore described with reference to and as illustrated in the accompanying drawings.
19. A circuit board having at least one projecting stud to engage a corresponding hole on an IC package to mount said package on said board, the or a stud being accurately positioned relative to tracks on said circuit board to ensure correct alignment of said IC package when it is mounted on said circuit board.
20. A circuit board according to claim 19 further comprising retaining means to retain an IC on said board in cooperation with the or a stud.
21. A circuit board constructed and arranged to operate substantially as hereinbefore described with reference to and as illustrated in, the accompanying drawings.
22. A method of assembling an electronic device comprising the steps of: providing a circuit board having at least one stud thereon and at least one IC with at least one hole corresponding to the or a stud on said circuit board; mounting the or an IC on said circuit board by engaging the or a hole with the or a stud; and providing means for retaining said IC on said stud.
23. A method of assembling an electronic device substantially as hereinbefore described.
GB9325195A 1993-12-08 1993-12-08 Integrated circuit package Expired - Fee Related GB2284713B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9325195A GB2284713B (en) 1993-12-08 1993-12-08 Integrated circuit package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9325195A GB2284713B (en) 1993-12-08 1993-12-08 Integrated circuit package

Publications (3)

Publication Number Publication Date
GB9325195D0 GB9325195D0 (en) 1994-02-09
GB2284713A true GB2284713A (en) 1995-06-14
GB2284713B GB2284713B (en) 1997-11-12

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Family Applications (1)

Application Number Title Priority Date Filing Date
GB9325195A Expired - Fee Related GB2284713B (en) 1993-12-08 1993-12-08 Integrated circuit package

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0757413A2 (en) * 1995-07-31 1997-02-05 Kontron Elektronik Gmbh Adapter with a carrier having a connection apparatus
EP0757414A2 (en) * 1995-07-31 1997-02-05 Kontron Elektronik Gmbh Adapter with a carrier having a connection apparatus
US7411763B2 (en) * 2003-05-12 2008-08-12 Sae Magnetics (H.K.) Ltd. Electrical connection between a suspension flexure cable and a head stack assembly flexible circuit
DE102008059452A1 (en) * 2008-11-28 2010-06-02 Hüttinger Elektronik Gmbh + Co. Kg Electronic component i.e. power semiconductor component, cooling arrangement, has conductor plates arranged at mounting body, where to-be-cooled electronic components electrically contact contacting connector or component of plates

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4293175A (en) * 1978-06-08 1981-10-06 Cutchaw John M Connector for integrated circuit packages
GB2202993A (en) * 1987-03-31 1988-10-05 Flexicon Systems Ltd Arrangement for mounting a chip carrier on a printed circuit board

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4967262A (en) * 1989-11-06 1990-10-30 Micron Technology, Inc. Gull-wing zig-zag inline lead package having end-of-package anchoring pins

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4293175A (en) * 1978-06-08 1981-10-06 Cutchaw John M Connector for integrated circuit packages
GB2202993A (en) * 1987-03-31 1988-10-05 Flexicon Systems Ltd Arrangement for mounting a chip carrier on a printed circuit board

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0757413A2 (en) * 1995-07-31 1997-02-05 Kontron Elektronik Gmbh Adapter with a carrier having a connection apparatus
EP0757414A2 (en) * 1995-07-31 1997-02-05 Kontron Elektronik Gmbh Adapter with a carrier having a connection apparatus
EP0757413A3 (en) * 1995-07-31 1998-05-20 Hitex Systementwicklung Gesellschaft für angewandte Informatik mbH Adapter with a carrier having a connection apparatus
EP0757414A3 (en) * 1995-07-31 1998-05-27 Hitex Systementwicklung Gesellschaft für angewandte Informatik mbH Adapter with a carrier having a connection apparatus
US7411763B2 (en) * 2003-05-12 2008-08-12 Sae Magnetics (H.K.) Ltd. Electrical connection between a suspension flexure cable and a head stack assembly flexible circuit
US7525768B2 (en) * 2003-05-12 2009-04-28 Sae Magnetics (H.K.) Ltd. Electrical connection between a suspension flexure cable and a head stack assembly flexible circuit
DE102008059452A1 (en) * 2008-11-28 2010-06-02 Hüttinger Elektronik Gmbh + Co. Kg Electronic component i.e. power semiconductor component, cooling arrangement, has conductor plates arranged at mounting body, where to-be-cooled electronic components electrically contact contacting connector or component of plates

Also Published As

Publication number Publication date
GB2284713B (en) 1997-11-12
GB9325195D0 (en) 1994-02-09

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PCNP Patent ceased through non-payment of renewal fee

Effective date: 20111208