GB2280547A - Printed circuit board with integral strip-line structure - Google Patents

Printed circuit board with integral strip-line structure Download PDF

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Publication number
GB2280547A
GB2280547A GB9313751A GB9313751A GB2280547A GB 2280547 A GB2280547 A GB 2280547A GB 9313751 A GB9313751 A GB 9313751A GB 9313751 A GB9313751 A GB 9313751A GB 2280547 A GB2280547 A GB 2280547A
Authority
GB
United Kingdom
Prior art keywords
layers
ribbons
dielectric material
printed circuit
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9313751A
Other versions
GB9313751D0 (en
GB2280547B (en
Inventor
David William Bowman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Quantel Ltd
Original Assignee
Quantel Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Quantel Ltd filed Critical Quantel Ltd
Priority to GB9313751A priority Critical patent/GB2280547B/en
Publication of GB9313751D0 publication Critical patent/GB9313751D0/en
Publication of GB2280547A publication Critical patent/GB2280547A/en
Application granted granted Critical
Publication of GB2280547B publication Critical patent/GB2280547B/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00Waveguides; Transmission lines of the waveguide type
    • H01P3/02Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
    • H01P3/08Microstrips; Strip lines
    • H01P3/088Stacked transmission lines
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0224Patterned shielding planes, ground planes or power planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/025Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • H05K1/0253Impedance adaptations of transmission lines by special lay-out of power planes, e.g. providing openings
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0224Patterned shielding planes, ground planes or power planes
    • H05K1/0225Single or multiple openings in a shielding, ground or power plane
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0183Dielectric layers
    • H05K2201/0191Dielectric layers wherein the thickness of the dielectric plays an important role
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/0929Conductive planes
    • H05K2201/09318Core having one signal plane and one power plane
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/0929Conductive planes
    • H05K2201/09327Special sequence of power, ground and signal layers in multilayer PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/0929Conductive planes
    • H05K2201/09336Signal conductors in same plane as power plane
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09672Superposed layout, i.e. in different planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09681Mesh conductors, e.g. as a ground plane
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards

Abstract

A printed circuit board in the farm of an integral strip-line structure comprises two spaced apart conducting ribbons 7 having therebetween a layer of stiff dielectric material 13 flanked on opposite sides with respective layers 17 of curable dielectric material on the outermost surfaces of which the ribbons are respectively mounted. Respective further layers 3, 5 of stiff dielectric material are provided on the outermost surfaces of the layers of curable material, conductive tracks 11 being supported on the stiff dielectric and/or curable layers 3, 5, 13, 15 or 17 and spaced laterally from the ribbons. Further provided are ground plates 9 disposed on the outermost surfaces respectively of the further layers 3, 5 and facing the ribbons. Heat and pressure is applied to the structure to cure the curable layers. The structure enables connection together of the ribbons exclusively at corresponding ends which simplifies calculation of the characteristic impedance of the structure. <IMAGE>

Description

Printed Circuit Board with Integral StrizLine Structure This invention relates to printed circuit boards (p c b's) and more particularly to such a board having an integral strip-line structure. Strip-line structures are provided in p c b's and act as connecting means for connecting the circuit elements mounted on the board. To this end a strip-line comprises a conductive ribbon located between layers of dielectric material on outer surfaces of which are provided common ground plate conductors so located in relation to the ribbon as to exhibit a predetermined characteristic impedance.
Traditionally, the characteristic impedance of the strip-line was determined by the dimensions of the ribbon conductor, the spacing between the ribbon conductor and the adjacent ground plates and the dielectric constant of the laminate material separating the ribbon conductor and the ground plates. Using standard p c b geometries and generally available inexpensive conductor and dielectric materials to make a p c b with an integral strip-line structure, of 1/16 inches nominal thickness, it was not possible to achieve a characteristic impedance of more than 50 ohms.
In our co-pending United Kingdom application No. 8927412.0, the contents of which are incorporated herein by reference, there is disclosed a p c b having an integral strip-line the characteristic impedance of which is substantially increased above 50 ohms by controlling the effective area of the ground plates which are opposed to the conductive ribbon by forming suitably sized apertures in the ground plates. This has the same effect as reducing the dielectric constant of the laminate material separating the ribbon and the ground plates without the need to employ relatively expensive dielectric material.
In practice the strip-line geometry is incorporated into the p c b design as a small part of a larger design and the latter may require complex multi-layer structure and layout. A multi-layer p c b is made up using many interleaved thin stiff layers of dielectric material each having etched copper laminated on one or opposite sides thereof and layers of uncured materials separating the thin stiff layers. This complex sandwich is formed into a single multi-layered laminate sheet when heat and pressure are applied to 'cure' the uncured materials which act as the glue between the layers.
Due to the many layers of laminate and curable material used in the construction of a multilayer p c b, it is very difficult accurately to control the spacing between the strip-line signal conductor and the strip-line ground plates. In order that the strip-line characteristic impedance be maintained within +/- 5% of a prescribed value, the spacing between stripline signal conductor and the ground plates must be accurate and repeatable.
It is an object of the present invention to provide a p c b with integral strip-line structure in which the control of the spacing between the strip-line and ground plates is improved whilst allowing the p c b to be made with many layer and thickness variations.
The present invention consists in a printed circuit board having an integral strip-line structure and comprising two spaced apart facing conducting ribbons, layer means disposed between said ribbons and having one or more layers of stiff dielectric material each of which is flanked on opposite sides thereof with respective layers of curable dielectric material, the conductive ribbons being disposed respectively at outer surfaces of outermost layers of said curable material, respective further layers of stiff dielectric material flanking outer surfaces of said outermost layers of curable material, conductive track means supported on said layer means and/or said further layers and spaced laterally of said ribbons, and ground plates disposed on outer surfaces of said further layers in facing relationship with said ribbons, said curable material being cured by heat and pressure applied to said structure.
In use, the strip-line ribbon conductors are connected only at their ends and therefore are disposed in parallel and, for the purpose of calculating the characteristic impedance, can be considered as a single conductor of twice the ribbon thickness. Also, the spacing between the ground plates can be taken as the sum of the spacing between each ribbon and the ground plate adjacent thereto since, provided the conductive ribbons are connected only at their corresponding ends, the layers between the ribbons play no significant part in the characteristics impedance calculation. The value of the strip-line characteristic impedance is accordingly independent of the curing under heat and pressure of the layers of curable material of the structure.
Advantageously, the ground plates include apertures which at least partly are disposed in facing relation relationship to the adjacent one of said ribbons and which are of dimensions which impart a predetermined characteristic impedance to the strip-line structure.
Preferably, the conductive ribbons are connected together only at corresponding ends thereof.
The invention will now be described, by way of example, with reference to the accompanying drawing which is a cross-sectional view of a p c b with integral strip-line structure according to the invention.
In the drawing a p c b generally indicated by the reference 1 comprises outer layers 3 and 5 of stiff dielectric material, suitably glass reinforced plastics (g r p). On opposite sides of each of the layers 3 and 5 are respectively provided, in facing relationship, a conductive ribbon 7 and a ground plate 9. Laterally of the ribbon and ground plate are disposed on opposite sides as the case may be of the layer 3 or 5, conductive tracks 11 of the p c b. Between the layers 3 and 5 are disposed a further layer 13 of stiff dielectric material having, if desired, further tracks 11 on one or opposite sides thereof and between which and the respective layers 3 and 5 are layers 15 and 17 of curable dielectric material. The layer 13 and layers 15 and 17, suitably, may comprise glass reinforced plastic. If desired, also, additional layers 13 can be provided between the layers 3 and 5 in which case each layer 13 is flanked on opposite sides by respective curable layers such as the layers 15 and 17.
The completed assembly is finally subjected to heat and pressure to cure and consolidate the layers of curable material.
In use, the ribbons 7 are electrically connected to one another only at their corresponding ends, such connections being provided either by the p c b manufacture or the user. Also, the ground plates 9 are formed with apertures 19 for control, as explained earlier, of the characteristic impedance of the strip-line. Further the width of the ribbons 7 as compared with that of the structure of our co-pending application No. 8927412.0 is reduced by 30%.
As explained earlier, the described structure is one in which, because the ribbons 7 are connected at their ends, effectively eliminates from the calculation of characteristic impedance the dimensions of the layers of curable and stiff dielectrie material between the ribbons. Accordingly, this calculation involves apart from dimensions of the ribbons and ground plates only the fixed dimensions of the layers 3 and 5.
Those skilled in the art, will appreciate that many changes, as for example, to the number and disposition of the tracks 11, can be made in the described embodiment of the invention without departing from the invention concept disclosed.

Claims (7)

Claims:
1. A printed circuit board having an integral strip-line structure and comprising two spaced apart facing conducting ribbons, layer means disposed between said ribbons and having one or more layers of stiff dielectric material each of which is flanked on opposite sides thereof with respective layers of curable dielectric material, the conductive ribbons being disposed respectively at outer surfaces of outermost layers of said curable material, respective further layers of stiff dielectric material flanking outer surfaces of said outermost layers of curable material, conductive track means supported on said layer means and/or said further layers and spaced laterally of said ribbons, and ground plates disposed on outer surfaces of said further layers in facing relationship with said ribbons, said curable material being cured by heat and pressure applied to said structure.
2. A printed circuit board as claimed in claim 1, wherein said ground plates include apertures which at least partly are disposed in facing relation relationship to the adjacent one of said ribbons and which are of dimensions which impart a predetermined characteristic impedance to the strip-line structure.
3. A printed circuit board as claimed in claim 1 or claim 2, wherein the conductive ribbons are connected together only at corresponding ends thereof.
4. A printed circuit board as claimed in any preceeding claim, wherein said layers of stiff and of curable dielectric material comprise glass reinforced plastics.
5. A strip line comprising an integral, multi-layered structure in which a conducting ribbon is supported between two conducting planes by dielectric material and wherein the conducting ribbon comprises first and second ribbon components spaced apart from one another in facing relationship by dielectric material.
6. A printed circuit board having an integral strip line structure as claimed in claim 5.
7. A printed circuit board substantially as herein described with reference to the accompanying drawing.
GB9313751A 1993-07-02 1993-07-02 Printed circuit board with integral strip-line structure Expired - Lifetime GB2280547B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9313751A GB2280547B (en) 1993-07-02 1993-07-02 Printed circuit board with integral strip-line structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9313751A GB2280547B (en) 1993-07-02 1993-07-02 Printed circuit board with integral strip-line structure

Publications (3)

Publication Number Publication Date
GB9313751D0 GB9313751D0 (en) 1993-08-18
GB2280547A true GB2280547A (en) 1995-02-01
GB2280547B GB2280547B (en) 1997-04-16

Family

ID=10738216

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9313751A Expired - Lifetime GB2280547B (en) 1993-07-02 1993-07-02 Printed circuit board with integral strip-line structure

Country Status (1)

Country Link
GB (1) GB2280547B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018091503A1 (en) * 2016-11-18 2018-05-24 Telegärtner Karl Gärtner GmbH Electrical plug socket

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB795559A (en) * 1955-11-14 1958-05-28 Sanders Associates Inc Improvements relating to high frequency electric transmission lines
GB986672A (en) * 1960-07-07 1965-03-17 Sanders Associates Inc Improvements in high frequency circuit units
GB1095103A (en) * 1966-03-25 1967-12-13 Mullard Ltd Variable-impedance transmission-line device
US4639693A (en) * 1984-04-20 1987-01-27 Junkosha Company, Ltd. Strip line cable comprised of conductor pairs which are surrounded by porous dielectric

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB795559A (en) * 1955-11-14 1958-05-28 Sanders Associates Inc Improvements relating to high frequency electric transmission lines
GB986672A (en) * 1960-07-07 1965-03-17 Sanders Associates Inc Improvements in high frequency circuit units
GB1095103A (en) * 1966-03-25 1967-12-13 Mullard Ltd Variable-impedance transmission-line device
US4639693A (en) * 1984-04-20 1987-01-27 Junkosha Company, Ltd. Strip line cable comprised of conductor pairs which are surrounded by porous dielectric

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018091503A1 (en) * 2016-11-18 2018-05-24 Telegärtner Karl Gärtner GmbH Electrical plug socket

Also Published As

Publication number Publication date
GB9313751D0 (en) 1993-08-18
GB2280547B (en) 1997-04-16

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Legal Events

Date Code Title Description
PE20 Patent expired after termination of 20 years

Expiry date: 20130701