GB2276784A - Shifting spurious frequencies away from received frequency - Google Patents
Shifting spurious frequencies away from received frequency Download PDFInfo
- Publication number
- GB2276784A GB2276784A GB9305885A GB9305885A GB2276784A GB 2276784 A GB2276784 A GB 2276784A GB 9305885 A GB9305885 A GB 9305885A GB 9305885 A GB9305885 A GB 9305885A GB 2276784 A GB2276784 A GB 2276784A
- Authority
- GB
- United Kingdom
- Prior art keywords
- microprocessor
- frequency
- communications device
- crystal
- radio communications
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B15/00—Suppression or limitation of noise or interference
- H04B15/02—Reducing interference from electric apparatus by means located at or near the interfering apparatus
- H04B15/04—Reducing interference from electric apparatus by means located at or near the interfering apparatus the interference being caused by substantially sinusoidal oscillations, e.g. in a receiver or in a tape-recorder
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B2215/00—Reducing interference at the transmission system level
- H04B2215/064—Reduction of clock or synthesizer reference frequency harmonics
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Oscillators With Electromechanical Resonators (AREA)
Abstract
A receiver of a radio communications device (10) is susceptible to interference from harmonics, generated by a microprocessor (15) in response to its clock rate. The clock rate of the microprocessor (15) is controllably selected from at least two alternative operating frequencies (f1 and f2) provided by a crystal oscillator (12), whereby a harmonic generated by the clock rate of the microprocessor (15) is shifted out of the reception channel. <IMAGE>
Description
A RADIO COMMUNICATIONS DEVICE
Background to the Invention
This invention relates, in general, to radio communications devices and is particularly applicable to circuits that control the frequency of operation of a microprocessor in such a radio communication device.
Summarv of the Prior Art
As will be appreciated, in order that a microprocessor functions correctly, operation of the microprocessor is maintained at an accurate clocking frequency supplied by a crystal oscillator. If the microprocessor is used in a radio communications device, such as a MX1000 radio manufactured by Motorola Inc, a receiver of the device will be susceptible to interference from harmonics of the crystal oscillator frequency if these harmonics exist in a reception channel that is currently being received by the radio communications device.The screening of the crystal oscillator and the microprocessor is an inadequate remedy for this effect since conventional receiver sensitivities are in the region of -0.2uV. However, this does not mean that screening of the crystal oscillator and microprocessor are unnecessary. On the contrary, the crystal oscillator and microprocessor must be screened as effectively as possible in order to prevent adverse effects on other electronic equipment susceptible to the effects thereof.
In order to mitigate the problem of harmonics in the receive channel (caused microprocessor operation), "pulling circuits1, are used to temporarily adjust the frequency generated by the crystal oscillator and thereby move the clocking rate of the microprocessor within an allowable limit. More specifically, whenever a harmonic of the microprocessor clock occurs in the reception channel, the microprocessor clock frequency is pulled out of the reception channel by the pulling circuit. As will be appreciated, the pulling circuit comprises, amongst other things, varactor diodes and capacitors.
Pulling of the crystal oscillator frequency is self regulated by the microprocessor in conjunction with personality information stored, typically, in an EEPROM. The personality information indicates whether a clock shift is to be performed subject to a currently active receive frequency for the communications device. The personality information is predetermined, at initilization of the radio communications device, by manual measurement, performed by a skilled technician, of microprocessor harmonics in receiver channels of the radio. Since the personality information is stored at the outset, it has been found that, in certain circumstances, such as changes in ambient operating temperature and ageing of the device in general, the method by which the crystal oscillator is adjusted (pulled) is inadequate.More specifically, the components that comprise the pulling circuitry are subject to operational variation resulting from changes in temperature, supply voltage and ageing of the components in general. Therefore, although convention pulling circuits have considerable tolerances, in certain circumstances these tolerances are insufficient to shift the operating frequency of the microprocessor away from a harmonic in the reception channel. Typically, a pulling circuit has a capacity of shifting the operating frequency of the microprocessor by -350ppm. In addition, this figure is considerably lower if a small crystal, such as a SHD crystal, and low frequencies (less than 8MHz) are used.This narrow pulling range prevents use of such pulling circuits in lower-medium or long wave communications devices because a frequency variation of as little as 350ppm may represent a loss of a number of receive channels, or at least restricted use of the available frequency band. Since an operating wavelength of a communications device determines the required amount of clock shift, the terms lower-medium and long wave should be construed according to the limitations imposed by the frequency shift of present pulling circuits (-350ppm). Clearly, the lower the operating frequency, the wider the required clock shift.
As will be understood that the shift in operating frequency of the microprocessor must be wide and accurate enough to cover all receiver bands.
It can be appreciated that there is a requirement to provide circuit for shifting the operating frequency of a microprocessor whilst remaining within the operational tolerances of the microprocessor and which is devoid of the inherent problems of the prior art described above.
Summarv of the Invention
In accordance with the invention, there is provided a radio communications device comprising: a receiver for receiving a plurality of radio frequency channels; a microprocessor operable at a clock rate; crystal oscillator circuitry, having at least two alternative operating frequencies, for providing the clock rate; and selection means, coupled to the crystal oscillator circuitry and responsive to a frequency of a current radio frequency channel received by the receiver, for selecting one of the at least two alternative frequencies as the clock rate; wherein the selection means selects one of said at least two alternative operating frequencies such that harmonics generated by the microprocessor in response to the selected clock rate do not substantially appear in the current radio frequency channel.
In a preferred embodiment, the crystal oscillator circuitry comprises a single crystal, having an electrode pattern configured to enable the at least two alternative frequencies to be generated therefrom.
The radio communications device may further comprise memory, coupled to the microprocessor, for storing switching information, wherein: the switching information pertains to the relationship between received radio frequency channels and clock rates at which harmonics substantially appear in those channels; and the selection means selects one of said at least two alternative operating frequencies in response to the switching information.
Additionally, the radio communications device may further comprise a timing circuit, coupled to the crystal oscillator circuitry and operable during a transition between the at least two alternative frequencies, for providing a smooth transition in the clock rate and thereby ensuring continuity in microprocessor operation.
In the preferred embodiment, a frequency separation between the at least two alternative operating frequencies is selected so as not to affect substantially the operation of the microprocessor at the clock rates provided thereby.
An exemplary embodiment of the present invention will now be described with reference to the accompanying drawings.
Brief Description of the Drawings
Fig. I shows a dual frequency crystal oscillator circuit constructed in accordance with a preferred embodiment of the present invention.
Fig. 2 illustrates a detailed realisation of the circuit of Fig. 1.
Fig. 3 illustrates a prior art crystal oscillator suitable for implementation with the present invention.
Fig. 4 illustrates a detailed circuit suitable for implementing the crystal oscillator of Fig. 3.
Fig. 5 illustrates a crystal oscillator circuit providing two output frequencies in accordance with an alternative embodiment of the present invention.
Detailed Description of a Preferred Embodiment
With reference to Fig. 1, there is shown a crystal oscillator circuit for providing a frequency shift in the operating frequency of a microprocessor 15 responsive to the crystal oscillator. A crystal oscillator, formed from a crystal 12 coupled to an active oscillator 14, such as a Colpitts oscillator, is coupled to the microprocessor 15. The aforementioned structure may form part of a radio communications device 10 responsive to a spectrum 11 of different radio frequency channels. A receiver 19 of the radio communications device 10 is configured to selectively receive a desired frequency channel from the spectrum 11.The pictorial representation of an antenna in the figure is for illustrative purposes and should be interpreted as incorporating receiver circuitry and, optionally, transmitter circuitry for the radio communications device 10.
The crystal 12 comprises a cathode 16, coupled to active oscillator circuit 14, and two anodes 18, 20. Each anode 18, 20 is coupled through a switch 22, 24 to ground. The selective closure of one of the two switches generates one of two frequencies fl and f2. Basically, a crystal is surrounded by a Y-shape configuration of electrodes disposed on a crystal (or resonator) plate and arranged to obtain frequencies fi and f2 depending upon which one of the two anodes is operatively coupled within the circuit. Thus, the frequency of the crystal and hence a frequency of operation for a microprocessor coupled thereto, can be shifted between the two frequencies provided by the crystal 12, subject to the closure of one of the two switches 22 and 24.The microprocessor 15 is coupled to a memory 17, typically in the form of a look-up table, in which is stored switching information (personality information) that dictates which one of the two crystal frequencies fl and f2 is selected at each receive frequency 11 in the spectrum 11. As will be appreciated, switches 22 and 24 are selectively dosed by a control signal 30 generated by the microprocessor 15 in response to the stored switching information (personality information).
The ability to selectively shift the operating frequency (clock rate) of the microprocessor between two frequencies fl and f2 therefore provides a mechanism for removal of frequency harmonics, generated by a microprocessor 15 in response to a clocking rate (frequency) provided by a crystal oscillator, from a current receive frequency channel for the radio communications device 10. Since the crystal 12 acts as a dual frequency oscillator and provides a frequency shifting capability, the two frequencies f and f2 of the crystal oscillator are chosen to be sufficiently far apart for a frequency shift to be possible even in low-band radio communication devices. In the simplest case, the switches 22, 24 can be implemented using simple silicon switching diodes.
The microprocessor shifts the clocking rate in response to a current frequency of reception for the communications device and the personality information stored in the memory. The personality information contained in the memory 17 is based on the following analysis.
The range of interference generated by a microprocessor's clock oscillator in a receiver channel is governed by the equations:
Upper interference frequency,
Lower interference frequency,
where:
n is the nth (integer) harmonic of the clock oscillator;
fClk is the rated frequency of the clock oscillator; AfClk is the deviation of the clock oscillator frequency from its rated output frequency;
B is the bandwidth of the receiver channel; and
AfRec is the deviation in the receiver frequency from a rated frequency of reception;
It can be shown that the minimum clock shift required to eliminate clock oscillator harmonics from a receiver channel is:
2AfRec B shift (min) = 2AfCIk + n + This can best be illustrated by way of example.For a radio communications device operating at a nominal (midband) carrier frequency of 66MHz and a channel separation of 25kHz; having a microprocessor clocking frequency of 4Mz + 100ppm; an operating receiver bandwidth of 15kHz and a deviation from the rated frequency of reception of + 1kHz
The number of harmonics present in this nominal carrier frequency is:
with the minimum clock shift being:
(2 (,i,) = (2 x 400Hz) + (2 x 1000)Hz 15kHz fshift (min) = (2 x 400Hz) + 16 + l6 = 1863Hz (or 465ppm).
For a radio communications device operating at a nominal (lowband) carrier frequency of 30MHz and a channel separation of 25kHz; having a microprocessor clocking frequency of 4Mz + 100ppm; an operating receiver bandwidth of 15kHz and a deviation from the rated frequency of reception of + lkHz,
The number of harmonics present in this nominal carrier frequency is:
with the minimum clock shift being:
(2 (min) = (2 X 400Hz) + (2 x 1000)Hz 15kHz fshift (min) = (2 x 400Hz) + e 7 ) + =3229Hz (or 807ppm).
It will be appreciated that the frequencies fl and f2 are selected not only to satisfy the required frequency shift, but also to guarantee correct operation of the microprocessor 15, i.e. after shifting the frequency of the crystal oscillator from, say fl, its usual operating frequency to its second frequency (f2), the frequency f2 used as the new clock rate remains within an operational tolerance of the clock rate set by a manufacturer of the microprocessor.
With reference to Fig. 2, the crystal oscillator circuit of Fig. 1 is illustrated in greater detail. It will be appreciated that the microprocessor 15 comprises a buffer circuit 25, such as an oscillator, in order to buffer and preferably amplify and invert a frequency signal transmitted thereto from the active oscillator 14. The described configuration provides a high performance solution in which the internal oscillator buffers and amplifies a frequency signal transmitted to the microprocessor from the external crystal oscillator. As will be appreciated, the use of a buffer provides good reverse isolation between the external crystal oscillator and internal microprocessor circuitry.It will be appreciated that the use of an external oscillator in association with an internal oscillator (buffer), located inside the microprocessor, leads to favourable transmission properties, i.e. high frequency accuracy (without any need for alignment) and high temperature stability. Additionally, this high performance solution allows the frequency of the circuit to be easily measured with a suitable test circuit without causing "pulling" of the frequency with a load located therein.
In the event that the microprocessor 15 comprises an internal oscillator, the external oscillator circuit 14 may be disconnected from the circuit. In this case, the crystal 12 is coupled directly to internal oscillator and thereby provides a low/medium performance solution in accordance with the present invention. This solution provides medium or low frequency accuracy (with or without frequency alignment respectively) and low temperature stability. This low or medium performance is the result of variations in parasitic capacitances arising from temperature and supply voltage fluctuations. Clearly, this solution has the advantage of a reduced bit count at the expense of operating performance.
A decoupling capacitor will be typically provided between the output from the Colpitts oscillator and the input to the microprocessor.
Now, concentrating on the switching network required by the crystal oscillator 12 to switch between frequencies fl and f2. A frequency control signal 30 is provided, in succession, to two (H)CMOS inverters 32 and 34. An output from the first inverter 32 is tapped and communicated through a series combination of a resistor R1 and a diode Dl to the first anode 18 of the crystal oscillator 12. A capacitor C1 is coupled between ground potential and a first circuit node 35 located between the resistor R1 and the anode of diode
D1. A second diode D2 has its anode coupled to the cathode of the first diode
D1 and its cathode coupled to ground potential. An output from the second inverter 34 is communicated through a series combination of a second resistor R2 and a third diode D3 to the second anode 20 of the crystal oscillator 12.A capacitor C2 is coupled between ground potential and a second circuit node 36 located between the second resistor R2 and the anode of third diode
D3. A fourth diode D4 has its anode coupled to the cathode of the third diode
D3 and its cathode coupled to ground potential.
A frequency control signal applied to either the first or second inverter (32, 34) selects one of the two frequencies (f1, f2) and biases the corresponding anode 18, 20 accordingly. It will be appreciated that the resistors R1 or R2 are selected to ensure! that a required DC current is obtained for biasing. In addition, the resistor-capacitor combinations RiCi and R2C2 are selectively chosen to ensure that there is a gentle switching over between frequencies fi and f2, brought about by a change in the frequency control signal 30. It will be appreciated that this gentle switching is important to maintain correct operation of the microprocessor 15.
It will further be understood by one skilled in the art that the Colpitts oscillator 14 may be substituted for any other suitable external oscillator, or an oscillator internally located within the microprocessor, and that a comprehensive description of structure and operation of such an oscillator will not be undertaken for the sake of brevity.
Now, referring to Fig. 3, there is shown an alternative circuit for a crystal oscillator circuit for providing a crystal controlled frequency shift in the operating frequency of a microprocessor. A crystal 40 has substantially an identical configuration to that already described for the Y-shaped crystal 12 of
Fig. 1 and 2. However, the crystal 40 is known as a dual crystal and is currently available "off the shelf". Such a dual crystal 40 is typically implemented in filter technology. The crystal 40 requires a slightly more complicated switching network in order to switch between its two operating frequencies. Again, the crystal 40 has a Y-shaped electrode configuration, with two anodes 42 and 44. The first anode 42 is coupled to both the second electrode, through a switch 46, and to ground.The second anode is coupled to a positive input of an oscillator circuit 14 through a second switch 48. The cathode of the crystal 40 is coupled through a third switch 50 to the positive input of the oscillator circuit 14. In the event that switches 46 and 50 are closed whilst 48 is open, a first frequency fl, known as the symmetric mode, is selected. With the reversal of the switches, a second frequency f2, known as the asymmetric mode, is selected. Selective activation of one of the two anodes 42, 44 causes the crystal oscillator 40 to vibrate at one of two different crystal controlled resonant frequencies.
Fig. 4 illustrates a switching network suitable for implementation with the crystal 40 of Fig. 3. The switches 46 - 50 of the crystal circuit of Fig. 3 are embodied by switching diodes D or transistor Q. Resistors R and R determine the current through the diodes D. A voltage drop generated at R1 acts as a reverse bias voltage for a diode not connected through to the oscillator circuit 14. The chokes (inductors) L and L1 offer a maximum impedance at the chosen crystal frequency. Alternatively, inductor L1 can be replaced by a further diode.As will be appreciated with reference to the schematic diagram, a high level provided at a frequency control input 60 selects a first frequency fl in the symmetric mode whilst a low input at the frequency control input 60 selects the second frequency 2 in the asymmetric mode.
It will be appreciated that an invention so designed and described produces the novel advantages of a crystal oscillator circuit for a radio communications device that can be selectively switched between two crystal controlled operating frequencies and thereby eliminate frequency harmonics in a received channel of the communications device. Furthermore, a frequency oscillator that has two selectable frequency modes is unaffected by variations in temperature and applied voltage and provides a crystal oscillator that is suitable for implementation within the lower medium and long wave region of the radio spectrum. Furthermore, the decision on whether to shift the clocking frequency of the microprocessor has been fully automated as a result of the use of two accurate crystal frequencies.In addition, the implementation of a standard dual crystal of the invention eliminates the requirement for a specialist technician to use expensive test equipment in order to manually test a receiver stage of a radio communications device for microprocessor harmonics, and, where necessary, reprogramme when a clock shift for the device should occur.
Additionally, there is a corresponding reduction in manufacturing costs resulting from the employment of a semi-skilled technician in the place of a skilled technician and a saving in the cost of the teat equipment.
It will, of course, be understood that the above description has been given by way of example only and that modifications in detail, such as the substitution of the dual frequency oscillator by two separate crystal oscillators having two different output frequencies, as illustrated in Fig. 5, may be made within the scope of the invention. It will be appreciated that the configuration of Fig. 5 must include a suitable switching network (not shown) for switching between the two separate crystals. More specifically, the switching network must ensure that a clock rate provided to the microprocessor is not interrupted to an extent where microprocessor malfunction is likely to occur. Furthermore, the dual frequency oscillator may be further substituted for a single crystal oscillator having an anode structure with more than two anode, thereby providing more than two selectable output frequencies. Additionally, the Y-shaped configuration of electrodes may be reversed such that there are two cathodes and one anode.
Claims (7)
1. A radio communications device comprising:
a) a receiver for receiving a plurality of radio frequency channels;
b) a microprocessor operable at a clock rate;
c) crystal oscillator circuitry, having at least two alternative operating frequencies, for providing the clock rate; and
d) selection means, coupled to the crystal oscillator circuitry and responsive to a frequency of a current radio frequency channel received by the receiver, for selecting one of the at least two alternative frequencies as the clock rate;
wherein the selection means selects one of said at least two alternative operating frequencies such that harmonics generated by the microprocessor in response to the selected clock rate do not substantially appear in the current radio frequency channel.
2. The radio communications device as claimed in claim 1, wherein the crystal oscillator circuitry comprises a single crystal, having an electrode pattern configured to enable the at least two alternative frequencies to be generated therefrom.
3. The radio communications device as claimed in claim 1 or 2, further comprising memory, coupled to the microprocessor, for storing switching information, wherein:
the switching information pertains to the relationship between received radio frequency channels and clock rates at which harmonics substantially appear in those channels; and
the selection means selects one of said at least two alternative operating frequencies in response to the switching information.
4. The radio communications device as claimed in claim 1, 2 or 3, further comprising a timing circuit, coupled to the crystal oscillator circuitry and operable during a transition between the at least two alternative frequencies, for providing a smooth transition in the clock rate and thereby ensuring continuity in microprocessor operation.
5. The radio communications device as claimed in any preceding claim, wherein a frequency separation between the at least two alternative operating frequencies is selected so as not to affect substantially the operation of the microprocessor at the clock rates provided thereby.
6. The radio communications device as claimed in any preceding claim, wherein the crystal oscillator circuitry comprises:
a) a crystal; and
b) an oscillator internal to the microprocessor.
7. A radio communications device substantially as described hereinabove with reference to the accompanying drawings.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9305885A GB2276784A (en) | 1993-03-22 | 1993-03-22 | Shifting spurious frequencies away from received frequency |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9305885A GB2276784A (en) | 1993-03-22 | 1993-03-22 | Shifting spurious frequencies away from received frequency |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| GB9305885D0 GB9305885D0 (en) | 1993-05-12 |
| GB2276784A true GB2276784A (en) | 1994-10-05 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9305885A Withdrawn GB2276784A (en) | 1993-03-22 | 1993-03-22 | Shifting spurious frequencies away from received frequency |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2276784A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2292867A (en) * | 1994-09-30 | 1996-03-06 | Matsushita Electric Ind Co Ltd | Radio system with means to reduce interference due to radiation of clock signal |
| GB2310966A (en) * | 1996-03-04 | 1997-09-10 | Motorola Inc | Method and apparatus for eliminating interference caused by spurious signals in a communication device |
| EP0803997A2 (en) * | 1996-04-26 | 1997-10-29 | Nokia Mobile Phones Ltd. | A method and arrangement for producing a clock frequency in a radio device |
| WO1998009393A1 (en) * | 1996-08-27 | 1998-03-05 | Siemens Aktiengesellschaft | Process for reducing internal interference in mobile radio apparatus |
| WO2000003488A2 (en) * | 1998-07-13 | 2000-01-20 | Safety 1St, Inc. | Device for transmitting and receiving audible signals |
| GB2408899A (en) * | 2003-12-04 | 2005-06-08 | Imagination Tech Ltd | DAB receiver which looks up non-interfering digital processing clock frequencies from a table for each RF reception channel |
| WO2007008748A1 (en) * | 2005-07-08 | 2007-01-18 | Qualcomm Incorporated | Methods and apparatus for radio frequency interference reduction |
| WO2007018888A2 (en) * | 2005-07-29 | 2007-02-15 | Silicon Laboratories, Inc. | Television receiver suitable for multi-standard operation and method therefor |
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| WO1984001857A1 (en) * | 1982-11-08 | 1984-05-10 | Motorola Inc | An improved trapped energy resonator for multiple resonator application |
| GB2194696A (en) * | 1986-03-26 | 1988-03-09 | Gen Electric | Digital radio communications devices |
| US4879758A (en) * | 1987-01-02 | 1989-11-07 | Motorola, Inc. | Communication receiver system having a decoder operating at variable frequencies |
| GB2250877A (en) * | 1990-09-22 | 1992-06-17 | Motorola Israel Ltd | Shifting spurious frequencies away from signal frequency |
-
1993
- 1993-03-22 GB GB9305885A patent/GB2276784A/en not_active Withdrawn
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| WO1984001857A1 (en) * | 1982-11-08 | 1984-05-10 | Motorola Inc | An improved trapped energy resonator for multiple resonator application |
| GB2194696A (en) * | 1986-03-26 | 1988-03-09 | Gen Electric | Digital radio communications devices |
| US4879758A (en) * | 1987-01-02 | 1989-11-07 | Motorola, Inc. | Communication receiver system having a decoder operating at variable frequencies |
| GB2250877A (en) * | 1990-09-22 | 1992-06-17 | Motorola Israel Ltd | Shifting spurious frequencies away from signal frequency |
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6345172B1 (en) | 1994-08-30 | 2002-02-05 | Matsushita Electric Industrial Co., Ltd. | Radio system which overcomes signal interference from clock oscillation circuit |
| GB2292867B (en) * | 1994-09-30 | 1997-06-11 | Matsushita Electric Ind Co Ltd | A radio transmission and reception system |
| GB2292867A (en) * | 1994-09-30 | 1996-03-06 | Matsushita Electric Ind Co Ltd | Radio system with means to reduce interference due to radiation of clock signal |
| DE19708797C2 (en) * | 1996-03-04 | 2002-05-16 | Motorola Inc | Method and device for eliminating interference caused by interference signals in a communication device |
| US5745848A (en) * | 1996-03-04 | 1998-04-28 | Motorola, Inc. | Method and apparatus for eliminating interference caused by spurious signals in a communication device |
| GB2310966A (en) * | 1996-03-04 | 1997-09-10 | Motorola Inc | Method and apparatus for eliminating interference caused by spurious signals in a communication device |
| AU719164B2 (en) * | 1996-03-04 | 2000-05-04 | Google Technology Holdings LLC | Method and apparatus for eliminating interference caused by spurious signals in a communication device |
| GB2310966B (en) * | 1996-03-04 | 2000-09-27 | Motorola Inc | Method and apparatus for eliminating interference caused by spurious signals in a communication device |
| EP0803997A2 (en) * | 1996-04-26 | 1997-10-29 | Nokia Mobile Phones Ltd. | A method and arrangement for producing a clock frequency in a radio device |
| EP0803997A3 (en) * | 1996-04-26 | 2000-01-19 | Nokia Mobile Phones Ltd. | A method and arrangement for producing a clock frequency in a radio device |
| WO1998009393A1 (en) * | 1996-08-27 | 1998-03-05 | Siemens Aktiengesellschaft | Process for reducing internal interference in mobile radio apparatus |
| WO2000003488A3 (en) * | 1998-07-13 | 2001-08-09 | Safety First Inc | Device for transmitting and receiving audible signals |
| WO2000003488A2 (en) * | 1998-07-13 | 2000-01-20 | Safety 1St, Inc. | Device for transmitting and receiving audible signals |
| US7675996B2 (en) | 2003-02-28 | 2010-03-09 | Johnson Richard A | Television receiver suitable for multi-standard operation and method therefor |
| GB2408899A (en) * | 2003-12-04 | 2005-06-08 | Imagination Tech Ltd | DAB receiver which looks up non-interfering digital processing clock frequencies from a table for each RF reception channel |
| WO2007008748A1 (en) * | 2005-07-08 | 2007-01-18 | Qualcomm Incorporated | Methods and apparatus for radio frequency interference reduction |
| WO2007018888A2 (en) * | 2005-07-29 | 2007-02-15 | Silicon Laboratories, Inc. | Television receiver suitable for multi-standard operation and method therefor |
| WO2007018888A3 (en) * | 2005-07-29 | 2008-02-14 | Silicon Lab Inc | Television receiver suitable for multi-standard operation and method therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| GB9305885D0 (en) | 1993-05-12 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |