GB2268277A - Testing electronic circuits - Google Patents

Abstract

A test system for electronic circuit boards (38) including integrated circuits (27, 28) having integral boundary scan circuits (29, 32) includes a manufacturing defects analyser having at least one robotic probe (37). In use, a first scan circuit (29) is arranged to apply a signal to an interface connection (30) to be tested and the signal is sensed by a probe (37); and a second scan circuit (32) is arranged to sense any signal transmitted by an interface (34) under test when a signal is injected by the probe (37). The robotic probes are also used to measure, e.g. impedance, voltage drop and V/l curves on discrete components (36). The robotic probes may also drive and/or sense analog signals. <IMAGE>

Description

IMPROVEMENTS IN OR RELATING TO ELECTRONIC CIRCUIT TEST APPARATUS This invention relates to systems for testing electronic circuit boards and more especially it relates to the testing of printed circuit boards carrying a plurality of boundary scan integrated circuit components.

Boundary scan integrated circuit components are generally well known and essentially comprise test registers responsive to signals for effecting test procedures appertaining to integrated circuits carried by the board.

It is well known among those familiar with the art that faults on electronic circuit boards may include, for example, open and short circuit interconnections, wrong component values, missing components or wrong orientation, or electrically or mechanically damaged input or output interfaces to integrated circuits. One known test method involves the use of a so called manufacturing defect analyser (MDA). which is used to measure characteristics such as impedance, voltage drop and V/I curves for discrete components such as resistors, capacitors, inductors and diodes, and for measuring diode characteristics of transistors and some integrated circuits. The MDA is usually used without applying normal power to a board under test.In MDA equipment, at least two and typically up to six connections to measuring instruments are used, the instruments being selected by first switching means and routed via a second switching means through either a 'bed of nails' test fixture, or at least two robotic probes.

Although an MDA method is considered cost effective and eminently suitable for the above mentioned test purposes, it is however, less useful for testing vulnerable integrated circuit input and output interfaces such as input/output transistors, bond wires, or soldered joints etc, when they are interconnected on a board.

Therefore, such faults are usually identified by the application of circuit test exercises known as 'functional' testing and/or 'in-circuit' testing. In order to exercise a particular integrated circuit it is necessary to propagate test patterns to and from the integrated circuit either directly or via intermediate circuits through off-board ports, a hand-held probe, or a 'bed of nails' contact arrangement.

These 'functional' and/or 'in-circuit' test approaches to integrated circuit interface fault diagnosis, usually involve difficult programming and expensive automatic test equipment as compared with the relatively simple MDA methods used for discrete components.

Statistics show that faults usually occur at an integrated circuit to board interface rather than within a device core. Faults of this kind can however be identified by making use of boundary scan integrated circuit techniques which as hereinbefore explained, can be used when integrated components include integrated test registers at input and output terminals which can be used to drive/sense the aforementioned input/output transistors, bond wires, or soldered joints etc. Although boundary scan integrated circuits make it simple to propagate test patterns through a device under test, the circuit must nevertheless be sensed and/or driven externally and hitherto this has been achieved using 'functional' and/or 'in-circuit' programming and access methods which involve significant equipment and programming costs.

It is an object of the present invention to provide a test system for integrated circuit boards of the kind embodying boundary scan integrated circuits which is cost effective both in terms of the equipment required and in terms of the programming needed for effective operation.

According to the present invention we provide a test system for electronic circuit boards which embody integrated circuits having integral boundary scan circuits, wherein access to the board for the purpose of test signal injection and/or test signal sensing is effected using an MDA having at least one robotic probe, and wherein the boundary scan circuits are used to complete a simple two terminal test circuit which includes an interface connection to be tested.

Such a test is in the simplicity domain of MDA instruments and programs. This is in contrast to known usage of boundary scan, which has hitherto been associated only with complex functional test patterns, such as maybe used by 'functional'rin-circuit' automatic testers and other so-called boundary scan testers.

The MDA may include means for applying analog as well as digital signals whereby the testing of certain discrete components is additionally facilitated.

Thus, whereas with known test arrangements both an MDA and a 'functional'/'in-circuit' tester were needed for a comprehensive electronic board test, with a test system according to this invention tests can be completed with an MDA alone.

Some embodiments of the invention will now be described by way of example only with reference to the accompanying drawings, in which: FIGURE 1 is a somewhat schematic perspective view illustrating a known test use of robotic probes; FIGURE 2 is a somewhat schematic block diagram/perspective view showing a known test system; and FIGURE 3 is a somewhat schematic perspective view of a part of an integrated circuit embodying boundary scan adapted for testing with a robotic probe.

Referring now to Figure 1, a circuit board 1 includes a pair of integrated circuits 2 and 3, and a discrete component 6. The integrated circuit 2, carries transistors 4, Sa and 5b, and similarly the integrated circuit 3, carries transistors 7, 8 and 9. Connection terminal legs 10, are provided on the integrated circuits which serve to couple the integrated circuits 2 and 3 as appropriate to externally accessible connections or test terminals 11.It will be appreciated that although the discrete component 6 may easily be tested by means of robotic probes 12, shown schematically, the transistors 4, 3a and 5b of the integrated circuit 2 and the transistors 7, 8 and 9 of the integrated circuit 3, are not quite so simple to test and in particular a faulty interconnection 13, which might be an open circuit, cannot be detected by means of the probes 12 because bond wires are involved which are internal to the integrated circuit.

In order to detect the faults of the kind shown in Figure 1, an arrangement, as shown in Figure 2, may be provided which in the present case is used for exercising integrated circuits 14; 13 and 16, which are shown schematically, and which may form a part of a much larger integrated circuit board. The arrangement comprises an automatic tester 17 having drive registers 18 and sense registers 19.

The drive registers are coupled to the integrated circuits via 'bed of nails' spring contact terminals 20 and the sense registers are similarly connected via 'bed of nails' spring contact terminals 21.

Digital signals 22 are applied to the integrated circuit 15 which propagates test signals as shown by waveform 23 which are sensed by the sense registers 19. Some of the signals pass to and from the test circuit 15 via the other integrated circuits 14 and 16, due to limitations of accessibility. In order to identify particular faults the test procedure may be controlled by a computer programme and operator test instructions may be displayed on a screen 24 which has associated with it a keyboard 25 which is used as an interface between the programme and the operator. Additionally, a hand-held probe 26 is provided which may be used by the operator in accordance with instructions as displayed on the screen 24. It will be appreciated that with the test arrangement as shown in Figure 2, internal test procedures are carried out by propagating signals through the devices under test in accordance with predetermined programmes, thereby to produce output signals which are sensed by the sense registers 19. The predetermined programme is designed to try to identify and locate faults on individual or multiple inputs and outputs of the devices.

Referring now to Figure 3, an arrangement in accordance with one aspect of the invention is provided for testing two integrated circuits 27 and 28 which form a part of an electronic circuit board 38, a part only of which is shown. The integrated circuit 27 embodies a boundary scan register 29 which serves to drive transistors 30.

Similarly, the integrated circuit 28 embodies a boundary scan register 32 which is used to sense the output of transistor 34. The board 38 also supports a discrete component 36. By using a robotic probe 37 together with the boundary scan devices 29 and 32, the circuit board comprising the devices 27 and 28 may quite simply be tested without the complication of test equipment as shown in Figure 2 for example.Testing of the circuits shown in Figure 3 is simply achieved by applying power to the circuit board and input signals to the circuit board via the usual boundary scan test connector (not shown), the input signals being chosen in accordance with a predetermined programme whereby the boundary scan register 29 applies test inputs to the transistors 30 for sensing via the robotic probe 37, and the boundary scan register 32 senses the output of the transistor 34 resulting from test inputs injected via the robotic probe 37. It is a simple matter to compare the actual output with the expected output of each measurement and there is no difficulty in associating each test with a particular circuit node.

It will be appreciated that the full benefits of boundary scan can be realised since use and programming difficulties associated with functional and/or in-circuit testers are obviated. Moreover, the simpler and cheaper manufacturing defect analyser is used which might conveniently employ a three dimensional robotic probe to gain access to a greater range of circuit nodes and to avoid the problems associated with 'bed of nails' access to surface mounted devices.

This novel combination of robotic probing and boundary scan and/or analog testing enables a manufacturing defect analyser to complete a comprehensive test which hitherto was not possible without using other major expensive and complicated equipment.

Various modifications may be made to the arrangement shown without departing from the scope of the invention as will be appreciated by those skilled in the art, and for example, although only two integrated circuits have been shown in Figure 3, it will be appreciated that any number of integrated circuits and/or discrete components may be supported on a circuit board under test.

Claims (3)

CLAIMS:

1. A test system for electronic circuit boards which embody integrated circuits having integral boundary scan circuits, wherein access to the board for the purpose of test signal injection and/or test signal sensing is effected using a manufacturing defect analyser (MDA) having at least one robotic probe, and wherein the boundary scan circuits are used to complete a two terminal test circuit which includes an interface connection to be tested.

2. A system as claimed in claim 1, including means for applying analog as well as digital signals whereby the testing of certain discrete components is additionally facilitated.

3. A test system as claimed in claim 1 and substantially as herein described with reference to the accompanying drawings.