GB2232168A - Pretreating circuit boards for electroless coating - Google Patents

Description

--,:2 3:2 1 CE, a 1 CIRCUIT BOARDS Printed circuit boards are well known

industrial products and are used for a wide variety of commercial and consumer electronic applications such as in appliances, radios, machines, etc. Basically, the board contains a desired circuit configuration in the form of electrically conductive material "printed" onto the board. Boards having circuits on each face of the board are electrically interconnected between certain areas on the opposite faces by through-holes, which are drilled or punched in the desired configuration, and the walls coated with an electrically conductive material.

There are essentially two methods for preparing printed circuit boards (PCB's) one being termed the "subtractive" method and the other termed the "additive" method. Both methods are well known and are described in U. S. Patent No. 4,233,344.

Basically, in the additive system, the starting board is comprised of plastic with no metal foil, and the metal circuit is then built up upon the non-conductive substrate in the desired pattern. In one of the subtractive methods, a nonconductive substrate, such as epoxy bonded fiberglass, has adhered to two sides thereof, a metal cladding or I laminate, most often copper. Holes are drilled through the copper laminate board exposing the plastic. It is then deburred, chemically cleaned and rinsed. The board is then treated for plating the through- holes by contacting with a dilute acid solution, dipped into a catalyst, most commonly an acidic palladium-tin catalyst, to activate the plastic for electroless deposits, rinsed in water, treated with an accelerator to activate the catalyst metal, again rinsed and immersed into an electroless plating bath to plate all catalyzed surfaces of the board including formation of a conductive coating on the inside of the through- hole to electrically connect the two metal (copper) sides. An etch resist is then applied over the unwanted copper areas in the circuit pattern desired. The board is then cleaned, electroplated with copper and coated with Sn/Pb. The etch resist is then removed with an appropriate solution (either solvent or alkaline solution) to expose the underlying foil and electroless copper thereon and this copper is removed by etching, thereby providing the desired circuit.

Regardless of the method for making printed circuit boards, the nonconductive portions of the 1 1 1 i substrate must be activated prior to metallization by either electroless or electrolytic metal plating. Unfortunately, it is not commercially feasible to treat only the non-conductive portions of the board and, as a result, the entire board is immersed or dipped into all the treating baths, including both the catalyst solution and the electroless plating bath.

To overcome the apparent waste of copper and other problems associated with prior art processes, never methods electrolessly plate at the end of the PCB manufacturing process. These methods typically catalyze the drilled panel first and then utilize an etch resist (dry film type) over the desired circuit pattern, including tenting of the through holes, with the unwanted copper then being etched using ammoniacal copper chloride or ferric chloride. The etch resist is then removed and the board electrolessly plated, with the only portions plated being the circuit lines and the through-holes.

The use of an organic solvent soluble etch resist normally does not present a problem& Unfortunately, however, removal of the etch resist using, e.g., alkaline solutions, removes the 4 catalyst from the through-holes making the metal plating ineffective. This is a particularly serious problem when an environmentally preferred aqueous soluble etch resist is used since the commonly used KOH stripping solution readily removes the catalyst absorbed an the through-hole wall.

It is an object of the subject invention to provide a method for treating a catalyzed non-conductive substrate to enhance its resistance to compositions used in the plating process. It is a further object of the present invention to provide an efficient and effective method for preparing a printed circuit board containing through-holes. Another object of the present invention is to provide printed circuit boards prepared by the novel method of the invention. These and other objects of the present invention will become readily apparent from the following detailed description.

1 1 Thus according to a first aspect of the present invention there is provided a method of treating a nonconductive substrate (having a surface at least part of which is coated with a metal) that has been contacted with a catalyst (which may be termed catalysed), such as in preparation for electroless metal plating, the method comprising contacting the (catalysed) substrate with an accelerator, contacting the (accelerated) substrate with a reducing agent, and heating the substrate. This is suitably performed before (electroless) metal plating the substrate.

The non-conductive substrate is preferably made of a plastics material, and may be a laminate, for example a circuit board.

Thus the invention can be envisaged as a method for treating a plastic surface which has been catalysed for electroless metal plating, the method comprising treating the catalysed surface with an accelerator, treating the accelerated surface with a reducing agent and heating the treated surface for an effective time at an elevated temperature prior to electroless metal plating.

The present invention may be thought of as being based on the Applicants' discovery that the resistance of catalysed non-conductive substrates to compositions used in plating processes and, in particular, compositions used to remove etch resists, such as solutions of KOH, may be enhanced by contacting the catalysed substrate with an accelerator, treating the accelerated substrate with a reducing agent, followed 4 by baking the treated substrate.

The contacting with a catalyst is preferably achieved by immersing the substrate in a liquid catalyst composition, so that the through-holes are also catalyzed. The contact with the reducing agent (also preferably a liquid composition) may also be achieved by immersion of the substrate.

The invention finds particular use with regard to the preparation of printed circuit boards having throughholes which must be plated, including the cleaning and pretreating of a drilled copper foil clad board.

A particularly preferred method of the present invention thus comprises:

(a) contacting the substrate with a catalyst (catalysing the board, including the throughholes) such as by immersion of the board in a catalyst composition, such as a conventional acidic palladium-tin catalyst; (b) contacting the substrate with an accelerator (accelerating the catalysed board); (c) contacting the accelerated substrate with a reducing agent, such as by treating the accelerated board by immersing the board in a reducing composition; (d) heating the substrate, preferably by baking the reduced board by heating at an effective elevated 6 temperature; and (e) applying an etch resist over the desired circuit pattern and tenting the through-holes.

The method of the present invention preferably additionally comprises:

(f) etching any exposed metal (usually copper); (g) removing the resist, e.g. using a suitable soivent; (h) electrolessly plating the substrate, e.g. the board, including the through-holes, by immersing the treated substrate in a suitable electroless plating solution.

The substrate may be any suitable plastic and/or reinforced plastic substrate, e.g., acrylonitrilebutadiene styrene, polystyrene, polycarbonate, etc. For convenience only, the following description will be directed to copper laminated epoxy resin substrates which are the most commonly used plastic in the printed circuit board inductry, although it should be appreciated that the invention is not limited to such substrates.

The pre-catalyst procedures for preparing a throughhole substrate, or for any plastic substrate, may vary widely depending on the article to be produced. Generally the substrate will be at least partially coated with a metal, e.g. copper clad, and may be 7 deburred, chemically cleaned and rinsed. For example, the substrate can be a panel which may be treated with a cleaner for five minutes at 600C to 700C. An exemplary cleaner is ENPLATE PC-475 sold by Enthone, Incorporated, West Haven, Connecticut which contains cationic and non- ionic surfactants. Suitably after water rinsing, the board may then be immersed in a copper etchant such as ENPLATE AD-485 which is of the peroxy sulphate type for 1-2 minutes at 20 to 250C. The board can then be water rinsed and suitably immersed in 10% H2S04 for two minutes at 20 to 250C.

The substrate, after drilling, may be used as such or it may be treated using organic swellants and/or oxidants such as chronic acid, sulphuric acid, permanganate solutions and the like to enhance the adhesion of the metal plating. These treatments are discussed in U.S. Patent No. 4,592, 852.

When the substrate is ready for catalysis, the substrate is usually immersed in the catalyst composition so that the catalyst may be adsorbed onto the substrate surface as is well known in the art. Any suitable catalyst may be employed and the surface of the substrate may be catalysed using, for example, the commercially available mixed tin- palladium (e.g. chloride) catalysts, which are usually solutions. Various amounts of both tin and palladium can be adsorbed on the substrate surface depending on the concentration and temperature of the catalyst, the time spent in the catalyst and preconditioning treatment of the (e.g. resin) substrate. Usually an increased temperature, longer immersion time and higher 8 k 4 concentration of the catalyst solution tend to leave more catalyst on the surface of the (e.g. resin) substrate. Often there is a minimum amount of catalyst required on the substrate surface in order to properly initiate electroless metal deposition to occur, and this minimum amount can usually be achieved easily by immersing the substrate into the Sn/Pd catalyst solution within the given set of parameters specified by the suppliers of the commercial catalyst solutions. Exemplary catalysts are given in U.S. Patent No. 3,011,920.

For preference, a commercial (e.g. acidic) catalyst composition containing from 100 to 250 mg/1 palladium and from 3 to 10 g/1 tin can be used, such as at a typical temperature of from 200C to 400C suitably for an immersion time of from 3 to 15 minutes. A preferred commercial catalyst is ENPLATE ACTIVATOR-444 sold by Enthone.

The catalysed substrate can then be treated with the accelerator (or postactivator) to enhance the plating step, followed by electroless plating. It is preferably at this point after catalysis that the catalysed substrate is contacted with an accelerator, and after acceleration, the accelerated substrate can be treated with a reducing agent followed by baking to form a catalysed surface which may possess enhanced resistance to further processing compositions (such as the KOH used in printed circuit board manufacture to remove the etch resist). A preferred accelerator is an acidic H2SO4 composition such as ENPLATE PA- 493 sold by Enthone, Incorporated. Other accelerators include 9 11 ENPLATE PA 1889, an acidic fluoboric acid based composition, and ENPLATE PA 2748, an alkaline based composition. Generally the accelerator will activate the catalyst (and so may be thought of as an activator) and examples of suitable accelerators include dilute acids, such as perchloric, H2S04 or phosphoric acid and alkaline materials such as NaOH, sodium carbonate, etc. The accelerator is preferably at a temperature of from 15 to 500C, such as about room temperature. Contact time is suitably from 3 to 5 minutes, e.g. about 4 minutes.

Any suitable reducing agent may be employed such as ClC4 alkyl amine boranes and alkali metal borohydrides. Dimethylamine borane (DMAB), and particularly sodium borohydride are especially preferred because of their demonstrated ef fectiveness. Preferably the catalysed and accelerated surface is contacted with the reducing agent at a temperature of from 15 to 500C, such as at about room temperature, for a suitable length of time, e.g. from 1 to 10 minutes, especially from 4 to 6 minutes.

For DMAB, a concentration of from 5 to 20 g/1, preferably 8 to 12 g/1, is suitable. The pH is suitably from 7 to 14, such as from 9 to 13 e. g. about 11, which may be achieved by adjustment.

Suitably the DMAB is at a temperature range of from 21 to 440C, e.g. at about room temperature. Contact for 3 to 15 minutes, especially about 5 minutes may be found to provide excellent results. particularly when used to treat epoxy boards catalysed with a commercial tin- palladium catalyst and accelerated with an acidic accelerator at room temperature for from 3 to 5 minutes. For sodium borohydride, a preferred concentration is from 1 to 5 g/l, e.g. from 1.5 to 2.5 g/l, for example at a temperature of 20 to 300C. Contact with the substrate is preferably for from 3 to 8 minutes, e.g. from 4 to 6 minutes.

The treated catalysed substrate can then be heated at any suitable temperature up to the softening temperature of the substrate, i.e. preferably from 60 to 1500C and more preferably from 130 to 1500C. This may be for up to, for example, 60 minutes, and will depend on the temperature employed. However, a preferred time span is from 10 to 50 minutes, e.g. from 30 to 40 minutes.

Once the catalysed substrate has been treated by the above method the preparation of the printed circuit board can be continued using any of a variety of techniques known in the art.

In a preferred embodiment, after applying an aqueous dry film strippable etch resist over the desired circuit and tenting the through-holes, the unwanted copper can be etched using ammoniacal cupric chloride or ferric chloride, etc. This can then be followed by removing the etch resist using an aqueous solution of KOH. Exemplary of such etching resists include RISTON 3800 and 4200 sold by Du Pont. The KOH solution is preferably from 2 to 2.5 weight % KOH and the board may be treated by spraying or by immersion in the solution. This is suitably for from 30 seconds to 2 minutes, such 11 as at 50 to 600C.

ci After removal of the resist, the board is ready for electroless plating using any of the well-known plating compositions. Exemplary compositions include those found in U.S. Patent Nos. 3,698,940 and 3,976,816. The plated board may then be prepared for use by any other method known in the art.

The invention will now be described by way of example with reference to the accompanying Examples, which are intended to be merely illustrative of, and not limiting on, the present invention.

Circuit Board Preparation A series of drilled double sided copper clad epoxy printed circuit board panels 18 inch x 24 inch were prepared for plating using the following procedure:

(1) permanganate desmear by immersing for 5/10/5 minutes at 60-710C/71820C/54-660C respectively in ENPLATE MLB-495a, ENPLATE MLB-497b and ENPLATE MB-498c; 12 (2) immerse in ENPLATE PC-475 at 400C. for 5 minutes; (3) rinse in cold water; (4) immerse in ENPLATE AD-485 at 20-256C. for 2 minutes; (5) rinse in cold water; (6) immerse in 10% 9,,SO, at room temperature for 1 minute; (7) rinse in cold water; (8) immerse in EXPLATE PC-236d at 20-259C. for 1 minute; (9) immerse in ENPLATE ACT-444 at 386C. for 10 minutes; (10) rinse in cold water.

a Alkaline aqueous-solvent (glycol-ether) solution to condition the substrate.

b Alkaline permanganate solution having a pH of 13-14.

Neutralizer solution containing an amine type reducing agent.

NaCl-CE1 pre-dip solution 13 EXAMPLE I

A number of the above panels were processed by the following steps:

(1) immerse in accelerator EWPLATE PA-493 at room temperature for 4 minutes; (2) immerse in a 10 g/1 DHAB (Dimethylazine borane) solution (pH 11) for 5 minutes at room temperature; (3) dry; (4) heat for 30-40 minutes at 1320C; (5) let cool to room temperature; (6) immerse in a 2.25 weight % KOH solution for 1 miriute at 600C. (to simulate the etch resist stripping step); (7) immerse in ENPLATE PC-455 for 5 minutes at 601C.; (8) immerse in EMPLATE AD-485 for 2 minutes at 20-25,1C.; 1 (9) immerse in ENPLATE PA-493 for 4 minutes at room temperature.

(10) plate with ENPLATE CU-9011f for 12-16 hours at 6011C.

Nonionic surfactant cleaner composition.

Electroless copper sulphate plating solution containing 1-2 g/1 copper complexed with ethylene diamine tetraacetic acid using formaldehyde as the reducing agent and having a pH of about 12.5.

The plating substantially covered the through-holes.

EXAMPLE II

EXAMPLE I was repeated except that the DKAB step was replaced using a 2 g/1 NaBE, solution for 5 minutes at room temperature. The plating substantially covered the holes.

COMPARATIVE EXAMPLE I EXAMPLE II was repeated except that the postactivation step (1) was omitted. Metallization of the holes was incomplete.

X COMPARATIVE EXAMPLE II EXAMPLES I and II were repeated except that reducing step (2) was not performed. The hole metallization was incomplete.

The same experiment without reducing step (2) and heating step (4) provided incomplete hole metallization.

COMPARATIVE EXAMPLE III EXAMPLE I was repeated except that step (1) immersion in the ENPLATE PA- 493 post-activation was omitted. The hole metallization was incomplete.

Similarly, EXAMPLE I was repeated except that step (1) and the heating step (4) was omitted. The hole metallization was incomplete.

COMPARATIVE EXAMPLE IV EXAMPLE 1 was repeated except that both steps (1) post-activation and (2) reduction, were omitted. Only trace metal plating was obtained. Similarly, when heating step.(4) was also omitted, only trace metal plating was obtained.

16 1 i 1

Claims (14)

1. A method of treating a non-conductive substrate, the method comprising contacting the substrate with a catalyst, contacting the catalysed substrate with an accelerator, contacting the accelerated substrate with a reducing agent, heating the substrate and metal plating the substrate.

2. A method as claimed in claim 1 wherein the reducing agent is an alkylamine borane or an alkali metal borohydride.

3. A method as claimed in claim 1 or 2 wherein the catalyst is an acidic palladium-tin catalyst.

4. A method as claimed in claims 1 to 3 wherein the reducing agent is DMAB and/or sodium borohydride.

5. A method as claimed in any of claims 1 to 4 wherein the accelerator is an acidic solution.

6. A method as claimed in any of claims 1 to 5 comprising:

(a) catalysing the substrate, including the throughholes, by immersion of the board in a catalyst composition; (b) accelerating the catalysed substrate; (c) treating the accelerated substrate by immersing the substrate in the reducing agent; and 17 (d) baking the reduced substrate for an effective time at an elevated temperature.

7. A method as claimed in any of claims 1 to 6 additionally comprising:

(e) applying an etch resist over a desired circuit pattern and tenting the through-holes; (f) etching any exposed metal; (g) removing the etch resist; 1 (h) electrolessly plating the substrate including the through-holes by immersing the treated substrate in a suitable electroless plating solution.

8. A method as claimed in any of claims 1 to 7 wherein the catalyst is an acidic palladium-tin composition.

9. A method as claimed in any of claims 1 to 8 wherein the reducing agent is DMAB and/or sodium borohydride.

10. A method as claimed in any of claims 1 to 9 wherein the reducing agent is an aqueous 10 g/1 DHAB solution having a pH of about

11. - 11. A method as claimed in any of claims 1 to 10 wherein the substrate is a board.

18

12. A method as claimed in any of claims 1 to ii wherein the substrate is at least partially coated with copper.

13. A method as claimed in any of claims 1 to 12 when used in the preparation of a printed circuit board from a copper laminated substrate having through-holes.

14. A substrate treated by a method as claimed in any of claims 1 to 13.

19 Published 1990 at The Patent Office. State House. 6671 High Holborn. LondcnWC I R 4TP.F-urther copies maybeobtained from The Patent Office. Sales Branch, St Mary Cray, Orpington, Kent BR5 3RD. Printed by Multiplex techniques ltd, St Mary Cray. Kent, Con. 1/87