GB2228112A - Computer system and method - Google Patents

Abstract

Disclosed is a method of determining different capacity types of RAMs (3-5), especially DRAMs, in a computer system with a plurality of banks of IC memory sockets having a fixed number of address lines (2) Fig. 3 attached for installing the RAMs thereon. The method comprises first assuming a bank of RAMs to be a first type and filling each location of the bank of RAMs with first data, and then assigning second data to a second location of the bank of RAMs. The address of the second location is chosen so that the first data are overwritten by the second data if the memory is a 256KB memory but are not overwritten if the memory is a one MB memory. The content of the first location of the bank of memories is then checked. If the content of the first location is found to be the first data, then the bank of RAMs is determined to be the assumed first type, however, if it is discovered to be the second data, then the bank of RAMs is determined to be a second type, otherwise the bank of RAMs is either empty or out of order. <IMAGE>

Description

Computer System and Method The present invention relates to a computer system and method for determining whether a random access memory is one of two types of memory with different capacities.

The method is particularly suitable in a Power-On Self Test (POST) subroutine of a Basic Input-Output System (BIOS) of a microcomputer system to enable the self-checking of more than one type of RAM in the system without manual configuration.

Nowadays personal microcomputers such as the PC-AT, XT generally comprise one type of RAM, particularly dynamic random access memories (DP9y.s), such as lMB, 256KB, or 64KB type, arranged in a plurality of banks.

Where expansion slots are provided, the overal memory capacity can be extended. Nevertheless, the sa type of memories must be er#loyec#.

Alternatively there are some chip companies, such as Chip and Tech. Corp. (C & T) which provide a chip set called "Neat" using a utility program to let the user select more than one type of DRAM. Fowe#er, due to the necessIty of manual setting, there are potentIal errors existing. If the user does nt perform the utility program properly, two disadvantageous effects may arise: First, the RAM capacity will decrease. Second, it might be even worse that the microcomputer will not be able to execute any job at all.Moreover, if the error is to be recovered, the batteries for energizing CMOS, where the manually set data are stored, have to be removed in order that the CMOS may be cleared and the whole setting process can be restarted again.

In accordance with one aspect of the present invention, a method of determining whether a random access memory is one of two types of memory with different capacities comprises clearing the memory; writing first data into the memory at a first location; writing second data, different from the first data, into the memory at a second location with an address different from that of the first location and wherein the second location is selected such that the second data overwrites the previously written first data if the memory is of a first type and does not if the memory is of a second type; and reading the data at the first location to determine the type of memory.

In accordance with a second aspect of the present invention, a computer system comprises a processor; and at least one memory socket to which a random access memory is connected in use, the processor being adapted to determine whether the memory connected to the or each socket is one of two types of memory with different capacities by clearing the memory; writing first data into the memory at a first location; writing second data, different from the first data, into the memory at second location with an address different frorr that of the first location and wherein the second location is selected such that the second data overwrites the previously written first data if the memory is of a first type and does not if the memory is of a second type; and reading the data at the first location to determine the type of memory.

The present invention employs a method wherein a first type of P#Y is first assumed in a bank of memories while the memories are cleared. Then a first data pattern is assigned to a first location of the bank of memories and thereafter a second data pattern is written to a second location thereof. Then, the content of the first location of the bank of memories is checked. Since the IC memory sockets wherein the bank of memories resides have a fi > :ed number of address lines attached, if the existing memories are of the type whose capacity is less than that assumed, the content of a memory location will duplicate in more than one location.Therefore, if the content of the first location is found to be the first data pattern, then the bank of memories is determined to be the assumed first type, however, if it is discovered to be the second data pattern, then the bank of memories is determined to be a second type, otherwise the bank of memories is either empty or out of order.

By virtue of the present invention, more than one type of RAM can be used and the BIOS of a microcomputer system can automatically determine the types of memories that the user Installs and calculate the total amount of memories available without manual configuration, thereby enabling the CPU of the computer system to access exact memory locations in operation.

Some exarnples of methods and systems according to the invention will now he described with reference to the accompanying drawings, in which: Figure 3 is a flow diagram illustrating one embodiment of a methoc fcr determerlinc the DFad types in a microconpvter s.-ster; Figure 2 is a flow diagram IllustratIng another embodiment of a method for determining the DRAM types in a microcomputer system; and Figure 3 is a block diagram of the microcomputer system.

Figure 3 illustrates schematically a block diagram of a computer system which includes a microprocessor 1 coupled via 20 address lines 2 to a set of three IC memory sockets each accommodating a DRAM chip 3 - 5.

Each socket is enabled via a two bit enable signal supplied along line 6.

In each case, two different capacity DRAM chips can be accommodated in each socket. In one example, these comprise a 1MB type and a 256KB type. In the latter case, address lines 11 - 19 are not required and are treated as "don't care" lines. This example is based on a C & T "Neat" chip set as the building components for the microcomputer system.

In the case of 256KB DRAMs, due to the "don't care" status of address lines 11 - 19, the address supplied to the socket will appear to be the same for hexadecimal addresses OH, 800H, 80000H, and 80800H. "H" indicates that the address is expressed in hexadecimal notation.

This can be seen clearly from the table below.

ABSsSLiEs 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Hexa-OH o o o o o o o o o o o o o o o o o o o o decimal 800H 00000000100000000000 X s SDKE 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 8080S 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0

We will now consider the case where either 1MB type DRAMs or 256KB type DRAMs are installed in respective memory sockets. The microcomputer 1 then determines the type of memory in each socket by following the flow diagram shown in Figure 1 First, all the contents of the DRAMs are cleared (step 10) and the DRAMs are assumed to be of 1MB type (step 11). A data pattern such as "SSAAH1, is thereafter assigned (step 12) to an address with an offset value "0" from the first address of the bank of DRAMs, i.e. address OH in case the first address of the bank of DRAMs is address OH.Of course, aside from the first address of that bank of DRENs, other addresses can he #:sed to be filled with the data pattern. Then a data pattern such as "BB66H" is written (step 13) at an address with an offset value "800H", i.e. address 800H in this case, and the content at address OF is thereafter checked (step stey If the content in address OH remains unchanged, i.e.

"55AAH", then the DRAMs are 1MB type (step 15); however, if the content of address OH is found to be the same data pattern as that filled in address 800H, i.e. "BB66H" in this case (step 16), the DRAMs are determined to be of 256KB type (step 17). Otherwise, if the content in address OH is neither "55SAAH" nor "BB66H", then either the bank of memories is empty or the DRAMs therein are out of order (step 18).

Likewise, an offset value 80000H or 80800E can be used instead of BOCH.

Figure 2 illustrates the steps taker in the case where the RAMs are either 256KE type DRAMs or 64KE type DRAMs. In this case duplication will occur in address 200H if the DRAMs are first supposed to be 256KB type but are actually 64Kb type and address signals for 256KB DRAMs are sent to the 64kB DRAMs. The on1y differences are that the DRAMs are first assured to be of 256KF type instead of 1M.S type and the content of address 200H is overwritten instead of that in address 800H. In view of this similarity Figure 2 will not be described in detail.

A detailed listing of assembler code suitable for implementing an embodiment of the present invention is shown in the accompanying appendix. Line 77 to line 93 denotes 16 different configurations for memory banks 0, 1, 2, and 3 where each bank contains a pair of IMP, 256KB or 64KB type DRAMs, or no memory existing at all. Line 339 through line 353 test if the DRAMs in bank C are lMB type or 256KB type. If bank 0 is determined to be of 1MB type, then program flow jumps to line 454 to test if the DRAMs in bank 1 are of 1MB type or non existing until line 476. However, if bank 0 is tested to be 256XB type, then program flow continues at line 361 until line 422 to check if the DRAMs in bank 1 are 256KB type or 64KB type or non-existing.

If DRAMs in bank 0 are 256KB type, then program flow proceeds at line 483 through line 516 to test if the DRAMs in bank 2 are 1MB type or 256KB type. The rest of the program lines should be readily understood by those skilled in the art and therefore will not be further described.

Claims (13)

1. A method of determining whether a random access memory is one of two types of memory with different capacities comprising clearing the memory; writing first data into the memory at a first location; writing second data, different from the first data, into the memory at a second location with an address different from that of the first location and wherein the second location is selected such that the second data overwrites the previously written first data if the memory is of a first type and does not if the memory is of a second type; and reading the data at the first location to determine the type of memory.

2. A method according to claim 1, wherein the first type of memory has a capacity of 1M Bytes and the second type of ecr has a capacity of 256K Bytes.

3. A method according to claim 1, wherein the first type of memory has a capacity of 256K Bytes and the second type of memory has a capacity of 64K Bytes.

4. A method according to 2ry of the preceding claims, wherein the first location of the memory is the address with offset value 0 from the first ac#cress of the memory.

5. A method according to at least claim 2, wher#-ir, the second location of the memory is the address with offset value 8OOH, 80000K, or 80800K from the first address of the memory.

6. A method according to at least claim 3, wherein the second location of the memory is the address with offset value 200H from the first address of the memory.

7. A method according to any of the preceding claims, wherein the first data is 55AAH.

8. A method according to any of the preceding claims, wherein the second data is BB66H.

9. A method according to any of the preceding claims, wherein if the data read from the first location is neither the first data nor the second data, the memory is determined to out of order or not connected.

10. A computer system comprising a processor; and at least one memory socket to which a random access memory is connected in use, the processor being adapted to determine whether the memory connected to the or each socket is one of two types of memory with different capacities by clearing the memory; writing first data into the memory at a first location; writing second data, different from the first data, into the memory at a second location with an address different from that of the first location and wherein the second location selected such that the second data oerwrites the previously written first data if the memory is of a first type and does not if the memory is of a second type; and reading the data at the first location to determine the type of memory.

11. A computer system having a plurality of banks of IC memory sockets wherein each of the memory sockets has a fixed number of address lines attached and each of the banks of IC memory sockets may be installed with two types of memory with different capacities; arc a processor for carrying out the steps of: clearing all memories installed on said memory sockets; assuming a bank of memories to be a first type; writing first data to a first location of the bank of memories, writing second data to a second location of the bank of memories; and checking the content of the first location of the bank of memories such that the bank of memories is determined to be the assumed first type if the content or the first location thereof is the first data, of the bank of memories is determined to be a second type if the content of the first location thereof is the second data, or the bank of RAMs is determined to be empty or out of order if the content of the first location thereof is neither the first data nor the second data.

12. A method of determining whether a random access memory is one of two types of memory with different capacities substantially as hereinbefore described with reference to the accompanying drawings.

13. A computer system substantially as hereinbefore described with reference to the accompanying drawings.