GB8902891D0 - Computer system and method - Google Patents

Computer system and method

Info

Publication number
GB8902891D0
GB8902891D0 GB898902891A GB8902891A GB8902891D0 GB 8902891 D0 GB8902891 D0 GB 8902891D0 GB 898902891 A GB898902891 A GB 898902891A GB 8902891 A GB8902891 A GB 8902891A GB 8902891 D0 GB8902891 D0 GB 8902891D0
Authority
GB
United Kingdom
Prior art keywords
computer system
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB898902891A
Other versions
GB2228112A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Acer Inc
Original Assignee
Acer Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Acer Inc filed Critical Acer Inc
Priority to GB8902891A priority Critical patent/GB2228112A/en
Publication of GB8902891D0 publication Critical patent/GB8902891D0/en
Publication of GB2228112A publication Critical patent/GB2228112A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2289—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by configuration test
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0684—Configuration or reconfiguration with feedback, e.g. presence or absence of unit detected by addressing, overflow detection

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
GB8902891A 1989-02-09 1989-02-09 Computer system and method Withdrawn GB2228112A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8902891A GB2228112A (en) 1989-02-09 1989-02-09 Computer system and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8902891A GB2228112A (en) 1989-02-09 1989-02-09 Computer system and method

Publications (2)

Publication Number Publication Date
GB8902891D0 true GB8902891D0 (en) 1989-03-30
GB2228112A GB2228112A (en) 1990-08-15

Family

ID=10651385

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8902891A Withdrawn GB2228112A (en) 1989-02-09 1989-02-09 Computer system and method

Country Status (1)

Country Link
GB (1) GB2228112A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0419869A3 (en) * 1989-09-29 1992-06-03 Kabushiki Kaisha Toshiba Personal computer for accessing two types of extended memories having different memory capacities
US5179686A (en) * 1990-08-16 1993-01-12 Ncr Corporation Method for automatically detecting the size of a memory by performing a memory warp operation
US5311520A (en) * 1991-08-29 1994-05-10 At&T Bell Laboratories Method and apparatus for programmable memory control with error regulation and test functions
US5386383A (en) * 1994-02-28 1995-01-31 At&T Corp. Method and apparatus for controlling dynamic random access memory devices

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5003506A (en) * 1987-06-02 1991-03-26 Anritsu Corporation Memory capacity detection apparatus and electronic applied measuring device employing the same

Also Published As

Publication number Publication date
GB2228112A (en) 1990-08-15

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)