GB2186435A - Making printed circuits - Google Patents

Making printed circuits Download PDF

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Publication number
GB2186435A
GB2186435A GB08700718A GB8700718A GB2186435A GB 2186435 A GB2186435 A GB 2186435A GB 08700718 A GB08700718 A GB 08700718A GB 8700718 A GB8700718 A GB 8700718A GB 2186435 A GB2186435 A GB 2186435A
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GB
United Kingdom
Prior art keywords
electrically conductive
base board
paste
copper
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB08700718A
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GB8700718D0 (en
GB2186435B (en
Inventor
Yamahiro Iwasa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Asahi Chemical Research Laboratory Co Ltd
Original Assignee
Asahi Chemical Research Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Asahi Chemical Research Laboratory Co Ltd filed Critical Asahi Chemical Research Laboratory Co Ltd
Publication of GB8700718D0 publication Critical patent/GB8700718D0/en
Publication of GB2186435A publication Critical patent/GB2186435A/en
Application granted granted Critical
Publication of GB2186435B publication Critical patent/GB2186435B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • H05K1/095Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/167Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0209Inorganic, non-metallic particles
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0347Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09763Printed component having superposed conductors, but integrated in one circuit layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4685Manufacturing of cross-over conductors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

A method of making printed circuits on a base board (10) comprises the steps of laminating the board on one side with copper (80), etching the copper to form a plurality of first electrical circuits (C10), applying a plating resist (60) to the board to cover the circuits except in places where electrical connections are to be made, applying electrically conductive copper paste (90) to interconnect at least two of the circuits, heating the board to harden the paste, plating the hardened paste with a layer (100) of metal to form at least one second electrical circuit (C20), applying a dielectric paste (180) over part of one of the circuits, hardening the paste, applying an electrically conductive paste (190) over the dielectric layer to form a capacitor, and hardening the paste. <IMAGE>

Description

SPECIFICATION A method for producing electric circuits on a base board The invention relates to a methodforforming electrically conductive circuits, more particularly capacitor or electricity storing circuits on a base board.
It has been general practice to form a capacitor circuit on a copper laminated print base board by soldering a lead ora chip-shaped capacitorto a copper lamination circuit. The finished product is therefore bulky in addition to requiring so many processing steps and the resultant high cost including the cost of the capacitor. Further according to such a conventional method, the loading density of the print base board is lower, and the reduction of product weight and of production processes is difficu It. Moreover, since the soldering operation is required, there have often been a misarrangement of leads and a misinsertion of capacitors.
Further in the case of forming considerably complex circuits on the copper laminated print base board, it becomes necessary to electrically connect the circuits to each other. However, according to the prior art, since it was impossible to form the circuits of more than two layers on one side of the print base board, such circuits were divided and etched on both sides of the base board and electrically connected to each othervia holes through the base board.
Such prior art requires to attach the copper laminations on both sides ofthe base board, to etch the copper laminations along the designed circuits and to make holes extending through the base board by means of a specific device such as the NC device, and therefore the production cost is increased including the costs of materials and of processing steps, and moreover the production efficiency is low.
lnordertoimprovetheconventional method so as to form the electrically conductive circuits of more than two layers on one side of the base board more effectively at a lower cost, it has been required to use an electrically conductive copper paste which is excellent in the electric conductivity and adapted to a metal plating, especially to a copper plating and which is available at a lower cost. General Iy, the conventional electrically conductive copper paste is easily oxidised with a heat for hardening the paste, in contrast to the precious metal such as silver. The oxidisation of copper powder in the paste will increase the electrical resistance and decrease the soldering property. These defects have made the conventional electrically conductive paste practically useless.Further it has been required to activate the surface of the hardened electrically conductive copper paste by means of a catalyst so as to expose the copper powder from the resin paste so that the exposed copper powder may act as the binder, that is, so many nuclei for the subsequent metal plating.
Thus the conventional electrically conductive paste has requires many processing steps.
The Japanese Utility Model application Serial No.
55-42460 discloses a specific method, in which a high dielectric resist of polybutadiene is used as a dielectric coat, an adhesive past, for example, of 20% of phenol resin, 63% of copper powder and 17% of solvent is used to form designed circuits, the adhesive paste is thickened to 20 u by means of a non-electrolytic plating, and then the plated adhesive paste is coated with copper so astoform the electrically conductive circuits of more than two layers on one side of a base board. This method has never been industrially reduced to practice.
After many years of research, the applicants are now able to produce for industrial use, electrically conductive copper pastes that avoid the defects associated with the prior art as mentioned above.
The newly developed electrically conductive copper pastes includes the electrically conductive copper paste ACP-020, ACP-030 and ACP-007P of Asahi Chemical Research Laboratory Co. Ltd.. The electrically conductive copper paste ACP-020 is substantially composed of 80% by weight of copper powder and 20% by weight of synthetic resin, and is extremely excellent in the electric conductivity, but more or less deteriorated in the soldering property.
The electrically conductive copper pasteACP-030 is substantially composed of 85% by weight of copper powder and 15% by weight of synthetic resin, and is slightly lower than the ACP-020 as to the electric conductivity, but excellent in the soldering property.
In the last place, the electrically conductive copper paste ACP-007P is an improvement of the ACP-030 and may be subjected to a metal plating such as a copper chemical plating without using the catalyst.
In other words, the copper paste has excellent metal plating properties.
One object of the present invention is to eliminate the defects and disadvantages of the prior art. This is achieved by the effective use ofthe newly developed electrically conductive copper paste having the specially excellent metal plating property to form electrically conductive circuits of more than layers on one side of a copper laminated base board, that is, to firstly form a first layer circuit on the copper lamination of the base board, subsequently to coat the mentioned electrically conductive copper paste of excellent metal plating property on the parts of the first layer circuits which are to be connected to a second later circuits to be formed on the first layer circuits, subsequently to heat the electrically conductive copper paste to harden the same, subsequentlyto apply a metal plating on the coated electrically conductive copper paste to increase the electric conductivity of the copper paste up to that of the copper lamination, to thereby form the second layer circuits on the first layer circuits. In this way, a two-layer circuit board is provided having a property substantially equivalentwith the conventional both sided and through hole circuit board with the materials and processing steps being reduced almost to a half of the prior art. In fact, the expensive NC drilling machine is not required and the processing method is remarkably simplified compared with the prior art, and accordingly the finished product may be provided at a cost almost half of the cost required to produce the conventional product.
We propose forming a plurality of first electrically conductive circuits of a first lamination layer on the base board and at least one second electrically conductive ci rcuit of a second lamination layer on the first electrically conductive circuits, and then to form an electricity storage circuit between the first and second electrically conductive circuits. In this way, the conventional operation for securing the resistor to the base board is eliminated, and an extremelyflat resistor circuit is provided.Moreover, the leading density of the base board is increased in addition to the reliability ofthefinished product which may be of a reduced weight all through the reduced processing steps. Further, thefinished product may be provided at a reduced costwithout misarrangementof leads an misinsertion of the resistor which may often happen in the conventional method.
According to the present invention a method of forming electriccircuits on a base board comparises the steps of: attaching a copper lamination to one side of a base board; etching the copper lamination to form thereon a plurality offirstelectrically conductive circuits of a first lamination layer; coating said one side of the base board with a plating-resistant resist except the portions which are required to be electrically connected to another circuit to be formed on the first electrically conductive circuits of the first lamination layer; coating an electrically conductive copper paste of being adapted to a metal plating on one side ofthe base board in a mannerthatatleasttwoofthefirst electrically conductive circuits may be electrically connected; heating the base board to harden the base board; cleansing the base board; immersing the base board in a metal plating solution to provide a metal plating layer on the face ofthe electrically conductive paste so as to form at least one second electrically conductive circuit of a second lamination layerwhich is composed ofthe metal plating layer and the electrically conductive copper paste; coating a dielectric paste having a property of storing electricity on the remain of the first electrically conductive circuits remained without the electrically conductive copper paste coated thereon or on a part of the second electrically conductive circuit; heating the base board to harden the dielectric paste; coating said one side of the base board with an electrically conductive copper paste in a mannerthatthe electrically conductive paste will extend between the dielectric paste and one of said first electrically conductive circuits, orthe second electrically conductive circuits; and heating the base board to harden the electrically conductive paste to thereby form an electricity storing circuit on the base board.
An embodiment of the present invention will now be described byway of example with reference to the accompanying drawings in which: Figure 1 shows a copper laminated base board invertial section; Figure 2 shows an etching resistant resist coated on the base board in Figure 1; Figure 3 shows first electrically conductive circuits formed by etching on the base board of Figure 2; Figure4shows a plating resistant resist coated on the base board in Figure3; Figure 5 shows an electrically conductive copper paste coated on the base board in Figure 4; Figure6shows a secondelectricallyconductive circuit formed by a copper chemical plating on the base board in Figure 5; Figure 7showsa dielectric paste coated on the base board in Figure 6;; Figure 8 shows an electrically conductive paste coated on the base board in Figure 7 to form an electrically storing circuit thereon; and Figure 9 shows an overcoat covered all over the face ofthe base board in Figure 8 to finish the processing steps ofthe base board.
Now in reference to Figure 1, a polymer base board 10Awhich is, for example, made of polymer, has a copper lamination 80 attached on side thereof, and thus a copper laminated base board 30 is provided.
In reference to Figures 2 and 13, an etching resistant resist70 is coated on the copper lamination 80 except the portions 30a where there are formed no first electrically conductive circuits C10, and then the base board 30 is heated to be hardened.
Subsequently, the base board 30 is etched to form thereon a plurality offirst electrically conductive circuits C10 of a first lamination layer of the copper lamination 80 which is eliminated atthe portions 30a.
Subsequently in reference to Figures 4 and 5, a plating resistant resist 60 such as the resist CR-2001 developed by Asahi Chemical Research Laboratory Co. Ltd., is coated on the base board 10 exceptto portions of the first electrically conductive circuits C10 which are required to be electrically connected to another circu it such as a second electrically conductive circuit C20 as shown in Figure 6 which are to be formed on the first electrically conductive circuits C, o, and then the base board 30 is heated at the temperature of about 1 500C for about 30 minutes to harden the plating resistant resist 60.
Subsequently, an electrically conductive copper paste 90 such as the electrically conductive copper paste ACP-007P developed by Asahi Chemical Research Laboratory Co. Ltd., and specifically adapted to a plating, is coated by way of screen printing on the base board 30 in a manner that at least two of the first electrically conductive circuits C10 are electrically connected to each other, and then the base board 30 is heated at the temperature of about 1 50"C for 30-60 minutes to harden the paste 90.
In this condition, the base board 30 is subjected to a treatment in preparation to the next plating process. Namely the base board 30 is cleansed with a water solution containing 4-5% by weight of caustic sode ( NaOH) for about several minutes, and then the face treatment is made with a water solution containing 5-10% by weight of hydrochloric acid (HCI) for about several minutes. As the result, the copper powder particles are exposed from the binderofthe electrically conductive copper paste 90, thus providing the nuclei for the next copper plating treatment. In this case, it is noted that a catalyst is not needed which may be required in the case of non-electrolytic plating.
Subsequently the base board 30 is immersed in a copper chemical plating bath to apply the copper plating to the face of the electrically conductive copper paste 90 to thereby form thereon a copper plating layer 100 as shown in Figure 6. Thus a second electrically conductive circuit C20 of a second lamination layerisformed onthetwofirstelectrically conductive circuits C10 in a manner that the second circuit C20 is electrically connected to the two first circuits C10. The copper chemical plating bath is of pH 11-13 and of the temperature 65 - 75 C, and the thickness of the copper plating layer is more than 5 calm, and further the plating accumulation speed is about 1.5 - 3 perhour.
Subsequently as shown in Figures 7 and 8 a dielectric paste 180, which has a property of storing electricity, is coated onthefirstelectrically conductive circuit C10 which has remained without the electrically conductive copper paste 90 being coated thereon, and then the base board 30 is heated to harden the dielectric paste.Then an electrically conductive paste 190 such as a silver paste is coated on a range extending between the second circuit C20 and the first circuit Clo having the dielectric paste 180 coated thereon, in a mannerthatthe paste 180 will be electrically connected to the second circuit C20 and to thefirstcircuit Cio, and then the base board 30 is heated to harden the electrically conductive paste 190, to thereby form an electricity storing circuit 160 between the first electrically conductive circuit Clo of the first lamination layer and the second electrically conductive ofthe second lamination layer on one side ofthe copper laminated base board 30.
Finally as shown in Figure 9 an overcoat 110 such as the plating resistant resist CR-2001 developed by Asahi Chemical Research Laboratory Co. Ltd., is coated on one side of the base board 30 to coverthe first electric conductive circuits Clo, the second electrically conductive circuit C20 and the electricity storing circuit 160, and then is heated atthe temperature of a bout 1 for a bout 30 minutes to harden the overcoat 110. Thus the multilayer circuits of the first and second circuits and of the electricity storing circuit are easily formed on one side of the base board by way of a propercombination ofthe su bstractive method and the additive method of the invention as mentioned.
Further it is apparent that an additional circuit or circuits may be formed on the overcoat 110 in Figure 18 to more increase the accumulation of the circuits on one side of the base board.
The metal plating applied to the electrically conductive copper paste 90 may be a precious metal plating such as a silver or gold plating instead of the mentioned copper plating. Furtherthefirstand second electrically conductive circuits C10 C20 may be formed on the overcoat 110 which is coated on one side of the base plate 1 instead of the copper lamination 80. In the mentioned way, the circuits of more than 3 layers may be formed on one side of the base board in accordance with the present invention.
As to the paste ACP-007P developed by Asahi Chemical Research Laboratory Co. Ltd., by way of example for an electrically conductive copper paste which is specifically adapted to a copper plating, it is generally known that copper is easily oxidized, and more especially copper in the condition of powder particles may be more easily oxidized because the exposed outer surface is enlarged. In contrast to the non-oxidizable paste of precious metals, it becomes necessary to provide a paste of such ingredients as to remove the oxidized film of the copper powder particles and also to preventthe reoxidization of the copper particles.In order to provide an electrically conductive copper paste which may be easily used and easily secured to a base material, it is important to properly select and easily secured to a base material, it is important to properly select and properly mix the ingredients such as copper powder, binder, special additive (for example, anthracene, anthracene carboxylic acid, anthradine, anthranilic acid), dispersant and solvent.
The copper particles are differentinthe configuration thereof depending upon the production method thereof. In the electrolytic method, the copper particles are deposited in high purity and also in branched shapes. In the reduction method wherein the oxides are reduced by a reducing gas, the copper particles are provided in spongy and porous shapes.
The electrically conductive copper paste to be used in connection with this invention is required to have the following properties.
1. To be easily coated byway of screen printing in formation of fine patterns.
2. Fixedly secured to the base board.
3. To be resistant against a high temperature alkali bath of copper chemical plating.
4. Fixedly secured to the copper plating.
5. Having an invariable viscosity in the elapse of timeto maintain a stabilized printability.
In order to satisfy the above mentioned requirements the electrically conductive copper paste is required to contain the copper particles of high purity in the branch shapes as deposited by the electrolysis and/orthe copper portions of porous spongy shapes as reduced from the metal oxides.
The copper particles may be processed into flakes.
Further in order to highten the content rate of the copper particles in the paste, it is required to fill the copper particles of different sizes and shapes to a maximum density.
As to the binder of the electrically conductive copper paste, the binder is required to act as a vehicle for so much copper particles and as an effectiveadhesivetothe baseboard. Furtherthe binder must resist against the alkali bath of a copper chemical plating.
ltwasfoundthatthe electrically conductive copper paste was best when the copper paste contained the epoxy resin which has a larger content rate of copper particles and hightensthe deposition rate of the plating, and further increases the adhesive property ofthe plating film.
With respect to the property of the copper plating deposited on the electrically conductive copper paste ACP-007P, the copper plating is reddish brown and paste like and has a viscosity of 300-500 ps atthe temperature of 25 C. The adhesive property to a copper laminated base board and to a resin base board has been confirmed by a taping test. Further the adhesive property to the electrically conductive paste has been confirmed by the taping test. The soldering property is more than 96% as to the extension rate and is more than 3.0 kg as to the tensile force (3 x 3 mm2).
The components of the electrically conductive copper paste and the conductivitythereofare mentioned in detail in the same applicant's Japanese Patent applications 55-6609 (laid open: 56-103260) (corresponding U.S. Patent No.4353816) and 60-216041 (corresponding U.S. Patent application of serial No.06/895716), and therefore the description thereof is omitted herein.
With respect to the plating resistant resist such as the resist CR-2001 developed by Asahi Chemical Research Laboratory Co. Ltd., so as to be used in the present invention, this resist is coated on a first circuit which is not electrically connected to a second circuit which is to be formed on the first circuit.
Therefore the resist is required to have an isolating property and atthe same time an alkali resistant property. Actually the resist has been developed to maintain the acidity more than 4hours in the alkali bath of 70 C and of pH 1 just like the copper chemical plating bath.
Similar to the electrically conductive copper paste ACP-007P, the resist contains as a main component an epoxy resin and is printed through a 180-mesh polyester screen and then is heatedfor30 mimutes atthetemperature 150also asto be hardened.The printing film is preferably 15-30 ~zmso asto resist chemicals and voltages. The main features are as follows: The resist is easily adhered to the base on which the resist is coated, and to a copper lamination and further is not deteriorated is immersed in the alkali bath of pH 12for a long time. The resist is quite safe in the practical use because the hardenerto be used is alkali having little poison.The resist is coated bywayofscreen printing and hasa hardener 1 Og mixed with the principal componant 1009 thereof, and is hardened in a settime 15-30 minutes atthe temperature 150-200 C.
The plating resistant resist is green in the condition ofinkand has an adhesion (cross-cut) 100/100 on a copper lamination, a surface hardness of morethan 8 H when measured bya pencil,a solvent resistant property (in trichlorethylene) by more than 15 sec., a soldering heat (260 C) resistant property of more than 5 cycles, a surface isolation resistance value of more than 5 x 1013fl,avolume resistance value of 1 x 1014fl - cm, voltage (15 Fm) resistant property of more than 3.5 and a dielectric tangent(1 MHz) of less than 0.03.

Claims (6)

1. A method forforming electric circuits on a base board comprising the steps of: al attaching a copper lamination to one side of the base board; b) etching the copper lamination to form thereon a pluralityoffirst electrically conductive circuits of a first lamination; c) coating the said one side of the base board with a plating-resistant resist except the portions which are required to be electrically connected to another circuitto beformed on the first electrically conductive circuits of the first lamination; d) coating an electrically conductive copper paste of being adapted to a metal plating on the said one side of the base board such that at least two ofthe first electrically conductive circuits may be electrically connected;; e) heating the base board to harden the base board; f) cleansing the base board; g) immersing the base board in a metal plating solution to provide a metal plating layer on the face of the electrically conductive paste so as to form at least one second electrically conductive circuit of a second lamination which is composed ofthe metal plating layer and the electrically conductive copper paste; h) coating a dielectric paste having a property of storing electricity on the remain ofthefirst electrically conductive circuits remained withoutthe electrically conductive copper paste coated thereon or on a part of the second electrically conductive circuit; i) heating the base board to harden the dielectric paste;; j) coating the said one side of the base board with an electrically conductive paste such that the electrically conductive paste will extend between the dielectric paste and one of the first electrically conductive circuits, or the said second electrically conductive circuit; and k) heating the base board to harden the eloectricallyconductive paste to therebyform an electricity storing circuit on the base board.
2. A method according to claim 1, wherein the base board is made of polymer.
3. A method according to claim 1 or claim 2 wherein the metal plating is a chemical copper plating.
4. A method according to any one of claims 1 to 3 wherein said other ofthefirst electrically conductive circuits includes at least one circuit.
5. A method for forming electric circuits on a base board substantially as hereinafter described with reference to the accompanying drawings.
6. Electric circuits formed on a base board substantially as herein described and shown in the accompanying drawings.
GB8700718A 1986-01-14 1987-01-13 A method for producing electric circuits on a base board Expired - Fee Related GB2186435B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP564486A JPS62163387A (en) 1986-01-14 1986-01-14 Method for forming capacitive circuit on circuit board

Publications (3)

Publication Number Publication Date
GB8700718D0 GB8700718D0 (en) 1987-02-18
GB2186435A true GB2186435A (en) 1987-08-12
GB2186435B GB2186435B (en) 1990-02-14

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Family Applications (1)

Application Number Title Priority Date Filing Date
GB8700718A Expired - Fee Related GB2186435B (en) 1986-01-14 1987-01-13 A method for producing electric circuits on a base board

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GB (1) GB2186435B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2310956A (en) * 1996-03-09 1997-09-10 Bosch Gmbh Robert Ceramic multi-layer laminated substrate with integral capacitor

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6274224B1 (en) 1999-02-01 2001-08-14 3M Innovative Properties Company Passive electrical article, circuit articles thereof, and circuit articles comprising a passive electrical article
US6577492B2 (en) 2001-07-10 2003-06-10 3M Innovative Properties Company Capacitor having epoxy dielectric layer cured with aminophenylfluorenes

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6021591A (en) * 1983-07-17 1985-02-02 株式会社アサヒ化学研究所 Method of producing conductive circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2310956A (en) * 1996-03-09 1997-09-10 Bosch Gmbh Robert Ceramic multi-layer laminated substrate with integral capacitor
GB2310956B (en) * 1996-03-09 1998-07-08 Bosch Gmbh Robert A method for manufacturing ceramic multi-layer substrates
US5876538A (en) * 1996-03-09 1999-03-02 Robert Bosch Gmbh Method for manufacturing a ceramic multilayer substrate for complex electronic circuits

Also Published As

Publication number Publication date
JPS62163387A (en) 1987-07-20
GB8700718D0 (en) 1987-02-18
GB2186435B (en) 1990-02-14

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PCNP Patent ceased through non-payment of renewal fee

Effective date: 19950113