GB2175471A - Synchronizing video sources - Google Patents

Abstract

A synchronizer for synchronizing the simultaneous display ("overlay") of two separate video sources generates substitute noise-free vertical and horizontal synchronizing signals SVSYNC, SHSYNC for controlling the synchronization of one of the sources and locking it to the other. An oscillator 120 operating at two separate frequencies above and below those corresponding to the nominal horizontal synchronization frequency of the master source is switched between the two frequencies dependent on the relative synchronization between the master and slave synchronization sources, and drives the slave source 106 to correct its synchronization. <IMAGE>

Description

SPECIFICATION Synchronizer for composite video display controller Backgroundofthe Invention A. Fieldofthe Invention The invention relates to video display controllers and comprises a synchronizerfor controlling the simultaneous display of video images from separate video sources.

B. PriorArt Video display controllers control the display of video signals from a particularvideo signal source.

The field oftelevision has had a strong impact on the characteristics of video displays and thus on video display controllers. In orderto insure the reception of television signals generated by different broadcast entities and received on equipment manufactured by diverse manufacturers, a uniform national standard for television signals has been created. For the United States, the standard is that established by the National Technical Standards Committee (NTSC). This standard sets criteria forvarious characteristics oftelevision signals, including the number of scan lines in aTV display, the scan rate, the refresh rate, and other characteristics. Included in the standard are specifications defining type, voltage level, and frequency of synchronizing signals.The most important of these are the horizontal and vertical synchronizing signals which are used to establish the scan lines and the refresh rate of a raster-scan display, and the color burst signal which is used to synchronize the color display.

Because of the prevelance oftelevision receivers, a number of video sources utilize television receivers as their display component and, thus, generate compati ble synchronizing and video display signalsfor application to the receiver. Among such devices are video tape recorders and players, video disc players and, more recently, computer video generators. With respect to stored image display sources such as video tapes and discs, there is frequently a not-insignificant amount of noise in the system intheformofspurious noise pulses, as well as dropped or missing synchronizing signals. This leadsto image instability or "jitter", that is, a rapid shift in the position of all or a portion of the display.This is often tolerable when only a single source provides the image being displayed. However, when the resultant image is the composite display oftwo or more video sources, for example, the overlay of a computer-generated display onto an underlying video disc display, the relative shifting between the two images can rapidly become intolerable, This is particularly the case when the video player is operated in the "freeze-frame" mode.

In that case, missing pulse or spurious pulses caused by noise are an especial problem.

In U.S. Pat. No.4,346,407, issued Aug.24, 1982 to R.

H. Baer, separate but dependent synchronizing loops are provided for establishing frequency and phase coherence between the signals to be synchronized.

With this arrangement, long waiting times (up to over 900 field periods or 15 seconds) can be required in order to establish synchronization.

Brief Summary of the Invention A. Objects ofthe Invention Accordingly, it is an object ofthe invention to provide an improved synchronizing circuitfor a composite video display controller.

Further, it is an object ofthe invention to provide a synchronizing circuit for a video display controllerthat allows the stable overlay of video images from separate sources.

In particular, it is an object of the invention to provide a synchronizing ci rcuit for a video display controller that enables the stable overlay of a computer-generated video image onto the image from a video source, such as a video disk player orthe like.

B. BriefSummaryofthe Invention In accordance with the present invention, video displays from two separate sources, at least one of which is responsive to a clock which controls the rate at which its horizontal and vertical synchronizing signals are generated, are synchronized by means of a controllable oscillator whose output frequency is varied in order to obtain synchrony between the horizontal and vertical synchronizing signals of the two sources. A substitute horizontal synchronizing signal is generated from one of the sources which serves as the "master" to which the other source (the "slave") is then synchronized. This substitute signal serves as the common reference to which the second source is referred in determining synchrony or lack thereof.In particular, it is used in combination with the vertical synchronizing signal of the master source to form a substitute vertical synchronizing signal for controlling the generation of vertical synchronization bythe second or "slave" source, and is used in combination with the horizontal synchronizing signal oftheslavesourcetoform acontrol signalforthe oscillator.The output of the latter in turn is fed back to the slave to control the generation of horizontal sync and thereby lock the two sources together: In the preferred embodiment of the invention described herein, the oscillator comprises a crystal controlled oscillatorwhich operates at either of two stable frequencies close to the nominal frequency corresponding to the master source to which the slave is to be locked, dependent on the state of a control input applied to it. These frequencies are, respectively, above and belowthe corresponding nominal frequen cy ofthe master. Specifically, the nominal frequency is set at 10.76 MHz, and the operating frequencies of the oscillator are set to 2 kHz above and belowthis frequency, respectively.This corresponds to a phase difference of no more than 1/20th cycle per horizontal scan line. Thus, the oscillator continuously "hunts" for synchronization on successive scan lines, but does so in an extremely narrow range. The result is a video overlay which is unusuallystabletothe eye.

Thisarrangementallowstheuseofa crystal oscillator, which is inherently highly stable and which provides a precisely defined frequency. Typical voltage-controlled oscillators do not use crystals, and are used to operate over a continuous range which typically extends over a larger percentage ofthe nominal oscillatorfrequencythan is the case here.

Such oscillators are less stable than crystal oscillators.

Further, it is difficult and expensive to obtain a linear frequency response to input errorsignals in such oscillators. Thus, the resultant overlay frequently suffers.

Further, the synchronization circuit of the present invention proceeds to equilibrium art a rate which is essentiallythe maximum obtainable (slew) rate ofthe circuit, as opposed to an expontential rate which characterizes conventional synchronization loops, thus further speeding attainment of synchronization.

Additionally, the phase required comparison is greatly simplified; in the present invention, phase comparison is achieved by means of a si mple flip-flop.

In the circuit ofthe present invention, the horizontal and vertical phase corrections take place concurrently and essentially independently. This also adds to the speed at which synchronization is achieved.

Detailed Description ofthe Invention The foregoing and other and further objects ofthe invention will be more readily understood from the following detailed description ofthe invention, when taken in conjunction with the accompanying drawings, in which: FIG. 1 shows a synchronizerfor a composite video display controller in accordance with the present invention; and FIG. 2 shows various waveforms characteristic of the circuit of 1.

In FIG. 1,a composite video signal is applied to the inputterminal 10ofa buffer amplifier 12. The composite video inputsignal, which typically may be derived from the output of a standard video disk playerwhoseformat is in accordance with NTSC television standards, includes a video signal and video display synchronizing signals, the latter including horizontal and vertical synchronizing signals forming part of a composite synchronizing signal, together with a chroma or color burst signal.

For ease of understanding, a typical composite video signal is shown in FIG. 2A. The composite video signal 14 includes a series of horizontal intervals 16 forming part of a video displayframe during which the successive horizontal lines ofthe resultant display are scanned,followed bya horizontal blanking interval 18 during which vertical retrace ofthe scan takes place in preparation for display ofthe next frame. As shown in more detail in FIG. 2B,the horizontal intervals 16 each include a "front porch" interval 20, a horizontal sync pulse 22, and a back porch interval 24 which carries a colorburstsignal 26 at3.58 MHzforsynchronizingthe color display.Returning to FIG. 2A,the interval 18 is formed from a first equalizing interval 28 which includes a series of equalizing pulses 30; a vertical sync interval 32 which includes a series of vertical sync pulses 34; a second equalizing interval 36 which includes a series of equalizing pulses 30; and an inactive horizontal sync interval 40 which includes a serles of horizontal sync pulses 42.

The output ofthe buffer amplifier 12 is applied to a video processor 50 which strips the various synch ronizing signals from the input video in orderto provide a vertical synchronizing signal VSYNC (waveform 52, FIG. 2C) on an output line 54, and a horizontal synchronizing signal HYSYNC (waveform 56, FIG. 2D) on an output line 58. The video processor 50 also includes an oscillator (not shown) which is tuneable to the frequency of the horizontal synchronizing signal and which receives a control signal atan input terminal 62 for controlling the exactfrequency and phase ofthe oscillator. In the present case, this control signal is supplied via a lead 64from the output of a monostable multivibrator66. In a physical device built in accordance with the invention,the processor 50 comprises a type TBA 950-2 chip.

The multivibrator 66 provides on a lead 67 an output pulse of well-defined duration in response to an input signal on lead 58 from processor 50. This pulse serves as a "substitute" horizontal synchronizing signal, SHSYNC. Multivibrator 66 is iocated within a feedback loop around the video processor 50 for providing, at the output ofthe multivibrator, a digital signal 72 (FIG.

2F) of lesser duration than the input and synchronized in frequency and in phasetothe horizontal synchronizing signal contained within the video input signal appliedto inputterminal 10. The outputof multivibrator 66 is also applied to a second monostable multivibrator76which provides an output77 (FIG. 2G) of well-defined duration and synchronized with the color burstsignal 26. A control signal INH is applied as a Clear input to generator76; when asserted, INH prevents synchronization to the external video source.

The output of generator 76 serves as a color burst gateforachromasignal processor 82 which compris esa phase-locked loop which receivesthechroma signal from the output of amplifier 12 via a lead 84. The outputofthe processor 82 is a chroma signal of standard frequency (e.g., 3.58 MHz in the NTSC standards) which is synchronized to the output ofthe generator76.

The substitute horizontal synchronizing signal is used to generate a substitute vertical signal by means of a flip-flop 100 and a monostable multivibrator 102.

The vertical synchronizing output of video processor 50 is synchronizedto the substitute horizontal synchronizing signal in flip-flop 100 and the resultant output triggers multivibrator 102. In orderto obtain a sharply defined edge, mu Itivibrator 102 preferably includes level sensing circuitry (e.g., a Schmitt trigger) fortriggering the output. The output of multivibrator 102 is thus a pulse SVSYNCwhich occurs atthetime of the coincidence of the vertical synchronizing signal from the master and the first subsequent substitute horizontal synchronizing pulse, and takes the place of the vertical synchronizing pulse from the external video source. It is applied through drivertransistor 104 to a video display processor 106 via a lead 108 for use in controlling the synchronized display of the two video sources. The processor 106 has the usual digital data inputs and outputs on buses 110 to 112, respectively, and provides a luminous output including the usual composite synchronizing signals on a lead 114. In a physical embodiment built in accordance with the invention, the processor 106 comprised a Texas lnstrumentTl 9128 Video Display Processor. In this case, the signal SVYNC was applied to the vertical reset input of the processor 106.

Finally, the output of multivibrator 66 is applied to the clock input of a flip-flop 116, which receives a further synchronizing signal input from the video processor 1 06 via a syne sepa rator 1 18. Flip-flop 1 10 in turn drives a voltage controlled oscillator 120 which provides a clock input signal to the video display processor 106 via a lead 122. The output offlip-flop 116 is at one of two levels, dependent on the relative timing ofthe inputs from the processor 106 and the multivibrator66.When theformersignal occurs prior in time with respect two ("leads") the latter, the flip-flop is set on the occurrence of the latter, This drives the oscillator at a frequency above its nominal (10.76 MHz) frequency, and thus provides a "fast" clock to the clock (CLK) input of processor 1 06to cause its output to advance in phase relative to the output of multivibrator 66 and thereby drivethetwo toward synchrony.

Conversely, when the output of video processor 106 occurs subsequently in time with respect to ("lags") the output of m ultivibrator 66, flip-flop 1 16 remains reset and oscillator 120 is driven to a rate that is below the nominal frequency. Underthis circumstance, the clock input to processor 106 is "slow" and the output ofthe processortends to retard in phase relative to the output of multivibrator 66 to thereby again drive the two toward synchrony. The output of processor 106 is thus synchronized with the external video source applied to inputterminal 10 forsimultaneous display therewith.

CONCLUSION From the foregoing, it will be seen that I have provided an improved synchronizerfora composite video displaycontroller.Thesynchronizerreceivesa composite video signal from an external source (e.g., a video tape deck or other source) which maybe contaminated by noise (i.e., either spurious pulses which should be absent or missing pulses, which should be present) and provides a regenerated composite synchronizing signal substantiallyfree of noise, Further, the circuit provides a master clock for a video display processor which is synchronized with the regenerated composite signal so as to provide a composite displayformed by overlaying video displays from separate sources, e.g., an external source such as a video disk and a computer-generated video display.

Claims (6)

1. A synchronizerfor synchronizing the overlay of video displays from a first video source containing vertical and horizontal synchronizing signals, and a second video source containing means for generating vertical and horizontal synchronizing signals in accordance with control signals applied thereto, comprising A. an oscillator providing a clock signal at a rate dependent on a control input applied thereto, B. means responsivetothe horizontal synchroniz- ing signal of said first source for generating a substitute horizontal synchronizing signal synchronized therewith, C. means responsive to said substitute horizontal signal and to horizontal synchronizing signals from said second source for providing a control input to said oscillator indicative of the relative synchronization between said signals, D. means for applying said clock signal as afirst control input to said second source for controlling the frequency of the horizontal synchronizing signals generated therein, E. means responsiveto said substitute horizontal signal and to the vertical synchronizing signal from said first source for generating a substitute vertical synchronizing signal, and F. means of applying said signal to said second source as a second control input thereto for controlling the generation of said vertical synchronizing signalstherein.

2. A synch ron izer according to claim 1 in which the means for generating said control input comprises a bistable element providing one oftwo control signal levels to said oscillator dependent on said relevant synchronization.

3. A synchronizer according to claim 1 in which the meansforgenerating a substitute horizontal synchronizing signal comprises a monostable multivibrator providing an output in response to receiving the horizontal synchronizing signal from said first source asinput.

4. Asynchronizeraccordingtoclaiml inwhichthe means for generating a substituevertical synchronizing signal comprises a bistable element connected to receive the vertical synchronizing from saidfirst source as a first input and providing an output in responseto receiving the substitute horizontal synchronizing signal as a second input.

5. Asynchronizeraccording to claim 1 in which the means for generating a control inputto said oscillator comprises a bistable element connected to receive horizontal synchronizing signals from said second video source as a first input and providing an output in response to receiving the substitute horizontal synchronizing signal as a second input.

6. Asynchronizeras claimed in claim 1 substantially as described herein with reference to the accompanying drawings.