GB2171556A - Method and apparatus for the production of a semiconductor - Google Patents
Method and apparatus for the production of a semiconductor Download PDFInfo
- Publication number
- GB2171556A GB2171556A GB08600328A GB8600328A GB2171556A GB 2171556 A GB2171556 A GB 2171556A GB 08600328 A GB08600328 A GB 08600328A GB 8600328 A GB8600328 A GB 8600328A GB 2171556 A GB2171556 A GB 2171556A
- Authority
- GB
- United Kingdom
- Prior art keywords
- semiconductor
- coating
- semiconductor substrate
- base material
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 40
- 238000000034 method Methods 0.000 title claims description 11
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 239000000463 material Substances 0.000 claims abstract description 28
- 239000011248 coating agent Substances 0.000 claims abstract description 21
- 238000000576 coating method Methods 0.000 claims abstract description 21
- 239000000758 substrate Substances 0.000 claims abstract description 20
- 238000005468 ion implantation Methods 0.000 claims abstract description 12
- 238000004381 surface treatment Methods 0.000 claims abstract description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 13
- 239000010703 silicon Substances 0.000 claims description 13
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 12
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 6
- 150000001875 compounds Chemical class 0.000 claims description 6
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 5
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 5
- 229910045601 alloy Inorganic materials 0.000 claims description 3
- 239000000956 alloy Substances 0.000 claims description 3
- 229910052742 iron Inorganic materials 0.000 claims description 3
- 239000004411 aluminium Substances 0.000 claims description 2
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 2
- 230000002411 adverse Effects 0.000 claims 1
- 239000012535 impurity Substances 0.000 abstract description 8
- 230000008021 deposition Effects 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 7
- 230000000052 comparative effect Effects 0.000 description 6
- 230000000694 effects Effects 0.000 description 4
- CWYNVVGOOAEACU-UHFFFAOYSA-N Fe2+ Chemical compound [Fe+2] CWYNVVGOOAEACU-UHFFFAOYSA-N 0.000 description 3
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 239000010935 stainless steel Substances 0.000 description 3
- 229910001220 stainless steel Inorganic materials 0.000 description 3
- 229910000838 Al alloy Inorganic materials 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 229910001069 Ti alloy Inorganic materials 0.000 description 2
- 229910000756 V alloy Inorganic materials 0.000 description 2
- 239000005083 Zinc sulfide Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000011109 contamination Methods 0.000 description 2
- 238000007733 ion plating Methods 0.000 description 2
- 238000010884 ion-beam technique Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- DRDVZXDWVBGGMH-UHFFFAOYSA-N zinc;sulfide Chemical compound [S-2].[Zn+2] DRDVZXDWVBGGMH-UHFFFAOYSA-N 0.000 description 2
- PFNQVRZLDWYSCW-UHFFFAOYSA-N (fluoren-9-ylideneamino) n-naphthalen-1-ylcarbamate Chemical compound C12=CC=CC=C2C2=CC=CC=C2C1=NOC(=O)NC1=CC=CC2=CC=CC=C12 PFNQVRZLDWYSCW-UHFFFAOYSA-N 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 239000000370 acceptor Substances 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- JRBRVDCKNXZZGH-UHFFFAOYSA-N alumane;copper Chemical compound [AlH3].[Cu] JRBRVDCKNXZZGH-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 239000011247 coating layer Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 238000002294 plasma sputter deposition Methods 0.000 description 1
- 238000000682 scanning probe acoustic microscopy Methods 0.000 description 1
- 150000003346 selenoethers Chemical class 0.000 description 1
- 238000010183 spectrum analysis Methods 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- -1 titanium-aluminium-vanadium Chemical compound 0.000 description 1
- 230000007723 transport mechanism Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/2654—Bombardment with radiation with high-energy radiation producing ion implantation in AIIIBV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- High Energy & Nuclear Physics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Physical Vapour Deposition (AREA)
Abstract
A semiconductor substrate is, during surface treatment such as ion implantation, surrounded by or supported by a frame, vessel, jig or container,which has a thin coating of material, eg a semiconductor, compatible with the semiconductor substrate, or having no undesirable influence thereon, so as to avoid or reduce deposition of unwanted impurities on the semiconductor surface. Preferably the coating has substantially the same coefficient of thermal expansion as the base material of the container, but if not then an intermediate layer may be provided between the coating and the base material.
Description
SPECIFICATION
Method and apparatus for the production of semiconductors
This invention relates to the production of semiconductors and more particularly it is concerned with the avoidance or reduction ofthe deposition of unwanted impurities on the surface of a semiconductor during surface treatment or doping thereof.
In the production of a semiconductor, it is usual to introduce selected impurities, such as donors or acceptors, and forthis purpose it is usual to employ eitheroftwo methods, namelythermal diffusion and ion implantation. Ofthesetwo, ion implantation has generally been thought preferable for the incorpora- tion of impurities to a required depth and to a required concentration. The present invention is particularly concerned with ion implantation but is not restricted to it.
Ion implantation is ordinarily performed by disposing a semiconductor substrate, which is usually earthed, in an evacuated vessel and applying, by meanswell-known in themselves, ions with an energy between several tens of kilo-electron-volts to several mega-electron-volts. When such ion implantation is performed, it is usual to provide a jig or other support meansto hold the semiconductor substrate. The support means may be made of a ferrous metal, a ferrous alloy such as stainless steel, an aluminium alloy or a titanium alloy. During ion implantation, it is usual to scan the semiconductorsubstrate by means ofthe ion beam in orderto implant the ions in a controlled manner. However, the ion beam almost inevitably impinges not only on the substrate but also the jig orothersupport means and the innerwall ofthe vacuum vessel.The result is usually a sputtering phenomenon and it is common to find that unwanted impurities such as iron, titanium and aluminium adhere to the surface of the semiconductor substrate.
The adhesion ofthese impurities results in various undesirable effects, such as an increase in conductiv ityofa region which should be, for example, intrinsic or insulative other undesirable effects such as the creation of barrier layers orthe undesirable alteration of lattice parameters and such like. The resultant components may exhibit various faults, such as a reduction in speed of operation. It will be understood thatthe undesirability of the impurity depends on the particular process.
It is the general object of the present invention to improve the production of semiconductors and in particularto avoid or reduce the contamination of a semiconductor during surface treatment or the doping or implantation ofthesemiconductorwith desired impurities.
Broadly stated, the present invention is characterised in thatthe parts (i.e. jig or other support and/or the vacuum vessel) surrounding or supporting the semiconductor substrate which is subjected to treatment is partly or completely coated with a material which is compatible with the desired characteristics of the treated substrate, i.e., has no unfavourable effect upon the semiconductor substrate. Thus if there is, for example, sputtering from the surrounding parts, the coating material may be deposited on the surface of the semiconductorbutwill not substantially affectthe treated semiconductor.
The surface treatment of the said parts to provide said coating may be carried out by ion implantation, chemical vapour deposition, plasma chemical vapour deposition, sputtering or ion plating.
The material employed for the coating may be the same as orsimilartothe material of the semiconductor which is to be treated. By "similarto" is meant in general a material having similar lattice parameters or a semiconductor of the same conductivity type though having possibly different doping levels. If silicon is employed as the material forthe semiconductor substrate, the prior coating ofthe surrounding or supporting parts may be of silicon or Group Ill-V compounds such as gallium arsenide and indium phosphide or Group Il-VI compound semiconductors such as zinc sulphide or zinc selenide. Alternatively, if the semiconductor substrate is a Group Ill-V compound, the coating may be another Group Ill-V compound or silicon.Likewise, ifthe semiconductor substrate is zinc sulphide or zi ne selenide, it may be possible to employ either silicon or gallium arsenide or indium phosphide as the material for coating the surrounding parts.
As a base material ofthesurrounding parts, there may be employed a ferrous alloy, an aluminium alloy, a titanium alloy ora suitable ceramic material. In any event it is preferable to select a base material of which the coefficient of thermal expansion is not substantially differentfrom that of the coating material. If the coefficients of thermal expansion ofthe base material and the coating material are substantially different, an intermediate layer or layers may be inserted between the base material and the coating layer.
The said surrounding parts may be a jig for holding the semiconductor substrate, the vacuum vessel and surrounding parts such as heaters, electrodes, transport mechanisms and such like and the advantages or effects ofthe present invention may be obtained by coating the whole or some of the surface of the surrounding parts.
Examples
EXAMPLE 1
Asilicon wafer was held by parts consisting of a base material of stainless steel (SUS 304) coated with a silicon layer of 5 micrometres in thickness by sputtering. The silicon wafer was subjected to doping with boron by ion implantation employing an accelerating voltage of 100 kilo-electron-volts and a dosage of 5 x 1 013/cm2 to obtain Sample 1.
For comparison, the same silicon wafer was subjected to the same boron-dopingtreatment without any coating of the stainless steel to obtain Comparative Sample 1.
The surfaces of the resulting samples were subject to spectral analysis using Auger electron spectroscopy. No detectable contamination wasfound on the surface of Sample 1 butthe surface of Comparative Sample No. 1 exhibited 2.3% iron, 0.5% chromium and 0.2% nickel.
EXAMPLE 2 A gallium arsenide wafer was held by a support consisting of a base material of an aluminium-copper alloy coated with a gallium arsenide layer of 10 micrometres in thickness by a metal oxide chemical vapour deposition method and then subjected to doping byaluminium by ion implantation with an accelerating voltage of 200 kilo-electron-volts and a dose of 7 x 1 0'4/cm2 to obtain Sample No. 2.
For comparison, the same galliumarsenidewafer was subjected to the same doping treatment without any coating ofthealuminium-copperalloytoobtain Comparative Sample No. 2.
When memory elements were prepared from these samples by similar processes, the yields were 92% in the case of Sample 2 and 65% for Comparative
Sample No. 2.
EXAMPLE 3
A silicon wafer was held by parts consisting of a base material of a titanium-aluminium-vanadium alloy coated with an intermediate layer of titanium nitride of 3 micrometres in thickness by an ion plating method and then with an indium phosphide layer of 1 micrometres in thickness by an MBE method and then subjected to phosphorus-doping by an ion implantation method with an accelerating voltage of 80 kilo-electron-volts and a dose of 4 x 1 013/cm2 to obtain
Sample 3.
For comparison the same silicon wafer was sub jectedtothesame phosphorus-doping treatment without coating ofthetitanium-aluminium-vanadium alloy of the parts to obtain Comparative Sample No. 3.
When memory elements were prepared from these samples by a similar process, the memory elements
obtained from Sample No. 3 showed an increase of
50% in reading andwriting speeds overthatof Comparative Sample No. 3.
Claims (9)
1. An apparatusforthe production of a semicon
ductor, the apparatus comprising a jig or other supportorcontainerfora semiconductor substrate
while the substrate is subjected to a surface treatment,
at least part of the support or container being coated with a material having no undesirable influence upon the semiconductor substrate.
2. Apparatus according to claim 1 wherein the coating comprises a semiconductor material.
3. Apparatus according to claim 2 wherein the semiconductor substrate comprises silicon and the coating material comprises either silicon ora Group
Ill-V semiconductor or a Group Il-VI semiconductor.
4. Apparatus according to anyforegoing claim wherein the said support or container is made of iron or aluminium, ortitanium or alloys thereof.
5. Apparatusaccordingtoanyforegoing claim wherein the coating material has substantially the samecoefficientofthermal expansion asthe base material of the said support or container.
6. Apparatus according to claim 1 wherein the coating material has a coefficient of expansion diffe
rentfrom that of the base material and an intermediate layer is provided between the two.
7. Amethodfortheproduction of semiconductor
devices comprising subjecting a semiconductor substrateto ion implantation, the semiconductor substrate
being surrounded or supported by parts primarily
composed of a base material which if sputtered on to the surface ofthe semiconductor substrate by virtue of impingement of a beam of ionsthereto adversely affects the quality or performance of said devices, a substantial proportion of the surface ofthe said being previously coated with a material which is compatible with the semiconductor substrate as implanted.
8. A method according to claim 7, wherein the semiconductor comprises silicon and the coating comprises either silicon or a Group Ill-V semiconductor compound, or a Group Il-VI semiconductor compound.
9. A method according to claim 7 wherein the semiconductor and the coating comprise gallium arsenide.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60003066A JPS61161713A (en) | 1985-01-10 | 1985-01-10 | Parts for manufacture of semiconductor |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB8600328D0 GB8600328D0 (en) | 1986-02-12 |
| GB2171556A true GB2171556A (en) | 1986-08-28 |
| GB2171556B GB2171556B (en) | 1988-08-17 |
Family
ID=11546956
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB08600328A Expired GB2171556B (en) | 1985-01-10 | 1986-01-08 | Method and apparatus for the production of semiconductor devices |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPS61161713A (en) |
| GB (1) | GB2171556B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1160854A1 (en) * | 2000-05-31 | 2001-12-05 | Infineon Technologies AG | Method of electrically contacting the reverse side of a semiconductor substrate during processing |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3428303B2 (en) * | 1996-07-11 | 2003-07-22 | 日新電機株式会社 | Ion irradiation equipment |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2050064A (en) * | 1979-04-26 | 1980-12-31 | Zeiss Jena Veb Carl | Electro-static chuck |
| GB2126417A (en) * | 1982-08-26 | 1984-03-21 | Heraeus Schott Quarzschmelze | Support systems for conveying semiconductor devices into hostile environments during manufacture |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5961043A (en) * | 1982-09-29 | 1984-04-07 | Nec Corp | Sample holder for ion implantation |
-
1985
- 1985-01-10 JP JP60003066A patent/JPS61161713A/en active Pending
-
1986
- 1986-01-08 GB GB08600328A patent/GB2171556B/en not_active Expired
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2050064A (en) * | 1979-04-26 | 1980-12-31 | Zeiss Jena Veb Carl | Electro-static chuck |
| GB2126417A (en) * | 1982-08-26 | 1984-03-21 | Heraeus Schott Quarzschmelze | Support systems for conveying semiconductor devices into hostile environments during manufacture |
Non-Patent Citations (1)
| Title |
|---|
| WO A1 79/00510 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1160854A1 (en) * | 2000-05-31 | 2001-12-05 | Infineon Technologies AG | Method of electrically contacting the reverse side of a semiconductor substrate during processing |
| US6746880B2 (en) | 2000-05-31 | 2004-06-08 | Infineon Technologies Ag | Method for making electrical contact with a rear side of a semiconductor substrate during its processing |
Also Published As
| Publication number | Publication date |
|---|---|
| GB8600328D0 (en) | 1986-02-12 |
| GB2171556B (en) | 1988-08-17 |
| JPS61161713A (en) | 1986-07-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 746 | Register noted 'licences of right' (sect. 46/1977) |
Effective date: 20011018 |
|
| PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20040108 |