GB2124035A - Printed circuit boards - Google Patents

Printed circuit boards Download PDF

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Publication number
GB2124035A
GB2124035A GB08220517A GB8220517A GB2124035A GB 2124035 A GB2124035 A GB 2124035A GB 08220517 A GB08220517 A GB 08220517A GB 8220517 A GB8220517 A GB 8220517A GB 2124035 A GB2124035 A GB 2124035A
Authority
GB
United Kingdom
Prior art keywords
thermally conductive
printed circuit
circuit board
conductive layer
board structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB08220517A
Other versions
GB2124035B (en
Inventor
Refaie Mohamed Mah Abdalla El
Edward Ronald Mcquat
Ian James Wylie
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to GB08220517A priority Critical patent/GB2124035B/en
Publication of GB2124035A publication Critical patent/GB2124035A/en
Application granted granted Critical
Publication of GB2124035B publication Critical patent/GB2124035B/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4641Manufacturing multilayer circuits by laminating two or more circuit boards having integrally laminated metal sheets or special power cores
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0207Cooling of mounted components using internal conductor planes parallel to the surface for thermal conduction, e.g. power planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/189Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09054Raised area or protrusion of metal substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09145Edge details
    • H05K2201/0919Exposing inner circuit layers or metal planes at the side edge of the PCB or at the walls of large holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/0929Conductive planes
    • H05K2201/09309Core having two or more power planes; Capacitive laminate of two power planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09536Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10727Leadless chip carrier [LCC], e.g. chip-modules for cards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/30Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
    • H05K2203/302Bending a rigid substrate; Breaking rigid substrates by bending
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/44Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits
    • H05K3/445Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits having insulated holes or insulated via connections through the metal core
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards

Abstract

A printed circuit board structure comprises a number of dielectric laminates 3, a sheet of thermally conductive material 1 and a further dielectric laminate 4. The sheet 1 has clearance apertures for subsequent holes 5 for plated through interconnections. Metallic conductor patterns 6 are formed on the outer surfaces of the structure. The asymmetrical placing of the thermally conductive layer with respect to the central plane of the structure provides maximum heat transfer from leadless electronic chips affixed to the conductor pattern. The dielectric laminate 4 may have apertures through which parts of the thermally conductive layer protrude to make contact with the chips. <IMAGE>

Description

SPECIFICATION Printed circuit boards This invention relates to printed circuit boards, particularly those used as integral interconnection substrates for electronic assemblies.
In order to meet the cost and performance criteria of modern electronic systems, advances continue to be registered by the integrated circuit industries along the lines of higher systems performance (as expressed by lower circuit and system delay time for the execution of logic functions) and lower systems cost. These advances may be achieved by integration at the primary chip level and therefore increased packaging density at the secondary interconnection substrate level.
It is also known that the relationship between reduced delay time per logic gate (i.e.
improved systems performance) and the power dissipation may be expressed (in accordance with the empirical statistical function derived from actual and computer models) as dg dp = K2- tc where ~dp is the power dissipation per unit area, ~dg is the packaging density in gates per unit area, -tc is the circuit delay time, and K2 = tc x Pc, where -pc is the power dissipation per gate which is nearly constant in obedience with the prevailing integrated circuit technology.
This relationship indicates universally that higher packaging density and lower circuit delay time will give rise to higher power dissipation and therefore the fundamental requirement of thermal management of the interconnection substrate and the system in order to ensure systems operate at the correct device temperature rise.
More specifically, with the advent of surface mounted components, e.g. leadless chip carriers and chip components, as alternative advanced packaging techniques capable for meeting the requirement of modern electronic systems, problems are encountered in the fabrication of conventional interconnection substrates compatible with the needs of high power dissipation devices. For instance, these packages or chips are leadless, planar in configuration and very limited space is available at the interconnection substrate level for the inclusion of thermally conducting planes. Other compatability problems, e.g. the mismatch of physical and mechanical properties between components and substrate, can be overcome by adopting techniques such as those disclosed in British patent application 81/13873 (Serial No. A) (M.M.A. ElRefaie-3).
In modern airborne electronic systems it is particularly essential to bring the total weight and volume of electronic assemblies to a minimum. Therefore the inclusion of an integral thermally conducting plane within the configuration of the interconnection substrate as part of the structural assembly to be used with or without air cooling is definitely advantageous.
In order to provide for the thermal management of particularly high power devices in the form of Dual-in-Line-Packages mounted into metallised through-holes formed into known printed circuit boards, a so called heat ladder or heat sink is fabricated from thermally conducting material, e.g. copper or aluminium, suitably coated for insulation and environmental protection and subsequently bonded with the aid of a dielectric insulating bonding agent, e.g. reinforced or non-reinforced polymer, to the printed circuit cards prior to component assembly. The configuration of this heat sink is such that the components are located above the heat sink and the thermal transfer takes place by both conduction and radiation eventually to a cold wall or other heat sink dependent on systems design.
In the cases of surface mounted components, however, due to the fact that components are mounted in the immediate vicinity of the substrate, several solutions have been documented. For example, see "Application of Additive Technology to Metal Core Boards" by G. Messner, Proceedings, Institute of Printed Circuits Technical Seminar on 1974 Fall Meeting, Los Angeles.
Printed circuit boards for high packaging density applications are conventionally fabricated into either two sided level of interconnection or multilayer level. The base material, which is commonly epoxide reinforced glass fibre laminate clad or unclad with copper foil is originally fabricated by laminating and bonding several plies of semicured epoxide reinforced glass fibre sheets, the total number of which and the thickness of individual sheets together define the overall thickness of the laminate.
In multilayer configuration, several interconnection conductive pattern planes are firstly fabricated by the well known printing and etching techniques and subsequently laminated together with interleaving sheets of semicured epoxide glass reinforced sheets.
Bonding of the whole structure takes place under well defined pressure and temperature cycle.
According to the present invention there is provided a printed circuit board structure including a plurality of plies of dielectric material laminated and bonded together, at least one of the outer surfaces of the ply structure being provided with a pattern of metallic conductors, and at least one layer of thermally conductive material placed asymmetrically within the ply structure with respect to the central plane thereof to provide maximum heat transfer from electronic devices affixed to the metallic conductors to the thermally conductive layer.
According to one embodiment of the invention the ply or plies between the layer of thermally conductive material and the outer surface provided with metallic conductors is formed with apertures in areas between parts of the conductor pattern, and the thermally conductive layer has corresponding portions protruding into the apertures, the portions protruding at least as far as the conductor carrying surface.
Embodiments of the invention will now be described with reference to the accompanying drawings, in which: Figure 1 illustrates a double sided printed circuit board with a single thermally conductive layer, Figure 2 illustrates a modification of the board of Fig. 1, Figure 3 illustrates a double sided board with two thermally conductive layers, Figure 4 illustrates a modification of the board of Fig. 3, Figure 5 illustrates a multilayer board with a single thermally conductive layer, Figure 6 illustrates a modification of the board of Fig. 5, Figure 7 illustrates a multilayer board with two thermally conductive layers, Figure 8 illustrates a modification of the board of Fig. 7, and Figure 9 illustrates an arrangement of two printed circuit boards having a common thermally conductive layer.
The board illustrated in Fig. 1 is made up of a number of epoxide reinforced glass fibre laminates 3, a sheet of aluminium, steel or copper 1 and a further glass fibre laminate 4.
The metal sheet 1 is preformed with clearance apertures at positions where subsequent plated through hole connections will be required. The metal sheet is then treated to promote the adhesion of semicured epoxide glass reinforced sheets by oxidising, anodising or pickling. The whole structure is then laminated and bonded under conditions of heat and pressure. During the bonding process the apertures in the metal sheet should be completely filled with sufficient epoxy material 2 being squeezed out of the adjoining laminations. In accordance with the disclosure in application No. 81/13873 the outer surface of the further laminate 4 may be coated with an elastomer layer (not shown) if required.
Holes 5 are drilled as required for making electrical interconnects through the structure and finally electrically conductive pattern 6 are selectively formed on the surfaces and in the holes of the structure. These may be formed by any known method, e.g. printing, plating, etc. by additive, semi additive or subtractive techniques. The patterns 6 may include pads 6a to which leadless electronic components or "chips" (not shown) can be electrically connected, e.g. by soldering.
There is thus a minimal impedance to heat transfer from devices attached to the pads 6a to the heat sink formed by the thermally conductive layer 1 by means of which heat may be conducted away from the areas adjacnt the devices. The thermal path is reduced to the thickness of the elastomer layer (if any) and the dielectric layer 4, which may be of the order of 50-200um.
In the modification shown in Fig. 2 provision is made for surface mounting of very high power dissipating devices. The construction of the structure is basically the same as for Fig. 1. However, the dielectric laminate 4 has apertures through which parts 7 of the pre-formed metal layer 1 protrude, to at least the surface mounting level. Devices subsequently mounted on the pads 6a can therefore be in intimate contact with the heat sink.
Fig. 3 shows a structure having a double sided mounting arrangement. In effect this is two asymmetrical structures as shown in Fig.
1 in a "back-to-back" configuration, with plated through hole connections between the two mounting surfaces.
Fig. 4 is a similar "back-to-back" configuration of two of the structures shown in Fig. 2.
Fig. 5 illustrates a multilayer circuit arrangement where the thermally conductive layer 1 is designed and fabricated as described above and is positioned in the vicinity of the surface mounting dielectric layer 4 and conductive metal pattern 6. A multilayer interconnection system 8 is incorporated in the laminated structure with buried interconnects 9 to provide for the interlayer connections in addition to the through connections 5. The multilayer system 8 is fabricated by known multilayer techniques.
Fig. 6 shows a modification of the multilayer structure of Fig. 5 with protruding parts of the thermally conducting layer for high power dissipation. Fig. 7 shows a "back-to-back" configuration of thermally conductive layers with a bured multilayer structure, and Fig. 8 shows a high power dissipation version of the structure of Fig. 7.
Fig. 9 shows a modification applicable to all the previous examples in which the thermally conductive layer 1 extends through two printed circuit structures. The central portion 1a of the plane is then deformed so that the two structures can enclose a cooling channel 11 through a cooling medium may be forced.
The thermally conductive plane may also be adapted to provide mechanical fixturing 12.
By providing maximum heat transfer from the electronic devices affixed to the printed circuit the least adverse effects on the interconnection capability of the printed circuit structure are achieved.

Claims (11)

1. A printed circuit board structure including a plurality of plies of dielectric material laminated and bonded together, at least one of the outer surfaces of the ply structure being provided with a pattern of metallic conductors, and at least one layer of thermally conductive material placed asymmetrically within the ply structure with respect to the central plane thereof to provide maximum heat transfer from electronic devices affixed to the metallic conductors to the thermally conductive layer.
2. A printed circuit board structure in which the ply or plies between the layer of thermally conductive material and the outer surface provided with metallic conductors is formed with apertures in areas between parts of the conductor pattern, and the thermally conductive layer has corresponding portions protruding into the apertures, the portions protruding at least as far as the conductor carrying surface.
3. A printed circuit board structure according to claim 1 or 2 including on the second outer surface a further pattern of metallic conductors and provided with a second layer of thermally conductive material placed within the ply structure adjacent the second outer surface to provide maximum heat transfer from electronic devices affixed to the metallic conductors of the further pattern.
4. A printed circuit board structure as claimed in claim 3 wherein the ply or plies between the second layer of thermally conductive material and the second outer surface is formed with apertures in areas between parts of the second conductor pattern, and the second thermally conductive layer has corresponding portions protruding into the apertures as least as far as the conductor carrying surface.
5. A printed circuit board structure according to any preceding claim including a multilayer interconnection system incorporated within the ply structure beneath the thermally conductive layer or layers.
6. A printed circuit board structure according to any preceding claim including plated through hole connections between the conductor layers, the plated through holes passing through clearance holes in the thermally conductive layer(s).
7. A printed circuit board assembly including two structures according to any preceding claim wherein one thermally conductive layer extends between and is common to both structures, the portion of the thermally conductive layer between the two structures being deformed so that the structures enclose a cooling channel through which a cooling medium can be forced.
8. A printed circuit board structure according to any preceding claim in which elastomer layers are interposed in the interface between the component mounting conductor pattern and the outer ply of dielectric material.
9. A printed circuit board structure according to any preceding claim wherein the thermally conductive layer is copper, aluminium or steel.
10. A printed circuit board structure substantially as described with reference to any one of the accompanying drawings.
11. Electronic equipment including a printed circuit board structure according to any preceding claim.
GB08220517A 1982-07-15 1982-07-15 Printed circuit boards Expired GB2124035B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB08220517A GB2124035B (en) 1982-07-15 1982-07-15 Printed circuit boards

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB08220517A GB2124035B (en) 1982-07-15 1982-07-15 Printed circuit boards

Publications (2)

Publication Number Publication Date
GB2124035A true GB2124035A (en) 1984-02-08
GB2124035B GB2124035B (en) 1985-07-31

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Family Applications (1)

Application Number Title Priority Date Filing Date
GB08220517A Expired GB2124035B (en) 1982-07-15 1982-07-15 Printed circuit boards

Country Status (1)

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Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2153595A (en) * 1984-01-17 1985-08-21 O Key Printed Wiring Co Ltd Printed circuit board and method of manufacturing such a board
EP0207012A2 (en) * 1985-06-17 1986-12-30 MAS INDUSTRIALE S.p.A. Method to ensure the cooling of electronic components fixed on a multilayer for printed circuits and multilayer realized according to said method
GB2268630A (en) * 1992-07-03 1994-01-12 Nippon Cmk Kk Printed wiring board
EP0766186A2 (en) * 1995-09-27 1997-04-02 Yokogawa Electric Corporation Data processor
GB2329073A (en) * 1997-09-03 1999-03-10 Motorola Israel Ltd Multi-layer circuit board with layers acting as a "heat capacitor"
EP1280392A1 (en) * 2001-07-26 2003-01-29 Siemens Information and Communication Networks S.p.A. Printed circuit board and relevant manufacturing method for the installation of microwave chips up to 80 Ghz
EP1445799A2 (en) * 2003-02-05 2004-08-11 Leopold Kostal GmbH & Co. KG Heat dissipation device for a semiconductor on a printed circuit board
WO2005002302A1 (en) * 2003-06-24 2005-01-06 Bae Systems Plc Flexi-rigid printed circuit board with integral flexible heat sink area
WO2011014272A1 (en) * 2009-07-31 2011-02-03 Raytheon Company Systems and methods for composite structures with embedded interconnects
US8826640B2 (en) 2010-11-12 2014-09-09 Raytheon Company Flight vehicles including electrically-interconnective support structures and methods for the manufacture thereof
JP2016213375A (en) * 2015-05-12 2016-12-15 日本精工株式会社 Heat dissipation substrate and heat dissipation case for housing the same therein
JP2019121779A (en) * 2018-01-10 2019-07-22 サムソン エレクトロ−メカニックス カンパニーリミテッド. Printed circuit board and battery module including the same

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104981107B (en) * 2014-04-14 2018-01-26 深南电路有限公司 The processing method and golden finger circuit board of circuit edge connector
CN104981113B (en) * 2014-04-14 2017-12-29 深南电路有限公司 The processing method and golden finger circuit board of circuit edge connector

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2153595A (en) * 1984-01-17 1985-08-21 O Key Printed Wiring Co Ltd Printed circuit board and method of manufacturing such a board
EP0207012A2 (en) * 1985-06-17 1986-12-30 MAS INDUSTRIALE S.p.A. Method to ensure the cooling of electronic components fixed on a multilayer for printed circuits and multilayer realized according to said method
EP0207012A3 (en) * 1985-06-17 1989-03-15 MAS INDUSTRIALE S.p.A. Method to ensure the cooling of electronic components fixed on a multilayer for printed circuits and multilayer realized according to said method
GB2268630A (en) * 1992-07-03 1994-01-12 Nippon Cmk Kk Printed wiring board
EP0766186A2 (en) * 1995-09-27 1997-04-02 Yokogawa Electric Corporation Data processor
EP0766186A3 (en) * 1995-09-27 1997-12-29 Yokogawa Electric Corporation Data processor
GB2329073A (en) * 1997-09-03 1999-03-10 Motorola Israel Ltd Multi-layer circuit board with layers acting as a "heat capacitor"
GB2329073B (en) * 1997-09-03 2002-04-17 Motorola Israel Ltd Circuit board
EP1280392A1 (en) * 2001-07-26 2003-01-29 Siemens Information and Communication Networks S.p.A. Printed circuit board and relevant manufacturing method for the installation of microwave chips up to 80 Ghz
EP1445799A2 (en) * 2003-02-05 2004-08-11 Leopold Kostal GmbH & Co. KG Heat dissipation device for a semiconductor on a printed circuit board
EP1445799A3 (en) * 2003-02-05 2006-04-12 Leopold Kostal GmbH & Co. KG Heat dissipation device for a semiconductor on a printed circuit board
WO2005002302A1 (en) * 2003-06-24 2005-01-06 Bae Systems Plc Flexi-rigid printed circuit board with integral flexible heat sink area
WO2011014272A1 (en) * 2009-07-31 2011-02-03 Raytheon Company Systems and methods for composite structures with embedded interconnects
US8809689B2 (en) 2009-07-31 2014-08-19 Raytheon Company Systems and methods for composite structures with embedded interconnects
US8826640B2 (en) 2010-11-12 2014-09-09 Raytheon Company Flight vehicles including electrically-interconnective support structures and methods for the manufacture thereof
JP2016213375A (en) * 2015-05-12 2016-12-15 日本精工株式会社 Heat dissipation substrate and heat dissipation case for housing the same therein
JP2019121779A (en) * 2018-01-10 2019-07-22 サムソン エレクトロ−メカニックス カンパニーリミテッド. Printed circuit board and battery module including the same
JP7115666B2 (en) 2018-01-10 2022-08-09 サムソン エレクトロ-メカニックス カンパニーリミテッド. Printed circuit board and battery module containing same

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