GB2099246A - System for phase locking clock signals to a data stream frequency modulated on a carrier - Google Patents

System for phase locking clock signals to a data stream frequency modulated on a carrier Download PDF

Info

Publication number
GB2099246A
GB2099246A GB8212629A GB8212629A GB2099246A GB 2099246 A GB2099246 A GB 2099246A GB 8212629 A GB8212629 A GB 8212629A GB 8212629 A GB8212629 A GB 8212629A GB 2099246 A GB2099246 A GB 2099246A
Authority
GB
United Kingdom
Prior art keywords
phase
clock
output
data stream
counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB8212629A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Monolithic Systems Corp
Original Assignee
Monolithic Systems Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Monolithic Systems Corp filed Critical Monolithic Systems Corp
Publication of GB2099246A publication Critical patent/GB2099246A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0992—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
    • H03L7/0993—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider and a circuit for adding and deleting pulses

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Dc Digital Transmission (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
GB8212629A 1981-04-30 1982-04-30 System for phase locking clock signals to a data stream frequency modulated on a carrier Withdrawn GB2099246A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/259,020 US4424497A (en) 1981-04-30 1981-04-30 System for phase locking clock signals to a frequency encoded data stream

Publications (1)

Publication Number Publication Date
GB2099246A true GB2099246A (en) 1982-12-01

Family

ID=22983167

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8212629A Withdrawn GB2099246A (en) 1981-04-30 1982-04-30 System for phase locking clock signals to a data stream frequency modulated on a carrier

Country Status (3)

Country Link
US (1) US4424497A (enExample)
JP (1) JPS57188166A (enExample)
GB (1) GB2099246A (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2132042A (en) * 1982-12-15 1984-06-27 British Broadcasting Corp Frequency and timing sources
EP0134374A1 (fr) * 1983-09-07 1985-03-20 International Business Machines Corporation Horloge à verrouillage de phase
FR2556527A1 (fr) * 1983-12-12 1985-06-14 Ates Componenti Elettron Synchronisateur de phase de type numerique pour signaux isofrequentiels, en particulier pour demodulateur de signaux
EP0157053A3 (en) * 1984-03-19 1987-09-02 Western Digital Corporation High order digital phase lock loop system
GB2205012A (en) * 1987-05-20 1988-11-23 Sony Corp Digital phase-locked loop circuits

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4498103A (en) * 1982-09-13 1985-02-05 Rca Corporation Slow genlock circuit
US4534036A (en) * 1982-12-08 1985-08-06 Paradyne Corporation Phase tracking loop impairment monitor for modems
US4628461A (en) * 1984-04-30 1986-12-09 Advanced Micro Devices, Inc. Phase detector
US4808884A (en) * 1985-12-02 1989-02-28 Western Digital Corporation High order digital phase-locked loop system
US4841257A (en) * 1988-03-28 1989-06-20 Unisys Corporation High-speed sampling phase detector for clock and data recovery system
US5815041A (en) * 1996-04-12 1998-09-29 Silicon Image, Inc. High-speed and high-precision phase locked loop having phase detector with dynamic logic structure
US6326826B1 (en) 1999-05-27 2001-12-04 Silicon Image, Inc. Wide frequency-range delay-locked loop circuit

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3624511A (en) 1969-08-07 1971-11-30 Communications Satellite Corp Nonlinear phase-lock loop
JPS50105364A (enExample) * 1974-01-28 1975-08-20
US4017806A (en) 1976-01-26 1977-04-12 Sperry Rand Corporation Phase locked oscillator
US4030045A (en) 1976-07-06 1977-06-14 International Telephone And Telegraph Corporation Digital double differential phase-locked loop

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2132042A (en) * 1982-12-15 1984-06-27 British Broadcasting Corp Frequency and timing sources
EP0134374A1 (fr) * 1983-09-07 1985-03-20 International Business Machines Corporation Horloge à verrouillage de phase
FR2556527A1 (fr) * 1983-12-12 1985-06-14 Ates Componenti Elettron Synchronisateur de phase de type numerique pour signaux isofrequentiels, en particulier pour demodulateur de signaux
EP0157053A3 (en) * 1984-03-19 1987-09-02 Western Digital Corporation High order digital phase lock loop system
GB2205012A (en) * 1987-05-20 1988-11-23 Sony Corp Digital phase-locked loop circuits
FR2615677A1 (fr) * 1987-05-20 1988-11-25 Sony Corp Circuit de boucle de verrouillage de phase numerique
GB2205012B (en) * 1987-05-20 1991-06-12 Sony Corp Digital phase locked loop circuits

Also Published As

Publication number Publication date
US4424497A (en) 1984-01-03
JPS57188166A (en) 1982-11-19
JPH0452551B2 (enExample) 1992-08-24

Similar Documents

Publication Publication Date Title
US4085288A (en) Phase locked loop decoder
US4563657A (en) Frequency synthesizer and digital phase lock loop
US4424497A (en) System for phase locking clock signals to a frequency encoded data stream
US4118738A (en) Time base error corrector
CA1307327C (en) Digital phase locked loop
US3602828A (en) Self-clocking detection system
GB1515066A (en) Apparatus for compensating carrier phase errors in a receiver for discrete data values
KR0139197B1 (ko) 디지탈 위상 고정 루프 회로
JPH0761067B2 (ja) 受信されたデジタル通信信号からビットクロックを回復する方法および回路装置
US4080576A (en) Tow mode harmonic and nonharmonic phase detector
EP0419161B1 (en) Clock jitter suppressing circuit
GB2212366A (en) Digital data separator
EP0214676A1 (en) Clock signal regenerator arrangement
US4504792A (en) FM Detector using monostable multivibrators
US4628519A (en) Digital phase-locked loop circuit
US4423520A (en) Quantization circuit for image data transmission system
JP3786440B2 (ja) デジタル位相コンパレータ
US4079327A (en) Signal transition detector
US3691474A (en) Phase detector initializer for oscillator synchronization
US4775989A (en) Timing phase detector circuit
JPS6249663B2 (enExample)
US4415933A (en) Carrier wave recovery circuit
US3790892A (en) Clock pulse regenerating circuit for demodulating input pulse signal having uneven time pulse distribution
US3617635A (en) Timing recovery system in which an equalizer{40 s sampling time is set in response to the difference between the actual mean square error and a predetermined acceptable error
US3893170A (en) Digital phase control circuit

Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)