GB2085227A - Semiconductor device having localized electroluminescent diodes - Google Patents
Semiconductor device having localized electroluminescent diodes Download PDFInfo
- Publication number
- GB2085227A GB2085227A GB8129790A GB8129790A GB2085227A GB 2085227 A GB2085227 A GB 2085227A GB 8129790 A GB8129790 A GB 8129790A GB 8129790 A GB8129790 A GB 8129790A GB 2085227 A GB2085227 A GB 2085227A
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- GB
- United Kingdom
- Prior art keywords
- layer
- substrate
- layers
- junction
- semi
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
Abstract
The individual LEDs (J11, J12,...) of an array are laterally isolated by semi- insulating regions 5 having a thickness at least equal to the thickness of semiconductor layers 2 and 3, and are connected to conductors 6,7 extending above the semi-insulating regions. The conductive layers may be formed directly on the semi-insulating regions or may be separated by an insulating layer. The semi-insulating regions may be produced by ion/proton implantation. A second PN junction (J2) situated below the EL diodes provides transverse electrical insulation. The structure may utilize homojunctions or heterojunctions of III - V compounds. <IMAGE>
Description
SPECIFICATION
Semiconductor device having localized electroluminescent diodes
The present invention relates to a semiconductor device which on a semiconductor substrate of a first conductivity type has a plurality of electroluminescent diodes arranged in lines and columns and obtained from an assembly of at least a first flat layer of a second conductivity type which is opposite to the first and which is covered with a second layer which is also flat but is of the same conductivity type as the substrate, in which the said first layer forms with the second layer a first P-N junction having elctroluminescent properties and with the substrate forms a second P-N junction having insulating properties, the said diodes being connected to connection conductors situated at a surface of the device and connecting each of the said layers.
Electroluminescent elements are often used in groups which form matrices of dots usually arranged according to XY coordinates. These elements generally are diodes having P-N homo junctions or P-N- hetero junction, but irrespective of the type used the said elements will hereinafter be referred to by the general term of diodes.
It provides to be particularly interesting to manufacture the electroluminescent matrices in a monolithicform having minimum dimensions but their use then involves a number of difficulties.
In fact, in a large number of applications the electroluminescent diodes which form a matrix must be provided in a large quantity on a small surface and the radiation emission of each of them must moreover be localized in a substantially punctiform zone which is adapted to the dimensions of the oppositely located receivers. On the other hand, it is known for improving the response rate of the said diode to reduce the capacity of the junctions by reducing the area thereof.
The different requirements thus lead to the manufacture of matrices the active elements (electroluminescent diodes) and passive elements (connections of the lines and/or columns) of which are situated very close together. In these circumstances a correct insulation between the said elements is often difficult to perform and can be obtained only due to on the one hand a perfect bounding of the pattern of each of them and on the other hand by a good homogeneity of the insulating layers which separate them.
Localizing the diode in a wafer of a given semiconductor material is now generally obtained by a diffusion treatment preceded by photoetching of an insulating layer which covers the said material.
Said photoetching treatment which uses chemical methods often causes a lateral attack of the insulating layer to be treated and sometimes parasitic transverse attacks of said layer if the photoetching mask is not quite homogeneous. These defects may then result in short-circuits between active or passive elements during depositing the metal layers for the contact connection.
Furthermore, the localization of the diode occupies a large area of the plate for, because the diffusion is isotropic, the width of the insulation wall which separates the said diodes is at least equal to twice the diffusion depth.
The solutions known so far to avoid said defects and to obtain a good localization have always resulted in an increase of the number of treatments for etching and depositing oxide layers or metal layers. All these treatments remain complicated, hence laborious and expensive: it may be noted that for this reason the use of the matrices has hardly made any progress.
It is the object of the present invention to provide a compact matrix of electroluminescent diodes which is simple and rapid to manufacture.
In fact the present invention relates to a semiconductor device which on a semiconductor substrate of a first conductivity type has a plurality of localized electroluminescent diodes arranged in lines and columns and obtained from an assembly of at least a first flat layer of a second conductivity type which is opposite to the first and which is covered with a second layer which is also flat but is of the same conductivity type as the substrate, in which the said first layer forms with the second layer a first p-n junction having electroluminescent properties and forms with the substrate a second p-n junction having insulating properties, the said diodes being connected to connection conductors present at a surface of the device and in contact with each of the said layers, said device being characterized in that the electro-luminescent diodes are surrounded by semi-insulating regions having a thickness which is at least equal to the sum of the thickness of the said layers and that the connection conductors at the surface are situated substantially above the said semi-insulating regions.
A semi-insulating material is treated to obtain a very high resistivity which is larger than that of the non-treated material of the adjoining regions to obtain values of at least 104 and preferably 106 to 108
Ohm/cm.
In these circumstances, from an optical point of view, the electroluminescent diodes are readily localized and, from an electric point of view, they can be laterally insulated from each other in a simple manner.
Otherwise the semi-insulating regions have a sufficient resistivity so that the surface connections can be deposited directly without the danger of short-circuits with the active parts of the underlying layers.
The second P-N junction which is situated below the electroluminescent diodes presents the advantage that it enables the electric insulation of said diodes in the transverse direction. For example, the device according to the invention forms a matrix of electroluminescent diodes having substantially punctiform emission which are insulated totally from each other and can be energized as one assembly.
The greater part of the connection conductors bears on the semi-insulating regions and is sufficiently insulated with respect to the adjoining elements: only the regions of the said connections which overlie other connections must be separated from the latter by a fresh insulating layer.
This simplification of the insulation problems considerably improves the use of the method of manufacturing the device in accordance with the invention, which use otherwise only uses conventional methods for epitaxy, diffusion, implantation, deposition and photo-etching. The first and the second layers which form the first P-N junction having electroluminescent properties preferably consist of the same material or of materials having the same lattice spacing, which removes the stresses and dislocations as a result of any heterogeneity of the material.
If the substance is of GaAs, the said layers are preferably manufacted either from the same compound, or from Ga1-xAixAs having the same lattice spacing.
If the substrate is of GaP, the homo epitaxy
GaP/GaP is preferably used. If GaAs, xPx is to be used having a lattice spacing which differs from that of GaP, it is in fact necessary to provide a buffer layer having a progressively varying composition between the substrate and the first layer which is deposited on the substrate.
The regions which restrict the extent of the said electro-luminescent diodes are, for example, made semi-insulating by implantation of ions and in particular of protons via the apertures which are provided in a mask of polyimide.
In fact it is known that by means of implantation of ions, of a suitable nature and energy and in the correct doses, a region of semiconductor material can be converted into a semi-insulating region by the formation of lattice defects which considerably reduce the concentration of free charge carriers in the material.
The invention will now be illustrated with reference to the accompanying drawing.
Figure 1 is a diagrammatic perspective elevation of the device according to the invention.
Figure 2 is a sectional view taken on the line ll-ll of the same device.
It is to be noted that the geometric ratios in the
Figures have not been observed, for certain dimensions are exaggerated, in particular in the thickness, so as to clarify the drawings.
As shown in Figures 1 and 2, the device according to the invention has a substrate 1 on which are deposited successively the epitaxial layers 2 and 3.
The substrate 1 is of a first conductivity type, for example N-type, the first flat epitaxial layer 2 which is deposited on the surface of the said substrate is of a second conductivity type which is opposite to the first and hence is of the P type, and the second layer 3 is of the N-type.
In order to reach the said layer 2 from the surface of the device, islands 4 of the P+ type are formed which thus form the contact electrodes. If desired, islands 4 of the N+ type may be formed which are in contact with the layer 3.
The layers 2 and 3 form a P-N junction having electroluminescent properties J1 and the layer 2 forms with the substrate 1 a P-N junction having insulation properties J2. The said layers 2 and 3 are divided in a sequence of independent elements by semi-insulating islands so as to form a plurality of electroluminescent diodes (J11 J12,---) which are laterally insulated by the said islands 5 and in the transverse direction by the junction J2 which is also divided into a series of independent elements (J21 J22,...) opposite to the said diodes.
In order to ensure the localization of the electroluminescent diodes the depth of the islands 5 is at least equal to the sum of the thickness of the layers 2 and 3, but preferably it is larger.
The connection grids 6 and 7 are provided at the surface of the semi-insulating islands 5 according to a substantially orthogonal pattern, the said connections 6 and 7 being insulated from each other at their crossings by an insulating layer 8, for example of Sill.
In order to restrict the value of possible leakage currents at the surface, the insulation of the said connection grids 6 and 7 can be favourably intensified by the presence of dielectric sublayers (six2, Si3N4) which are not shown in the drawings.
In order to obtain this device, there is started from the substrate 1 of a compound comprising at least one element of column 3 of the periodic table of elements and at least one element of column 5 of the said table, for example gallium arsenide (GaAs) of the N-type.
This substrate is covered with a first layer 2 of gallium aluminium arsenide Ga1 xAixAs which is deposited by epitaxy and is doped with zinc so as to obtain the P-conductivity type which is opposite to that of the substrate 1 which is of the N-type, and then with a second layer 3 also of gallium aluminium arsenide Gal,AI,As, but of the first conductivity type
N.
A thin insulating layer of silicon nitride which is not shown in the drawing and has then been subjected to a photo-etching treatment has been deposited on the outer surface of the layer 3, after which the islands 4 which form the contact electrodes are formed in the apertures hereof by diffusion of zinc impurities.
After removing said insulating layer by etching, a resin mask is deposited which is impermeable to the intended ion bombardment. This mask consists, for example, of a polyimidefilm which is etched through another mask obtained by depositing a suitable photosensitive lacquer. The polyimide resin mask shows a series of rectangular parallel apertures in a certain direction and another series of apertures which are likewise rectangular and are parallel but in a direction which is substantially at right angles to the preceding direction so that a plurality of square or rectangular zones are bounded which are impervious to the ion bombardment; the apertures in the mask correspond to the surface of the semi-insulating deep regions which it is desired to obtain. If desired the resin mask may be replaced by a metal mask, especially by a gold mask.
The substrate 1 and the layers 2 and 3 covering the same are then subjected to a proton bombardment, for example, perpendicularly to the surface of the said layer. The defects of the crystal lattice formed by the protons cause a very strong increase of the resistivity of the regions 5 formed, in which form then on they show the characteristics of an insulating material.
After removing the polyimide mask the first connection grid 6 may be manufactured by means of a first metal layer deposited on the surface of the layer and then subjected to a photo-etching treatment.
After having deposited on said grid 6 an insulating layer 8 of, for example, SiO2, and having subjected same to a photo-etching treatment, a second metal layer is deposited which after photo-etching forms the second connection grid 7 which is insulated from the first grid 6, at least at the level of the crossings, by the said layer 8.
In accordance with the invention the photoetching mask to obtain the connection grids 6 and 7 is manufactured so that they are deposited mainly on the surface of the semi-insulating regions 5.
Claims (8)
1. A semiconductor device which on a semiconductor substrate 1 of a first conductivity type has a plurality of localized electroluminescent diodes arranged in lines and columns and obtained from an assembly of at least a first flat layer of a second conductivity type which is opposite to the first, which layer is covered by a second layer which is also flat but is of the same conductivity type as the substrate, in which the said first layer forms with the second layer a first P-N junction having electroluminescent properties and, with the substrate forms a second P-N junction having insulating properties, the said diodex being connected to connection conductors situated on the surface of the said layers, characterized in that the electroluminescent diodes are surrounded by semi-insulating regions
having a thickness which is at least equal to the sum of the thicknesses of the said layers and that the connection conductors at the surface are situated substantially above the said semi-insulating regions.
2. A device as claimed in Claim 1, characterized in that the first and second layers which form the first P-N junction having electro-luminescent properties consist of the same material.
3. A device as claimed in Claim 1, characterized in that the first and the second layers which form a first P-N junction having electroluminescent properties consist of materials having the same lattice spacing.
4. A device as claimed in any of the Claims 1 to 3, characterized in that the first and second layers which form a first P-N junction having electroluminescent properties consist of a material having a lattice spacing differing from the material of the substrate and that between the substrate and the said first flat layer a layer is deposited having gradually adapted lattice spacing.
5. A device as claimed in Claims 1 to 3, characterized in that the substrate is of gallium arsenide and that the layers which cover same have been selected in the series of gallium arsenide and gallium aluminium arsenide.
6. A device as claimed in Claims 1 and 2, characterized in that the substrate and the layers covering same are of gallium phosphide.
7. A device as claimed in Claims 1 and 4, characterized in that the substrate is of gallium phosphide GaP and that the layers covering same are of gallium arsenide phosphide.
8. A semiconductor device substantially as herein described with reference to Figures 1 and 2 of the accompanying drawing.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8021346A FR2491714A1 (en) | 1980-10-06 | 1980-10-06 | SEMICONDUCTOR DEVICE WITH LOCALIZED ELECTROLUMINESCENT DIODES AND METHOD OF MANUFACTURING THE SAME |
Publications (2)
Publication Number | Publication Date |
---|---|
GB2085227A true GB2085227A (en) | 1982-04-21 |
GB2085227B GB2085227B (en) | 1984-06-06 |
Family
ID=9246580
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8129790A Expired GB2085227B (en) | 1980-10-06 | 1981-10-02 | Semiconductor device having localized electroluminescent diodes |
Country Status (4)
Country | Link |
---|---|
JP (1) | JPS5791576A (en) |
DE (1) | DE3138804A1 (en) |
FR (1) | FR2491714A1 (en) |
GB (1) | GB2085227B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0180479A2 (en) * | 1984-11-02 | 1986-05-07 | Xerox Corporation | Light-emitting diode array |
EP0182430A1 (en) * | 1984-11-23 | 1986-05-28 | Rtc-Compelec | Light-emitting diodes array and method for its production |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR910006706B1 (en) * | 1988-12-12 | 1991-08-31 | 삼성전자 주식회사 | Manufacturing method of light emitted diode array head |
KR940005454B1 (en) * | 1991-04-03 | 1994-06-18 | 삼성전자 주식회사 | Compound semiconductor device |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2079612A5 (en) * | 1970-02-06 | 1971-11-12 | Radiotechnique Compelec | |
DE2235865A1 (en) * | 1972-07-21 | 1974-01-31 | Licentia Gmbh | Multi-element semiconductor device - having implanted semi-insulating zones separating (photodiode) elements |
JPS5193688A (en) * | 1975-02-14 | 1976-08-17 | Matorikusuno seizohoho | |
US4032373A (en) * | 1975-10-01 | 1977-06-28 | Ncr Corporation | Method of manufacturing dielectrically isolated semiconductive device |
JPS54117692A (en) * | 1978-03-03 | 1979-09-12 | Nec Corp | Semiconductor light emitting diode |
-
1980
- 1980-10-06 FR FR8021346A patent/FR2491714A1/en active Granted
-
1981
- 1981-09-30 DE DE19813138804 patent/DE3138804A1/en not_active Ceased
- 1981-10-02 GB GB8129790A patent/GB2085227B/en not_active Expired
- 1981-10-06 JP JP15826581A patent/JPS5791576A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0180479A2 (en) * | 1984-11-02 | 1986-05-07 | Xerox Corporation | Light-emitting diode array |
EP0180479A3 (en) * | 1984-11-02 | 1987-11-19 | Xerox Corporation | Light-emitting diode array |
EP0182430A1 (en) * | 1984-11-23 | 1986-05-28 | Rtc-Compelec | Light-emitting diodes array and method for its production |
FR2573897A1 (en) * | 1984-11-23 | 1986-05-30 | Radiotechnique Compelec | ELECTROLUMINESCENT DIODE DIAMOND AND METHOD FOR MANUFACTURING THE SAME |
Also Published As
Publication number | Publication date |
---|---|
GB2085227B (en) | 1984-06-06 |
JPS5791576A (en) | 1982-06-07 |
DE3138804A1 (en) | 1982-06-03 |
FR2491714B1 (en) | 1984-04-13 |
FR2491714A1 (en) | 1982-04-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19921002 |