GB2056143A - Signal processing - Google Patents
Signal processing Download PDFInfo
- Publication number
- GB2056143A GB2056143A GB8025907A GB8025907A GB2056143A GB 2056143 A GB2056143 A GB 2056143A GB 8025907 A GB8025907 A GB 8025907A GB 8025907 A GB8025907 A GB 8025907A GB 2056143 A GB2056143 A GB 2056143A
- Authority
- GB
- United Kingdom
- Prior art keywords
- signal processing
- register
- law
- scientific notation
- processing arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/14—Conversion to or from non-weighted codes
- H03M7/24—Conversion to or from floating-point codes
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Abstract
In a telephone system in which data or analogue signal values are transmitted in the CCITT A-law format, individual bytes are converted to a floating-point scientific notation format for signal processing. Each byte is entered serially into a first shift register, from which the individual bits are transferred in parallel by way of logic circuits to enter a second register in the scientific notation format. <IMAGE>
Description
SPECIFICATION
Signal Processing Arrangements
The present invention relates to signal processing arrangements.
In telephony speech signals are increasingly being digitally coded for processing and transmission usually in accordance with a compression coding law.
One of the standard coding formats is the
CCITTA-law format, for which cheap monolithic speech codecs are now becoming available. In this format the value of the first bit denotes the polarity of the analogue speech signal, the next three bits denote in which of eight contiguous analogue value ranges or segments the analogue signal fell, while the last four bits denote in which of sixteen equal voltage intervals in the appropriate segment the analogue signal fell. The lowest two segments are of equal width, each of sixteen voltage increments, while the remaining six segments are each a factor of two wider than the next lower segment. Digitally-coded signals of this format are referred to herein a A-law coded signals.
Speech signal processing involves the four standard algebraic functions, and it is necessary to consider the operation of these functions on coded speech signals, and in particular on A-law coded signals, as part of the design of a speech processing system. The most direct method would be to convert the 8-bit A-law signals to straight binary-coded signals, and then to process the binary coded signals, but this would involve expansion to a 1 2-bit format to avoid inaccuracies in conversion, increasing the storage requirements and the size of the multipliers needed for processing the signals.
According to one aspect of the present invention in a signal processing arrangement digital compression law coded signals are converted for processing to scientific notation format with a base of two.
According to another aspect of the invention in a telephone system in which speech signals are digitally encoded for transmission as A-law coded signals, as hereinbefore defined, a signal processing arrangement comprises means for converting A-law coded signals to scientific notation format with a base of two.
A signal processing arrangement in accordance with the present invention will now be described with reference to the accompanying drawings, of which: Figure 1 shows the processing arrangement schematically,
Figure 2 shows a truth table for part of the arrangement shown in Figure 1, and
Figure 3 shows schematically an autocorrelator utilising the arrangement shown in
Figure 1.
Referring first to Figure 1 the arrangement comprises an eight-bit register 1 into which the eight bits of an A-law coded analogue value signals are entered serially and from which the respective bits are transferred in parallel to a register 2 to effect conversion to scientific
notation. The polarity bit P is transferred directly, while the three segment code bits are transferred by way of a logic circuit 3 to the next three stages of the register 2 as the exponent E of the scientific notation form. The circuit 3 has the effect of
subtracting one from the segment number of all but the lowest segment, as shown by the truth table forming Figure 2, in which the column S shows the segment numbers in binary coded form while the column E shown the corresponding exponent values, also in binary coded form.
By means of an "OR" gate 4 a binary "one" is entered in the fifth stage of the register 2 for any segment number other than the lowest.
The four bits of the linear part of the A-law signal are transferred directly to the sixth to ninth stages of the register 2, and a binary "one" is entered in the tenth stage. This binary "one" in the position of the least significant bit of the mantissa
K, has the effect of representing the original analogue speech signal value, when expressed in the scientific notation format, by the mid-point value of the respective A-law code interval.
It may be verified from the CCITT Orange Book 1977 that the analogue speech signal value represented by an A-law code group or byte, on decoding, may be expressed as: y = + (2L + 1) ifS = C
=+25-'(32 +2L+ 1)ifSI where S = the decimal segment number
L = the decimal value associated with
the linear part of the A-law coded
signal.
Rewriting the above expression in the form y = + 2E.K, that is in standard scientific notation, it can be seen that only a simple translation between S and E, and between L and K, is
involved. This translation, carried out by the
arrangement shown in Figure 1, requires that
E = S and K = 2L + 1 for segment zero and that for all other segments E = S - 1 and
K = 32 + 2L + 1.
Signals in scientific notation format can for
example be entered in a register, with the six bits
defining the mantissa K shifted E places towards the most significant bit from a reference point, so that the contents of the register represent the value of the original signal in straight binary coded form. However, since for multiplication in scientific notation only the mantissa values have to be
multiplied together the multiplier only needs to be
a six-bit device.
Referring now to Figure 3, an autocorrelator arrangement comprises two of the converter
arrangements shown in Figure 1, only the
registers 2 of which are shown. Mantissa values
K, and K2 from the two registers 2 are multiplied in a six-bit multiplier 5 the output of which is passed to a shift register 6. The corresponding exponent values E, and E2 from the registers 2 are added in a circuit 7 and the sum signal is applied by way of a shift control circuit 8 to move the product signal value from the multiplier 5 the appropriate number of stages along the register 6.
Once this has been carried out the contents of the register 6 are transferred in parallel to an accumulator 9. Correlation coefficients may then be formed in the accumulator 9 as the sum of the products of a succession of pairs of signal values.
Claims (5)
1. A signal processing arrangement wherein compression-law coded signals are converted for processing to scientific notation format with a base of two.
2. A telephone system in which speech signals are digitally encoded for transmission as A-law coded signals, as hereinbefore defined, wherein a signal processing arrangement comprises means for converting A-law coded signals to scientific notation format with a base of two.
3. A signal processing arrangement in accordance with Claim 1 wherein there are provided a first register for holding compressionlaw coded signal values, a second register for holding signal values in said scientific notation format, and logic cTrcuit means interconnecting said first and second registers.
4. A signal processing arrangement substantially as hereinbefore described with reference to Figures 1 and 2 of the accompanying drawings.
5. A signal processing arrangement substantially as hereinbefore described with reference to Figure 3 of the accompanying drawings.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8025907A GB2056143A (en) | 1979-08-10 | 1980-08-08 | Signal processing |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB7927997 | 1979-08-10 | ||
GB8025907A GB2056143A (en) | 1979-08-10 | 1980-08-08 | Signal processing |
Publications (1)
Publication Number | Publication Date |
---|---|
GB2056143A true GB2056143A (en) | 1981-03-11 |
Family
ID=26272520
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8025907A Withdrawn GB2056143A (en) | 1979-08-10 | 1980-08-08 | Signal processing |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2056143A (en) |
-
1980
- 1980-08-08 GB GB8025907A patent/GB2056143A/en not_active Withdrawn
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |