GB2052905B - Memory device - Google Patents

Memory device

Info

Publication number
GB2052905B
GB2052905B GB8015459A GB8015459A GB2052905B GB 2052905 B GB2052905 B GB 2052905B GB 8015459 A GB8015459 A GB 8015459A GB 8015459 A GB8015459 A GB 8015459A GB 2052905 B GB2052905 B GB 2052905B
Authority
GB
United Kingdom
Prior art keywords
memory device
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB8015459A
Other versions
GB2052905A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Publication of GB2052905A publication Critical patent/GB2052905A/en
Application granted granted Critical
Publication of GB2052905B publication Critical patent/GB2052905B/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
    • H01L27/0233—Integrated injection logic structures [I2L]
    • H01L27/0244—I2L structures integrated in combination with analog structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
GB8015459A 1979-05-10 1980-05-09 Memory device Expired GB2052905B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US3777079A 1979-05-10 1979-05-10

Publications (2)

Publication Number Publication Date
GB2052905A GB2052905A (en) 1981-01-28
GB2052905B true GB2052905B (en) 1983-11-09

Family

ID=21896235

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8015459A Expired GB2052905B (en) 1979-05-10 1980-05-09 Memory device

Country Status (4)

Country Link
JP (1) JPS5694A (en)
DE (1) DE3017636A1 (en)
FR (1) FR2456369A1 (en)
GB (1) GB2052905B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4764800A (en) * 1986-05-07 1988-08-16 Advanced Micro Devices, Inc. Seal structure for an integrated circuit
KR0149259B1 (en) * 1995-06-30 1998-10-15 김광호 Fuse signature device for semiconductor memory

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE755039A (en) * 1969-09-15 1971-02-01 Ibm PERMANENT SEMI-CONDUCTOR MEMORY
US3810127A (en) * 1970-06-23 1974-05-07 Intel Corp Programmable circuit {13 {11 the method of programming thereof and the devices so programmed
US3848238A (en) * 1970-07-13 1974-11-12 Intersil Inc Double junction read only memory
FR2334170A1 (en) * 1975-12-05 1977-07-01 Honeywell Bull Soc Ind DEAD MEMORY BUILT-IN
US4152627A (en) * 1977-06-10 1979-05-01 Monolithic Memories Inc. Low power write-once, read-only memory array

Also Published As

Publication number Publication date
FR2456369A1 (en) 1980-12-05
DE3017636A1 (en) 1980-11-20
GB2052905A (en) 1981-01-28
JPS5694A (en) 1981-01-06

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee