GB201110834D0 - Transistor and its method of manufacture - Google Patents

Transistor and its method of manufacture

Info

Publication number
GB201110834D0
GB201110834D0 GB201110834A GB201110834A GB201110834D0 GB 201110834 D0 GB201110834 D0 GB 201110834D0 GB 201110834 A GB201110834 A GB 201110834A GB 201110834 A GB201110834 A GB 201110834A GB 201110834 D0 GB201110834 D0 GB 201110834D0
Authority
GB
United Kingdom
Prior art keywords
layer
electrically conductive
semiconductive
over
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB201110834A
Other versions
GB2492532A (en
GB2492532B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pragmatic Semiconductor Ltd
Original Assignee
Pragmatic Printing Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pragmatic Printing Ltd filed Critical Pragmatic Printing Ltd
Priority to GB1110834.7A priority Critical patent/GB2492532B/en
Publication of GB201110834D0 publication Critical patent/GB201110834D0/en
Priority to GB1505215.2A priority patent/GB2522565B/en
Priority to GB1207599.0A priority patent/GB2492442B/en
Priority to PCT/GB2012/051465 priority patent/WO2013001282A2/en
Priority to US14/129,630 priority patent/US9425193B2/en
Priority to EP12730616.5A priority patent/EP2724373B8/en
Publication of GB2492532A publication Critical patent/GB2492532A/en
Application granted granted Critical
Publication of GB2492532B publication Critical patent/GB2492532B/en
Priority to US15/236,057 priority patent/US10672765B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1292—Multistep manufacturing methods using liquid deposition, e.g. printing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Thin Film Transistor (AREA)

Abstract

A method of manufacturing a transistor comprising: providing a substrate 1, a layer of semiconductive material 5 supported by the substrate 1, and a layer of electrically conductive material 2 supported by the layer of semiconductive material 5; forming at least one layer of resist material 3 over said layers; forming a depression 4 in a surface of the covering of resist material 3, said depression 4 extending over a first portion 21 of said conductive layer 2, said first portion 21 separating a second portion 22 of the conductive layer 2 from a third portion 23; removing resist material located under said depression 4 so as to form a window 9 exposing said first portion 21 of the electrically conductive layer 2; removing said first portion 21 to expose a connecting portion 51 of the semiconductive layer 5, said connecting portion 51 connecting the second portion 22 to the third portion 33 of the conductive layer 2; depositing dielectric material at least inside the window 9 to form a layer of dielectric material 61,62 over the exposed portion 51 of the semiconductive layer 5; and depositing electrically conductive material to form a layer of electrically conductive material 71,72 over said layer of dielectric material 61,62; the layer of dielectric material 61 electrically isolating the layer of electrically conductive material 71 from the second 22 and third 23 portions of the conductive region; removing resist material at least from around said window 9 so as to expose the second 22 and third 23 portions, such that the second 22 and third 23 portions act as source and drain electrodes and the conductive material 71 acts as a gate electrode. Also disclosed is the transistor formed from this method.
GB1110834.7A 2011-06-27 2011-06-27 Transistor and its method of manufacture Active GB2492532B (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
GB1110834.7A GB2492532B (en) 2011-06-27 2011-06-27 Transistor and its method of manufacture
GB1505215.2A GB2522565B (en) 2011-06-27 2012-05-01 Transistor and its method of manufacture
GB1207599.0A GB2492442B (en) 2011-06-27 2012-05-01 Transistor and its method of manufacture
PCT/GB2012/051465 WO2013001282A2 (en) 2011-06-27 2012-06-22 Transistor and its method of manufacture
US14/129,630 US9425193B2 (en) 2011-06-27 2012-06-22 Methods of manufacturing transistors including forming a depression in a surface of a covering of resist material
EP12730616.5A EP2724373B8 (en) 2011-06-27 2012-06-22 Transistor and its method of manufacture
US15/236,057 US10672765B2 (en) 2011-06-27 2016-08-12 Methods of manufacturing transistors including forming a depression in a surface of a covering of resist material

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1110834.7A GB2492532B (en) 2011-06-27 2011-06-27 Transistor and its method of manufacture

Publications (3)

Publication Number Publication Date
GB201110834D0 true GB201110834D0 (en) 2011-08-10
GB2492532A GB2492532A (en) 2013-01-09
GB2492532B GB2492532B (en) 2015-06-03

Family

ID=44485183

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1110834.7A Active GB2492532B (en) 2011-06-27 2011-06-27 Transistor and its method of manufacture

Country Status (1)

Country Link
GB (1) GB2492532B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9996173B2 (en) 2013-02-12 2018-06-12 Illinois Tool Works, Inc. Front panel overlay incorporating a logic circuit

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60167372A (en) * 1984-02-09 1985-08-30 Seiko Epson Corp Manufacture of thin-film transistor
BE1008384A3 (en) * 1994-05-24 1996-04-02 Koninkl Philips Electronics Nv METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES WITH SEMICONDUCTOR ELEMENTS MADE IN A LAYER SEMICONDUCTOR MATERIAL APPLIED ON A BEARING PLATE.
WO1996036072A2 (en) * 1995-05-10 1996-11-14 Philips Electronics N.V. Method of manufacturing a device, by which method a substrate with semiconductor element and conductor tracks is glued to a support body with metallization
KR100497095B1 (en) * 2002-12-26 2005-06-28 엘지.필립스 엘시디 주식회사 Array substrate for dual panel type electroluminescent device and method for fabricating the same
JP2004247716A (en) * 2003-01-23 2004-09-02 Mitsubishi Chemicals Corp Method for manufacturing laminated body
GB2421115A (en) * 2004-12-09 2006-06-14 Seiko Epson Corp A self-aligning patterning method for use in the manufacture of a plurality of thin film transistors
JP5423396B2 (en) * 2007-12-20 2014-02-19 コニカミノルタ株式会社 Electronic device and method for manufacturing electronic device
GB2479150B (en) * 2010-03-30 2013-05-15 Pragmatic Printing Ltd Transistor and its method of manufacture

Also Published As

Publication number Publication date
GB2492532A (en) 2013-01-09
GB2492532B (en) 2015-06-03

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