GB1587003A - Electronic display device - Google Patents

Electronic display device Download PDF

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Publication number
GB1587003A
GB1587003A GB12541/78A GB1254178A GB1587003A GB 1587003 A GB1587003 A GB 1587003A GB 12541/78 A GB12541/78 A GB 12541/78A GB 1254178 A GB1254178 A GB 1254178A GB 1587003 A GB1587003 A GB 1587003A
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United Kingdom
Prior art keywords
display
display device
signal
month
members
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GB12541/78A
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Casio Computer Co Ltd
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Casio Computer Co Ltd
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Publication date
Priority claimed from JP3568877A external-priority patent/JPS53120558A/en
Priority claimed from JP3569177A external-priority patent/JPS6045387B2/en
Priority claimed from JP3568977A external-priority patent/JPS53120559A/en
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Publication of GB1587003A publication Critical patent/GB1587003A/en
Expired legal-status Critical Current

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Classifications

    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G9/00Visual time or date indication means
    • G04G9/0082Visual time or date indication means by building-up characters using a combination of indicating elements and by selecting desired characters out of a number of characters or by selecting indicating elements the positions of which represents the time, i.e. combinations of G04G9/02 and G04G9/08
    • G04G9/0094Visual time or date indication means by building-up characters using a combination of indicating elements and by selecting desired characters out of a number of characters or by selecting indicating elements the positions of which represents the time, i.e. combinations of G04G9/02 and G04G9/08 using light valves, e.g. liquid crystals
    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G9/00Visual time or date indication means
    • G04G9/08Visual time or date indication means by building-up characters using a combination of indicating elements, e.g. by using multiplexing techniques
    • G04G9/12Visual time or date indication means by building-up characters using a combination of indicating elements, e.g. by using multiplexing techniques using light valves, e.g. liquid crystals
    • G04G9/124Visual time or date indication means by building-up characters using a combination of indicating elements, e.g. by using multiplexing techniques using light valves, e.g. liquid crystals provided with date indication

Abstract

An electronic display device for a clock has the numerals (11a, 11b) from 1 to 31 for displaying the days of the month, which are arranged in rows and columns, and a multiplicity of segments (12a to 15b) for displaying hours, minutes and seconds. In this arrangement, at least some of the numerals from 1 to 31 are arranged in the interspaces determined by the segments for the time display, in order to save space and thus to reduce the display part for the clock. <IMAGE>

Description

(54) ELECTRONIC DISPLAY DEVICE (71) We, CASIO COMPUTER COM PANY, LIMITED, a Japanese corporation, of 6-1, 2-chome, Nishishinjuku, Shinjukuku, Tokyo, Japan, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following state ment: - The invention relates to an electronic display device in which numerals for date display are at least partly disposed in the spaces defined by segments forming numerals, e.g. for time display.
Digital timepieces for digitally displaying time by using a liquid crystal display (LCD), light emitting diode display (LED) or the like are nowadays much used in place of conventional mechanical drive timepieces.
The digital timepiece is constructed by using a quartz crystal oscillator, an electronic time counting circuit and the like. Accordingly, the counting accuracy is high and date data such as days, weeks and months may readily be counted in addition to time data such as hours, minutes, and seconds. This enables such a timepiece to digitally display the days, weeks and months. For example, in the case of wristwatches, the date data is frequently displayed by appropriate switching of the means used for time data display, since the available display space is restricted. Business practice often demands the display of dates covering an extended time range, in order to make a schedule or confirm a specified past date. In the abovementioned calendar system, the year and month determine the corresponding day and its day of the week.A calendar display system is possible in which numerals 1 to 31 for the days of one month are arranged in a matrix like fashion, in rows and columns.
The columns are arranged corresponding to the days of a week so that one specified column represents Sundays. If the calendar system is embodied by using electronic technology, any desired date can be instantly seen.
However, if the date data must additionally be displayed on the same display space as that used for the time data, the display space must be expanded. This is unfavorable for a device with a limited display space such as a wristwatch.
For this purpose it is known to provide a metal plate on which the date data is printed and to attach this plate to a wristwatch band. This method, however, is defective in that the attaching work of the metal plate is troublesome and the metal plate attached is a nuisance and is unattractive. Further, if the metal plate is unobtainable, users are much inconvenienced.
In the field of electronic desk top type calculators, thin and small-sized calculators have appeared recently and have been sold in the market. Such calculators often provide an ordinary calculating function and also time counting functions such as timekeeping and date counting functions, and also stopwatch, alarm and timer functions, as well. As a matter of course, if such a calculator includes an automatic calendar function, it is very convenient for users.
Any way, it is very difficult to display the calendar data in the same space as that used for time data display, in the electronic devices needing a digital display of calendar data, time data and calculating data, but having a restricted display space.
Accordingly, an object of the invention is to provide an electronic display device in which the calendar data as well as other numerical data are effectively displayed in a common display space.
According to the present invention there is provided an electronic display device comprising a digital display portion in which a plurality of segmental display members are arranged, each segmental display mem ber being capable of digitally displaying numerals by appropriate energisation of its segments, and a calendar display portion in which display members for display of the numerals 1 - 31 representative of the dates of one month are arranged in plural rows and columns, at least some of said numeral display members being disposed in the spaces defined by segments of the said digital display portion.
With such an arrangement, the calendar data as well as characters or numerals may be displayed in a common display space without enlarging the display device per se.
The displays may readily be combined without complicating the wiring of the display device, so that the calendar data may be displayed as the situation demands.
Accordingly, the arrangement is very convenient in practical use. Further, there is eliminated the need of an unattractive and annoying metal plate which is needed in the conventional wristwatch.
Preferred features and advantages of the invention will be apparent from the following description taken in connection with the accompanying drawings, in which: Figure I shows a plan view of a display surface of an embodiment of an electronic device according to the invention; Figure 2 shows one form of display provided by the display device shown in Figure 1; Figure 3 shows another form of display provided by the same device.
Figures 4(A) and 4(B) show forms of the display whereby the date data is displayed on the display device of Figure 1; Figure 5 shows a control circuit for controlling the drive of the character electrodes in the display device which is an embodiment of the invention; Figure 6 shows a block diagram of a time-keeping circuit for providing a time and calendar display by means of the display device shown in Figure 1; Figure 7 shows a block and schematic circuit diagram of a month control circuit of the time-keeping circuit shown in Figure 6; Figure 8 shows a block and schematic circuit diagram of a switching control unit in the time-keeping circuit shown in Figure 6;; Figures 9(A) and 9(B) illustrate connections to the display elements of the display device and also the circuit diagram of a control circuit of a calendar display according to an embodiment of the invention Figure 10 is one form of the displays given by the calendar display device shown in Figures 9(A) and 9(B); Figure 11 shows a display device which is another embodiment of the invention; Figure 12(A) and 12(B) illustrate the arrangement and connections of first and second electrodes in the display device of Figure 11; Figures 13(A) and 13(B) tabulate drive signals supplied to the electrodes in the respective digits shown in Figures 12(A) and Figure 14 shows a block diagram of a circuit construction when the display device of the invention is applied to a calculator;; Figures 15(A) and 15(Bj illustrate wiring of major blocks for illustrating the operation of the Figure 19 circuit; Figure 16 schematically shows the contents of the register included in RAM in Figure 14; Figure 17 shows flow charts useful in explaining the operation of the circuit in Figure 14; Figure 18 shows a wiring diagram of the major part of Figures 15(A) and 15(B) for explaining the operation of the circuit of Figures 15(A) and 15(B); Figure 19 shows the display surface of the arrangement shown in Figure 14 when the calendar data are displayed on the display surface; Figure 20 illustrates an arrangement of display segments and character electrodes on the display surface of a display device which is another embodiment of the invention; and Figure 21 illustrates an arrangement of display segments and character electrodes on the display surface of a display device which is still another embodiment of the invention.
An embodiment of the invention to be described is applied to an electronic wristwatch. Referring now to Figure 1, there is shown the surface of a display device 34 according to the invention. A data display portion 11 has numerals for one month date representation 1 to 31 which are arranged in matrix like fashion with rows having seven days corresponding to the days of the week, Sunday to Monday, and with columns. The numerals are denoted as gila, 11b ... and are each constructed by a character electrode.
Four time display digits 12 to 15 for displaying hours and minutes and display members 16 for displaying a colon to mark the hour section off from the minute section are disposed within the data display portion 11.
The time display digits 12 to 15 are each constructed of a plurality of segment electrodes 12a, 12b, 13a, 13b ., 14a, 14b 15a, 15b .. . As is known, a numeral is formed by properly combining the segments. Each segment is disposed in a space not occupied by any of the character electrodes gila, lib Above the data display portion 11, there are disposed arrow shaped indicators 17a to 17g for specifying any one of the days of the week, an auxiliary time display portion 18 including second indicators "0" "10" "50" designated by 18a to 18f for indicating seconds and an indicator 18g denoted as "A/P" for indicating morning or afternoon, and an indicator 19 for indicating the days of the week, Sunday to Saturday, individually designated by 19a to 19g.When one of the arrow shaped indicators 17a to 17g is energized, the display portions 18 and 19 are automatically energized, to show seconds, morning or afternoon, and the day of the week.
The respective character electrodes of the data display portion 11, the time display digits 12 to 15, the auxiliary time display portion 18 and the indicator 19 are all constructed of liquid crystal display elements, for example. More specifically, a liquid crystal layer is sandwiched by a pair of transparent substrates made of glass. On the inner surface of the upper transparent substrate, there are formed transparent electrodes forming numeral electrodes 11a, 11b ..., segment electrodes 12a to 15b, colon display members 16, arrow shaped indicators 17a to 17g, the respective indicators 18a to 18g of the auxiliary time display portion 18, and the respective characters 19a to 19g of the indicator 19. On the other hand, a common transparent electrode is formed on the inner surface of the lower transparent substrate.Molecules of liquid crystal sandwiched between the two substrates are twisted through 90O therebetween in a spiral fashion. When an electric field is applied to a selected electrode, the spiral structure of the liquid crystal molecules in that area diminishes and so loses its optical rotary power, and light passing through the display is obstructed by a polarizing plate (not shown), with the result that characters of numerals corresponding to the selected electrodes are displayed in known manner.
In a normal time display mode, the display operation of the numeral electrodes 11a, lib ... and the indicator 19 is shut off.
The time display digits 12 to 15, the indicator 17a to 17g, and the auxiliary display portion 18 are activated to display the current time "10:58 and 20 seconds a.m.", for example, as shown in Figure 2.
As shown in Figure 3, if the indicator 19 for indicating the days of the week is used in place of the auxiliary time display portion 18 and the time display digits 12 to 15 are used for indicating "month" and "day", the current date is displayed, for example, "February 8th, Thursday" being displayed as shown in Figure 3. A knob, for example, may be used to switch from the date display to the time display and vice versa.
As shown in Figure 4(A), if only the electrodes of the display portion 11 and the indicators 17a to 17g are actuated, a calendar is displayed in place of the specified time or date, and the column corresponding to a specified day of the week, for example, Sunday, is indicated by using the indicators 17a to 17g. In this case, the month corres ponding to the calendar, for example, 2 (February) may be displayed as shown in Figure 4(B) by using the time display digits 12 and 13.
In the calendar display, the month may be a "28 days month", "29 days month" (in a leap year), "30 days month" or "31 days month". Accordingly, it is impracticable that the arrangement "1 to 31" for the date display is constantly applied to every kind of month.
One of the solutions of this is illustrated in Figure 5. As shown, a display drive signal is applied to a common terminal 20a con nected to the numeral electrodes for the dates 1 to 28, and display drive signals are separately applied to terminals 20b to 20d connected to the numeral electrodes lix to 11z for the dates 29 to 31, respectively. The display drive signals applied to the terminals 20a to 20d are fed from a month-end adjusting logic circuit 21. The logic circuit 21 includes AND gates 23a to 23d which are respectively connected at one of their input terminals to a 31 days month terminal, 30 days month terminal, FEB (leap year) terminal, and FEB (common year) terminal of a month detecting circuit 22 forming part of a month control circuit 39 in a clock control unit, which is described later with reference to Figure 7.The other input terminals of these AND gates are commonly connected to an S2 terminal for supplying a calendar display instruction signal. The out puts of the AND gates 23a to 23d are applied to an OR gate 24a. The outputs of the AND gates 23a to 23c are applied to an OR gate 24b. The outputs of the AND gates 23a and 23b are connected to an OR gate 24c. The output of the OR gate 24a is connected to the terminal 20a. The output of the OR gate 24b is connected to the terminal 20b. The output of the OR gate 24c is connected to the terminal 20c. The output of the AND gate 23a is connected to the terminal 20d.
With such a circuit arrangement, when an output signal is applied from the "31 days month" terminal of the month control cir cuit 39, the calendar display instruction applied enables the AND gate 23a to produce an output signal which in turn is applied directly to the terminal 20d and via the OR gates 24a to 24c to the terminals 20a to 20c. In this manner, the display drive signal is applied to all the dates 1 to 31.
When an output signal is applied from the "FEB (common year)" output of the month control circuit 39, the calendar display instruction applied at this time enables the AND gates 23 to produce the display drive which in turn goes via the OR gate 24a to the terminal 20a of the display device 34.
Accordingly, the display drive signal is applied only to the dates 1 to 28. In a similar manner, the display up to 29 or 30 days is performed through the month-end adjusting logic circuit 21. The construction of the month control circuit 39 will be described in detail later.
Referring now to Figure 6, there is shown a clock control unit of a clock with a display device as mentioned above. A reference oscillator 25 produces a clock signal to be applied to a frequency divider 26 where it is frequency-divided to produce a time counting clock signal. The time counting clock signal has one pulse every ten seconds (1P/10 seconds). The time counting clock signal is then applied to a scale-of-6 counter 27 for "seconds" counting. The counter 27 produces a "second" signal expressed in ten seconds and produces a carry signal every minute. The carry signal drives a scale-of-60 counter 28 for "minutes" counting. The counter 28 produces a "minute" counting signal expressed in minutes and produces a carry signal every 60 minutes, i.e. one hour.
The carry signal drives a scale-of-12 counter 29 for "hours" counting which produces a "hour" counting signal. The "second", "minute" and "hour" counting signals from the counters 27 to 29 are all applied to a switching control unit 30. In the absence of a switching instruction from a switch unit 31, the time counting signal is applied to a decoder 32 and a driver 33. The output of the driver 33 activates a display device 34 with a display surface as mentioned above, so that the time display as shown in Figure 2 is carried out.
A carry signal produced from the counter 29 every 12 hours is applied to a binary counter 35 which in turn produces a "day" signal and an A/P signal representing morning or afternoon depending on the contents of the counter 35. The A/P signal is then applied to the switching control unit 30. The A/P signal actuates the indicator 18g when the time display is performed to indicate whether it is morning or afternoon.
A carry signal from the binary counter 35 is used as a "day" counting signal and is counted by a scale-of-31 counter 36. The carry signal is also counted by a scale-of-7 counter 37. The counter 37 produces a signal representing any one of the days of the week. The output signal of the counter 37 will be referred to as a "week" counting signal, for ease of explanation.
A scale-of-12 counter 38 for "month" counting is provided, which is of similar construction to the "day" counter 36. The count of the counter 38 is used as a "month" display signal and under control of the month control circuit 39. Depending on the count of the "month" counter 38, the month control circuit 39 decides whether the month is a "31 days month", "30 days month" "28 days month" or "29 days month" and compares this number of days with the date counted by the "day" counting circuit 36 to issue a reset instruction to the "day" counter 36, and a step instruction to the "month" counter 38. In this way, the month-end controlled counting is performed for the "month" and "day".
The count data of the "day" counter 36, "week" counter 37 and "month counter 38 are guided to the switch control unit 30.
Then, when a date display instruction is produced from the switch unit 31, the date data including "month", "week" and "day" are selectively applied to the decoder 32 which in turn drives the display device 34 through the driver 33 to display the date as shown in Figure 3.
The month control circuit 39 includes the month detecting circuit 22 described below in relation to Figure 7, which provides display control instructions to the numeral electrodes 11X, 11Y and 11Z representing the month-end dates 29, 30 and 31 for the purpose of the month-end adjustment, and provides an instruction to the switch control unit and at the same time controls the count of a referential day of the week counter 40.
The counter 40 stores a number corresponding to the column of the date numerals corresponding to a specified day of the week, for example, Sunday, in a calendar display mode. In response to the signal outputted from the month control circuit 39 when the month changes, the counter 40 corrects its contents to produce a selective signal for selecting a proper one of the indicators 17a to 17g which signal in turn is applied to the switch control unit 30. When the switch unit 31 issues a calendar display instruction, the switching control unit 30 provides a display instruction for the display portion 11 to the decoder 32 and couples the signals from the month control circuit 39 and the referential day of the week counter 40 with the decoder 32. As a result, the calendar is displayed as shown in Figure 4(A). In this case, when the data from the "month" counter 38 is also used, the display as shown in Figure 4(B) is obtained.
Figure 7 shows the month control circuit 39 and its related circuits. A month detecting circuit 22 is connected to the "month" counter 38. The circuit 22 detects the count of the "month" counter 38 and decides whether the month is a "30 days month", "31 days month", "28 days month" or "29 days month". The outputs of the detecting circuit 22 are applied to AND gates 39a, 39b and 39c and also to the logical circuit 21 shown in Figure 5 for the month-end adjustment. The "day" counter 36 produces at the respective output terminals for the dates "28", "29", "30" and "31" output signals when it steps from these counting states.
These output signals representing these dates except the date 31 are applied to one input terminal of AND gates 39d, 39e and 39f, respectively. The outputs of these AND gates are applied to an OR gate 39g, together with the output terminal for day "31" of the counter 36. The output of the OR gate 39g is applied as a gate signal to the AND gates 39a to 39c, as a reset signal to the "day" counter 36, and as a step signal to the "month" counter 38. The outputs of the AND gates 39a to 39c are applied as counting correction instructions "+4", "+5" and "+6" to the referential day of the week counter 40.
The "30 days month" terminal of the month detecting circuit 22 is connected to the other input terminal of the AND gate 39f. The "FEB" terminal of the detecting circuit 22 is applied to other input terminals of the AND gates 39e and 39d.
In the calendar display, the leap year control on February must be made every four years. A leap year instruction signal for this control is formed by counting four carry signals each of which is outputted from, for example, the "month" counter 38 every year. The leap year instruction signal thus formed is applied via an inverter 39h to an additional input terminal of the AND gate 39d, and directly to additional input terminals of the AND gates 39c and 39e and one input terminal of an AND gate 39i. The "FEB" terminal of the detecting circuit 22 is connected to the other input terminal of the AND gate 39i. The output signal of the AND gate 39i is applied as a signal for designating February in the leap year to the month-end adjusting circuit 21 for adjusting the month-end.
Assume now that this month is October.
The "month" detecting circuit 22 provides a gate signal to the AND gate 39a. Under this condition, the "day" counter 36 counts 31 days and then produces an output signal representing 31 when the next step instruction is applied. The output signal is applied through the OR gate 39g to the AND gate 39a so that the AND gate 39a is enabled to produce the "+4" signal to be directed to the referential day of the week counter 40.
The output signal passing through the OR gate 39g is applied as a reset signal to the counter 36 so that the content of the day counter 36 is "1". The same output signal is also applied as a step signal to the "month" counter 38 to set its contents at "November". Accordingly, the indicators 17a to 17g are shifted by four to indicate the column of date numerals for corresponding to Sunday, for example, in the calendar November.
In this manner, when the "month" counting circuit 38 is set to "November", the month detecting circuit 22 produces the "30 days month" output signal which is applied as a gate signal to the AND gates 39b and 39f. Under this condition, the counting operation of the "day" counting circuit 36 progresses to produce an output signal at the "30" output. Upon receipt of the output signal, the AND gate 39f is enabled to produce an output signal which in turn goes through the OR gate 39g to the "day" counter 36, and to the "month" counter 38.
Upon receipt of the signal, the counter 36 is reset and the counter 38 is stepped, with the result that their counter states indicate "December 1". At the same time, the AND gate 39b produces an output signal of "+5" which is applied to the referential day of the week counter 40. As a result, the Sunday column for December is indicated by the appropriate indicator 17.
Assume now that the month is February.
In a common year, the last day of February is the 28th. The Sunday column in the February calendar is then the same as that in the March calendar. In a common year, the output of the inverter 39h is at "1" level.
Accordingly, when the "day" counter 36 produces the "28" output, the AND gate 39d is enabled to produce an output signal which in turn goes through the OR gate 39g to the counter 36 and the counter 38.
Accordingly, the counter 36 is reset and the counter 38 counts March so that the counter state is "March 1". At this time, the contents of the counter 40 are not changed.
In the case of February in a leap year, the leap year instruction is present. Accordingly, when the "day" counter 36 produces the "29" output, the AND circuit 39e is enabled so that the date counting is changed from "February 29" to "March 1". At the same time, the AND gate 39c has received the "FEB" signal and the leap year signal.
Therefore, when the output of the AND gate 39e is applied through the OR gate 39g to the AND gate 39c, the AND gate 39c is enabled to provide the "+6" signal to the counter 40. The result is the indication of the Sunday column in March of the leap year by the indicator 17.
Figure 8 shows the details of the switching control unit 30 and its associated circuit shown in Figure 6. In Figure 8, AND gates 30a to 30c receive at their first input terminals "10 seconds", "minute" and "hour" time counting signals from the counters 27, 28 and 29, respectively. AND gates 30d to 30f receive at their first input terminals "month", "week" and "day" signals from the counters 36 to 38, respectively. AND gate 30g is coupled at the first input terminal with the "A/P" signal from the counter 35. AND gate 30h is coupled at its first input terminal with the counting signal from the referential day of the week counter 40. A logic circuit 21 is coupled at one input terminal with the month-end adjusting signal from the month control circuit 39, by means as shown in Figure 5.
The switch unit 31 comprises switches S1 and S2 which can be actuated to provide a logical "1" signal. When actuated, logical "1" signals appear on lines L1 and L2, while, when-not actuated, such signals appear on lines L3 and L4 via inverters 30j and 30k.
The line L1 connected to the switch S1 is connected to the AND gates 30d to 30f. The line connected to the switch S2 is connected to the AND gate 30h and the logic circuit 21. The line L3 connected via the inverter 30j to the switch S1 is connected to the second input terminals of the AND gates 30a to 30c, and 30g and the third input terminal of the AND gate 30h. The line L4 connected to the switch S2 via the inverter 30k is connected to the third input terminals of the AND gates 30a to 30g. In a normal state when both switches Sl and S2 are open as shown in the figure, the AND gates 30a to 30c, and 30g are enabled to select the data necessary for the time display such as "10 seconds", "minute", "second" and "A/ P".When only the switch Sl is actuated, the AND gates 30d to 30f are enabled to select the data necessary for date display such as "month", "week" and "day". When only the switch S2 is actuated, the AND gate 30h is enabled and the logic circuit 21 is actuated so that the referential day of the week signal is selected and the month-end adjusting signal for calendar display is outputted from the logic circuit 21 as described referring to Figure 5. The outputs of the AND gates 30a, 30d and 30h are connected to OR gate 30-e; the outputs of the AND gates 30b and 30e, to the OR circuit 30m; the outputs of the AND gates 30c and 30f, to OR gate 30n.
The outputs of OR gates 30t to 30n are connected to decoders 32a to 32c. The decoder 32a is used to select any one of the indicators 17a to 17g for indicating the days of the week. The decoder 32b is used to selectively provide display signals for driving the time display electrodes 14 and 15 which display the minute. The decoder 32c selectively provides display signals for driving the "hour" display electrodes 12 and 13.
The outputs of these decoders are applied via corresponding drivers 33a to 33c to the display device 34.
As described above, auxiliary display portions 18 and 19 are provided for "second" and day of the "week" displays.
These display portions are selectively used when required in accordance with the display mode, as shown in Figures 2 to 4.
Selection of these display portions is carried out by the switching control unit 30 in accordance with the operation of the switch unit 31. More specifically, the outputs of the inverters 30j and 30k are detected by an AND gate 30p producing an output signal in a normal state when neither of both switches S1 and S2 is actuated. The signal is applied to an OR circuit 30q, together with the signal on the line L2. The OR circuit 30q provides a display prohibit signal to the day of the "week" display portion 19, through a display control unit 62. When either of switches S1 and S2 is actuated, the signals on the lines L1 and L2 are detected by an OR circuit 30r. Upon detection of such a signal, the OR circuit 30r provides a display prohibit signal to the time auxiliary display portion 18, via the display control unit 62.
Depending on the signals from the OR circuits 30q and 30r, the display control unit 62 controls the display of the upper and lower auxiliary display portions 19 and 18 in the display device 34.
More precisely, when both switches S1 and S2 are open, the auxiliary display portion 18 is driven as shown in Figure 2.
When only the switch S1 is actuated, the auxiliary display portion 19 is driven, as in Figure 3. When only the switch S2 is actuated, neither of the display portions is driven, as shown in Figures 4(A) and 4(B).
With such a construction, in the normal state, the AND gates 30a, 30b, 30c and 30g are enabled so that the time display is performed as shown in Figure 2 by using the time counting signals "hour", "minutes", "10 seconds" and "A/P". When only the switch Sl is actuated, the date display is made as shown in Figure 3 by using the numeral display segments otherwise used for the time display. When only the switch S2 is actuated, the calendar display is carried out as shown in Figure 4(A) without using the time display electrodes 12 to 15.
When either of switches S1 or S2 is actuated, the respective inverter output signal on line L3 or L4, inhibits those of gates 30a - 30f which are not enabled by the signal on line L1, or L2, respectively. Thus if both switches are actuated all of the gates will be inhibited and no display will appear.
It is to be noted here that the time and date displays by using numerals and the calendar display are performed by using the common display space of the display device 34. As described above, the segment electrodes 12 to 15 are partly disposed in the spaces defined by the numeral electrodes lia, 11b.
Another embodiment of the invention will be given with references to Figures 9(A) and 9(B) in which the data display portion 11 and its display control circuit are illustrated in detail. The numeral electrodes as numeral display means for dates "1" to "31" are constructed by liquid crystal display means, and those except the month end dates "29" to "31" arranged in a matrix of which the rows each include seven numeral electrodes corresponding to the days of the week. The numeral electrodes in the same column are connected in common to a respective one of terminals 41a to 41g.
Display drive signals are applied via the terminals 41a to 41g to those column electrodes. The numeral electrodes for dates "29" to "31" are connected to terminals 42a to 42c, respectively. The outputs of OR circuits 43a to 43g shown in Figure 9(B) are connected to the terminals 41a to 41g and the outputs of OR gates 44a to 44c shown in Figure 9(B), to the terminals 42a to 42c, respectively.
The outputs of AND gates 45a to 45g and 46a to 46g are applied to the OR gates 43a to 43g, respectively. The outputs of AND gates 47a to 47c and 48a to 48c are connected to the OR gates 44a to 44c, respectively. A clock signal of 1Hz is applied to the AND gates 46a to 46g and 48a to 48c. These AND gates and the OR gates cooperate to form the decoder/driver for the date display portion 11. A month-end adjusting control circuit 60 and a referential day of the week counter 61 are coupled with the decoder/ driver. The month-end adjusting control circuit 60 is comprised of AND gates 49a to 49d to which a gate signal is applied when the switch S2 is actuated. The AND gates 49a to 49d receive at other input terminals "FEB (common year)", "FEB (leap year)", "30 days month" and "31 days month" signals. The outputs of the AND gates 49a to 49d are all coupled with an OR gate 50a.
The outputs of the AND gates 49b to 49d are coupled with an OR gate 50b. The outputs of the AND gates 49c and 49d are coupled with an OR gate 50c. In a "31 days month", the AND gate 49d and the OR gates 50a to 50c provide output signals to the decoder/driver. In a "30 days month", the OR gates 50a to 50c provide output signals to the same. In February of a leap year, the OR circuits 50a and 50b provide output signals to the same. In February of a common year, only the OR gate 50a provides an output signal to the same.
The output signal of the OR gate 50a is supplied as a gate signal to the AND gates 45a to 45g. The output signals from the OR gates 50b and 50c and the AND gate 49d are applied as gate signals to the AND gates 47a to 47c and 48a to 48c.
The referential day of the week counter 61 corresponds to that referenced 40 in Figure 7, and is provided with seven output lines providing count signals corresponding to the respective columns of the calendar.
The seven output lines are coupled with the AND gates 46a to 46g, respectively, and the first three output lines are further coupled with the AND gates 48a to 48c, respectively.
The output lines connected to the AND gates 46a to 46g and 48a to 48c are also connected to the AND gates 45a to 45g and 47a to 47g through inverters 51a to 51g and 52a to 52c, respectively.
In the above-mentioned construction, it is unnecessary to use the indicator 17 to indicate the Sunday column of the dates "1" to "31". That is, when the switch S2 is actuated, the date display portion 11 is set up as shown Figure 10. In this case, when the month is a "31 days" month, actuation of the switch S2 causes the AND gate 49d to produce an output signal and at the same time the OR circuits 50a to 50c produce output signals. For this, the AND gates 45a to 45g, 47a to 47c and 48a to 48c are all enabled to permit display drive signals to be applied to the terminals 41a to 41g, and 42a to 42c. The numeral electrodes "1" to "31" in the date display portion 11 are all energized.
In the referential day of the week counter 61, only the output line corresponding to the "Sunday" column in the month is activated to provide logical "1" thereon. Assume now that the logical "1" appears on the second output line from the left, for example. No gate signal is applied to the AND gates 45b and 47b. On the other hand, the AND gates 46b and 48b are enabled. Accordingly, the second column from the left of the calendar is driven by the 1Hz clock so that only the second column is flashed as indicated by a broken line in Figure 10. In this manner, the column corresponding to a particular day of the week, for example, Sunday, is denoted.
In the just mentioned example, the Sundays column is denoted by flashing but it may be arranged that columns other than the Sundays column may be flashed. Further, in the above-mentioned examples, liquid crystal is used as a display means but other suitable means may be used such as LED displays, cataphoretic displays, and thelike.
The explanation to follow is the case where the invention is applied to an electronic calculator with time counting function, that is, to what is called a multifunction electronic calculator. Figure 11 shows one form of the display in this example. Further, in this example, liquid crystal is employed for the display means. In this display designated by 110, a series of numeral or character display members are separately arranged and each of the display members is comprised of segments f to r and Dp. The display members are designated by reference numerals 210 to 280, and capable of displaying a number having up to eight digits.Additionally, numeral electrodes 8a to 8g are disposed in the spaces 330 to 380 each between adjacent numeral display members 220 to 280, and in the space 390 on the left side of the display member 280 of the most significant digit. These spaces will be referred to as digit in-between spaces, for simplicity.
More specifically, the numeral electrodes 8g representing the dates 1, 8, 15, 22 and 29 are vertically arranged in the digit in-between space 390 to form a column. The seven days starting at each of the column dates 1, 8, 15, 22 and 29 are horizontally arranged in the rest of the inter-digit spaces 380, 370 ... 330 to form a row. In the display in Figure 11, above the uppermost row of the numeral electrodes for the dates 1 to 7, are horizontally disposed a series of character display members 500a to 500g each representing Sunday(SUN). As shown, the character display members 500a to 500g are vertically aligned with the corresponding columns of the numeral electrodes.
Referring now to Figures 12(A) and 12(B), there are illustrated the structures and connections of first and second electrodes in the display 110. The drive system of the display in this example is a dynamic drive system of 1/3 duty cycle. Figure 12(A) shows the structure of a transparent electrode plate 600 on which first sets of electrodes are formed, each set being shaped like a numeral 8 and designated by 710 to 780. The first electrode sets, except the electrode set 710, are each comprised of five segmental electrodes 7a to 7e and one dot like electrode 7f for representing a decimal point. The dot electrode 7f corresponds to the segment D in Figure 11 and is connected to the vertical electrode 7a. First electrode drive signals a, to a8 are selectively applied to the dot electrodes 7f of the respective digits.The vertical segmental electrodes 7a and 7b form segments m, n and p, q in Figure 11. The horizontal segmental electrodes 7c to 7e corresponding to the segments , r and o are commonly connected. First electrode drive signals b9 to b8 are selectively applied to the horizontal electrodes of the respective digits. The vertical segmental electrodes 7b forming the segments q and p of each digit receive respective first electrode drive signals c2 to c8. The first electrode 710 has a connection substantially equal to that of other first electrodes 720 to 780. However, one of the vertical electrodes is divided into two parts; one is an electrode 7b, corresponding to the segment q and the other is an electrode 7b2 corresponding to the segment p.The reason why it is divided is to avoid its crossing, within the visible display area, with the wiring of second electrodes which will be described later with reference to Figure 12B. The divided electrodes 7b, and 7b2 are connected together at a place outside the visual region of the display 110 and receive there a first electrode signal c,. The other electrodes 7a, 7c to 7f of the first electrode 710 are the same as those of the other first electrodes 720 to 780 in both structure and connection. The vertical segmental electrode 7a is connected to the dot-like electrode 7f for a decimal point to which a first electrode drive signal a1 is applied. The horizontal segmental electrodes 7c, 7d and 7e are connected together and a first electrode drive signal b1 is applied to them.
As previously stated, numeral electrodes representing the dates "1" to "31" are disposed in the spaces 330 to 390 in a matrix arrangement. Those numeral electrodes are commonly connected and coupled with the partitioned electrode 7bl of the first electrode 710 to which the first electrode drive signal c1 is applied. First electrodes 500a to 500g for representing Sunday, which are disposed above the uppermost numeral electrodes of the respective columns, as stated above, are each connected to the vertical segmental electrode 7b of that one of first electrodes 720 to 780 which is positioned at the right hand of and below the corresponding SUN electrode, as viewed in the drawing. The first electrode drive signals c2 to c8 are respectively applied to the vertical segmental electrodes 7b of the respective digits which are connected to the corresponding first electrodes 500a to 500g.
Figure 12(B) illustrates the structure of the other transparent electrode 700 of the display 110. On the transparent electrode 700 are formed second electrodes 810 to 880 shaped like numeral 8 and disposed correspondingly opposite to the first electrodes 710 to 780, respectively. The second electrodes other than the one 810 are each comprised of three segmental electrodes 110a to 110c and a dot-like electrode 110d for a decimal point.The segmental electrode 110a corresponds to a combination of segments t and m of the display member 210 in Figure 11; the segmental electrode 110b to the a combination of segments n, r and q; the segmental electrode set 110c to segments o and p. the second electrode 810 has segmental electrodes 110c and 110d similar in shape to those of the other second electrode sets and segmental electrodes 110e and 110f different in shape from electrodes 110a and 110b. The segmental electrode 110e corresponds to a combination of segments , m and q and the electrode 110f, to a combination of segments n and r. Second electrodes 120a to 120g for date display are disposed in the spaces between adjacent second electrodes 820 and 830, 830 and 840, . . 870 and 880, and on the left side of the electrode 880.
These spaces correspond to the digit inbetween spaces in Figure 11. The second electrodes 120a to 120g are disposed correspondingly opposite to the numeral electrodes 8a to 8g. Second electrodes 130a to 130g are disposed above the corresponding electrodes 120a to 120g and opposite to the first electrodes 500a to 500g in Figure 12(A). As shown, the segmental electrodes 110a of the second electrodes 820 to 880, the segmental electrode 110e of the second electrode 810, and all the second electrodes 130a to 130g for SUN representation are all connected commonly and led to a terminal 140a on the transparent plate 700. The terminal 140a is connected via a wire (not shown) to a terminal 140b provided on the transparent plate 600. A "second electrode" drive signal X is applied to the terminal 140b and thus to terminal 140a.The segmental electrode 110f of the second electrode 810, the segmental electrodes 110b of the other electrodes 820 to 880, and the date display electrodes 120a to 120g are all connected in common to a terminal 150a on the transparent electrode plate 700. The terminal 150a is connected via a wire (not shown) to a terminal 150b on the other transparent electrode plate 600. A second electrode drive signal Y is applied to the terminal 150b and thus to terminal 150a. The segmental electrodes 110c of the electrodes 810 to 880 and the dot like electrodes 110d corresponding to the segments Dp in Figure 11 are all connected commonly and to a terminal 160a on the plate 700. The terminal 160a is connected via a wire (not shown) to a terminal 160b on the other plate 600.
Another second electrode drive signal Z is applied to the terminal 160b and thus to terminal 160a. The segmental electrode 110b of the second electrode 820 and the segmental electrode 110f of the second electrode 810 are connected at a place outside the visual region of the display as in the connection of the partitioned electrodes 7b1 and 7b2, in order to prevent the appearance of abnormal display due to its crossing within the visible display field with the wiring of the electrodes 7b1 and 7b2 of the first electrode 710. Additionally, the electrodes 7a to 7f, the numeral electrodes 8a to 8g, and the first electrodes 500a to 500g, the segmental electrodes 110a to 110f, the date display electrodes 120a to 120g, and the second electrodes 130a to 130g must be arranged so as not to cross one another, thus preventing an abnormal display.For obtaining a desired display by using thus constructed display device, suitable voltages are selectively applied to the electrodes on the transparent electrode plates 600 and 700, such as the first electrodes 710 to 780, numeral electrodes 8a to 8g, electrodes 500a to 500g and the second electrodes 810 to 880, electrodes 120a to 120g and electrodes 130a to 130g.
Figures 13(A) and 13(B) illustrate the relation between the first electrode drive signals a, b and c and the second electrode drive signals X, Y and Z when numerals, decimal point and calendar data at the first and second to eighth digits are to be displayed. For example, when numeral "1" is to be displayed, the first electrode drive signal a is applied at the same time as the second electrode drive signals X, Y and Z in all digits, first to eighth digits. When the numeral "8" is to be displayed as the first digit, the first electrode drive signals a, b and c must be applied to that digit at the same time as the second electrode drive signal X is applied to the electrodes, as shown in Figure 13(A).Further, the first electrode drive signals b and c must be applied at the time of the application of the second electrode drive signal Y, and the first electrode drive signals b and c must be applied at the time of the application of the second electrode drive signal Z. To display the numeral "8" as one of the second to eighth digits, the first electrode drive signals a and b must be applied to the appropriate digit at the time of the second electrode drive signal X; the first electrode drive signals a, b and c, at the time of the second electrode drive signal Y; and the first electrode drive signals b and c, at the time of the second electrode drive signal Z, as shown in Figure 13(B). As seen from the above, there are some differences of the drive signal combinations required for the first and for the second to eighth digits for the same numeral or character display.The numerals other than the above-mentioned ones and the decimal point may be displayed by properly applying the first electrode drive signals to the respective digit at the same time as the second electrode drive signals X, Y and Z, as shown in Figures 13(A) and 13(B).
In order to drive the sets of numeral electrodes 8a to 8g to display the dates "1" to "31", the first electrode drive signal c must be applied at the timing of the second electrode drive signal Y, as shown in Figure 13(A). At this time, in the first digit, there is no correspondence between the segmental electrode 110f in Figure 12(B) and the partitioned electrodes 7bl and 7b2 in Figure 12(A). Therefore, nothing is displayed.
However, there is produced a potential difference between numeral electrodes 8a to 8g connected to the partitioned electrode 7bl to which the first electrode drive signal c1 is applied via the applied via the electrode 7b2 and the second electrodes 120a to 120g for the date display. See Figures 12(A) and 12(B). As a result, the dates "1" to "31" are displayed.
When one of the electrodes 500a to 500g is to be energized to display "SUN" the first electrode drive signal c must be applied to the respective digit at the time of the second electrode drive signal X. Since there is no correspondence between energized segmen tal electrodes 1 10a and 7b in the second to eighth digits, nothing will be displayed in these digits. However, a given potential difference is produced between the electrodes 500a to 500g connected to the vertical electrodes 7b of the first electrodes 720 to 780 to which the selected first electrode drive signal c2 to c8 is applied and the second electrodes 130a to 130g to which the second electrode drive signal X is applied. As a result, a selected one of the SUN electrodes 500a to 500g is driven.
Figure 14 shows a block diagram of an electronic calculator with time counting function. In the figure, a control unit 141 for controlling the respective portions of the calculator includes an ROM (read only memory) portion 141a for fixedly storing microprograms and an address portion 141b for addressing the ROM portion 141 a. An RAM (random access memory) 142 includes a first area 142a for storing time counting data or calendar data, a second area 142b having an accumulator register and the like for arithmetic operation, a third area 142c having registers for storing other various data. The data read out of the RAM 142 is fed to an operation/decision section 143 where it is properly processed and again fed to the RAM 142.An address controller 144 specifies the column address (called digit designation) to the RAM 142, and controls the column address to the RAM 142 depending on a single column address outputted from the ROM portion 141a or the processing initiation/end column address.
An instruction decoder 145 decodes an instruction outputted from the ROM portion 141a and produces a control signal "OP" to the respective circuits, a read/write indication signal R/W to the RAM 142, a control signal to an address controller 144, and a display signal D to a display processing circuit to be described later. In addition to the signals to the address controller 144 and the instruction decoder 145, the ROM 141a produces a signal for specifying the column address to the RAM 142 and numeral codes for arithmetic operation, flag codes and the like to the operation/decision circuit 143.A timing signal generator 146 includes an oscillation section 146a for generating a reference frequency for time counting and a clock signal for operating the respective portions and a timing signal generating section 146b for producing various kinds of timing signals from the output of the oscillation section 146a. The output of the timing signal generating section 146 is applied to the instruction decoder 145 and to other respective portions. The reference frequency signal outputted from the oscillation section 146a is fed to a frequency divider 147a for obtaining a one second interval signal, for example. The output of the frequency divider 147a is applied to a latch circuit 147b where the output is latched. The frequency divider 147a and the latch circuit 147b form a time counting signal generator 147.The output of the time counting signal generator 147 is applied to the address section 141b of the control unit 141. A key input unit 148 is provided with various keys such as function keys, and other keys for controlling the time counting or calendar function and other necessary keys. The output of the key input unit 148 is applied to the address section 141b. The key input unit 148 is provided with a "CAL" (calendar display) as a key for controlling a calendar function. To the address section 141b of the control section 141 are applied the outputs of the time counting signal generating section 147 and the key input unit 148 and a branch signal of 2 bits from the operation/ decision section 143.
The display processing circuit 149 converts the data fed through the operation/ decision section 143 into display data. The display processing circuit 149 includes a decoder 149a for decoding applied data (BCD code) into 0 to 9 and a segment encoder 149b for encoding the output of the decoder 149a into the segment signals , m, n ... q. The segment encoder 149b operates when commanded by the display signal "D" from the instruction decoder 145. The output of the decoder 149a is applied to a display buffer 151a for storing the data to select one of the first electrodes 500a to 500g as shown in Figure 12(A) for "SUN" display, a display buffer 151b for storing the display position of the decimal point, and a display buffer 151c for storing the display of the calendar data. The output of the segment encoder 149b is applied to eight display buffers 151d .. 151k for storing the segments f to q, These display buffers 151a to 151k are controlled by a write-in control circuit 152 which receives the address data outputted from the address controller 144 and the signal outputted from the timing signal generator 146 to produce write-in clock signals. The output signals of these buffers 151a to 151k are applied to a first electrode drive signal generator 153 which produces appropriate combinations of first electrode drive signals al to a8, bl to b8, and c1 to c8. The output of the first electrode drive signal generator 153 is applied via a first electrode drive circuit 154 to a display device 156 where it drives the various electrodes as mentioned referring to Figure 12(A). A second electrode drive circuit 155 produces second electrode drive signals X, Y and Z which are in turn applied to the first electrode drive signal generating circuit 153 in which they are combined with the output signals of buffers 151a - 151h to produce appropriately timed first-electrode drive sig nals. The second electrode drive signal SDS is applied to the display device 156 where it drives the electrodes 110a to 110f, numeral electrodes 120a to 120g and electrodes 130a to 130g.' Figures 15(A) and 15(B) show the details of a display processing circuit 149, display buffers 151a to 151k, write-in control circuit 152 and drive signal generating circuit 153.
The write-in control circuit 152 includes a decoder 152a for decoding the address data fed from the address controller 144 and AND gates 152bi to 152bll which are coupled at their one input terminals with the decoder lines and at their other input terminals with the timing signals outputted from the timing generator 146. The output of the AND gate 152bl is applied as a clock signal Qs to the display buffer 151d. The output of the AND gate 152b3 is applied as a write-in clock signal QD8 to the display buffer 151d. Similarly, the outputs oDs )C of the AND gates 152blo and 152bll are applied to the display buffers 151k and 151c, respectively.In Figures 15(A) and 15(B), the display buffer 151b for storing the display position of the decimal point and the AND gate 152b2 are omitted but the connections to them are similar to those of the above-mentioned ones. The outputs 0 to 6 of the decoder 149a of the display processing circuit 149 are fed to the display buffer 151a comprising seven flip-flops (not shown) and the output 10 is applied to the display buffer 151c including a single flipflop. The outputs of the segment encoder 149b are outputted in the order m, n, e, r, o, q and p, coupled with the display buffers 151a, 151d to 151k each including seven flip-flops. The seven bit outputs of each of the buffers 151a, 151d to 151k and the one bit output of the buffer 151c are applied to the first electrode group signal generator 153 where they are properly combined with the X, Y and Z signals.The outputs corresponding to the segments m and n of the seven bit outputs of each of the display buffers 151d to 151j for storing the display data of the second to eighth digits are outputted through transfer gates 153j,, 153j2 ... 153d" 153d2 to which the second electrode drive signals X and Y and the output signals of the respective display buffers 151j to 151d are applied, and outputted as signals a2 a8. The outputs corresponding to the segments e, r and o are outputted through transfer gates 153j3, 153j4, 153j5 ... 153d3, 153d4, 153do to which the second electrode drive signals X, Y and Z and the outputs signals of the respective display buffers 151j to 151d are applied, and outputted as signals b2 to b8.The outputs corresponding to the segments q and p are commonly coupled through transfer gates 153j6, 153j7 ... 153d > , 153d7 to which the second electrode drive signals Y and Z and signals from the display buffers 151j to 151d are applied, and outputted as signals c2 to c8.
The outputs corresponding to the segments m and n of the display buffer 151k for storing the first digit display date are outputted through transfer gates 153kl and 153k2 to which the second electrode drive signals X and Y are respectively applied. The outputs of gates 153kl and 153k2 are commoned and outputted as a first electrode drive signal al. The outputs corresponding to the segments e, r and o are outputted through transfer gates 153k3, 153k4 and 153k5 to which second electrode drive signals X, Y and Z are respectively applied and of which the outputs are commoned and outputted as a first electrode drive signal bl.
The outputs corresponding to the segments q and p are outputted through transfer gates 153k6 and 153k7 to which the second electrode drive signals X and Z are respectively applied and of which the outputs are commoned and outputted as a first electrode drive signal cl.
The seven outputs of the display buffer 151a for storing the day of the week data are outputted through transfer gates 153al to 153a7 to which the second electrode drive signal X is applied. The output data line "0" of the transfer gate 153al is connected to the common output of the transfer gates 153d6 and 153d7, i.e. the line of the first electrode drive signal c8. In a similar manner, the outputs of the transfer gates 153 a2 to 153a7 are coupled to the lines of the first electrode drive signals c2 to c7, respectively.The output of the display buffer 151c for storing the calendar data is connected via a transfer gate 153c to which the second electrode drive signal Y is applied, to the common output of the transfer gates 153k6 and 153k7, i.e. the first electrode drive signal c1 line.
Figure 16 shows the register structure of an A register in the third section 142c of the RAM 142 shown in Figure 14. As seen from the figure, the first to eighth digits (Ao to A7) store numerical data. The 9th digit (A8) stores the decimal point. The 10th digit (Ag) stores the day of the week corresponding to the 1st day of a month, "0 to 9" being assigned for the days of the week; for example, "0" is assigned for Sunday and "6" for Saturday. The 11th digit (Alo) stores a flag used in processing calendar data.
Let us consider the operation to make a display of "March in 1976" on the device with the above-mentioned construction. Figure 17 is a flow chart for illustrating the operation of the calendar display. The correct keys on the key input unit 148 shown in Figure 14 are first depressed to input "1976" for the year and "3" for the month.
The inputted data are written into a given register of the second area 142b of the RAM 142. After completion of this input operation, the address controller 144 advances to effect a process A to calculate the date expressed as "month, day and year". In preparation for this, the date "1" is added to "1976, 3" stored therein to obtain "1976, 3, 1". Then, the controller outputs a series of instructions for calculating the number of days which have elapsed between a virtual reference day (March 1, 0 A.D.) and the current date "1976, 3, 1".The following calculation will be executed by using the respective registers in the second area 142b of the RAM 142: If b ;a 3 365.2SXa+30.6X(b-3)+c .. (1) If buzz 365.2SX(a1)+3O.6X(b+9)+c... . (2) where a=Anno Domini, b=month, c=day.
The number of days from the virtual reference day up to the present date "1976, 3, 1" is calculated by using the equation (1). The result of the calculation is "721735". This is loaded into a given register in the second area 142b of the RAM 142. Then, a process B is executed. In the process B, the number of days calculated from the reference day is divided by "7" and the day of the week is calculated by using the remainder, and correction is made for an error in the day of the week due to the fact that the number of days is calculated from the virtual reference day taken as "1" rather than as "0". Firstly, a calculation is made to obtain the remainder when the "721735" is divided by "7", under control of a series of instructions given from the ROM 141a and through the second area 142b and the operation/decision unit 143.The result of this calculation is Quotient . 103105 Remainder . . 0 After obtaining of the remainder "0", the correction of the day of the week will be executed. The virtual reference day is assumed to have been a Sunday. When the days of the week, Sunday to Saturday, are expressed by "0" to "6", "1" is added to "0" of the remainder since the initial day number is taken as "1". As a result, the data for the day of the week is "1" which in turn is loaded into the 10th digit store (A9) of the register A in the third area 142c of the RAM 142. Then, a process step C is executed. In this step, the contents of the store A9 are loaded into the display buffer 151a via the display processing circuit 149. The address controller 144 specifies the column address "9" and at the same time selects the write-in control circuit 152 to which the "9" is loaded.At this time, the write-in control circuit 152 has received the display signal D from the instruction decoder 145. Accordingly, the decoder 152a decodes the column address "9" selected by the address controller 144 to enable the AND gate 152by and thus produce the write-in clock signal Xs as shown in Figure 15A. The data "1" stored at the address A9, which is fed to the display processing circuit 149 via the operation/ decision section 143, is decoded by the decoder 149a. The decoded signal is applied to the display buffer 151a. Therefore, the display buffer 151a is controlled by the write-in clock signal 4)3 outputted from the write-in control circuit 152 and its contents become "0100000" (reading downwards) as shown in Figure 18.Then, the process advances to a step D in which a flag code "10" is loaded into the flag digit store (Alo) of the A register for directing the calendar display. The loading of the flag code "10" is effected by an operation in which the flag code "10" outputted from the ROM 141a is applied to the RAM 142 via the operation/ decision section 143. In a following step E, the flag code "10" loaded into the 11th digit address (Alo) of the register A included in the third area 142c in the RAM 142 is set in the display buffer 151c via the display processing circuit 149.At this time, the address controller 144 outputs the flag code address "10", and after decoding the code "10" the decoder 152a of the write-in control circuit 152 enables the AND gate 152b11 thereby to produce the write-in clock signal 4)c. The contents "10" of the digit address Alo read out from the third area 142c of the RAM 142 are applied to the display processing circuit 149 via the operation/decision section 143 where they are decoded by a decoder 149a. As a result of the decoding, the decoder produces an output on the output line corresponding to the flag code "10" which then sets the display buffer 151c as shown in Figure 18, so that its contents are now "1". Accordingly, when the month and year data are inputted from the key input unit 148 in Figure 14, processes A and B and steps C to E are performed. As a result, data representing the day of a week corresponding to the first day of the month are loaded into the display buffer 151a and the "1" representing the calendar date is loaded into the display buffer 151c. Then, the operation shifts to the display process whereby the calendar data is displayed. In this example, the display system is of dynamic drive type of 1/3 duty. Accordingly, the second electrode drive signals X, Y and Z are repeatedly produced so that a desired display is performed depending on the memory contents of the display buffers 151a to 151k and the respective timings.When the contents of the buffers 151a to 151k are as shown in Figure 18, the "1" outputted through the transfer gate 153a2 at the timing of the second electrode drive signal X is outputted as a first electrode drive signal c2 which in turn is applied to the terminal c2 of the display device 156 via the first electrode drive circuit 154. As a consequence, a given potential is produced between the first electrode 500a and the second electrode 130a to indicate that the date column "7, 14, 21, 28" corresponds to Sunday, as seen from Figure 13(B) and Figures 12(A) and 12(B).
The "1" outputted through the transfer gate 153c at the timing of the outputting of the signal Y, is outputted as a first electrode drive signal cl which in turn is applied to the terminal cl of the display device 156 via the first electrode drive circuit 156. In the display device, a given potential difference is produced between the electrodes 8a to 8g and the second electrodes 120a to 120g thereby to display the dates "1 to 31". The display obtained at this time is as shown in Figure 19. In the above description, the day of the week and date data are displayed at the timings of the outputting of the second electrode drive signals X, Y and Z. Also, in the above description, no first-electrode drive signals are produced at the timing of the second electrode drive signal Z and only the day of a week and day are displayed.
However, if the data relating to year and month are loaded into the display buffers 151a to 151d, such data may be displayed.
As described above, the example of the invention may automatically calculate the day corresponding to Sunday depending on the "year" and "month" and display a calendar in conventional form.
Additionally, a calendar may automatically be displayed by using the time counting function performed by using the first section 142a of RAM 142. As shown in Figure 14, the one-second signal from the frequency divider 147a for frequency dividing the output of the oscillator 146a, is outputted and the output is set in the latch circuit 147b. The output of the latch circuit 147b is applied as an address modifier signal to the address section 141b of the controller 141.
On this application, the process F shown in Figure 17 starts. In this step, the operation/ decision section 143 performs a "+1" operation to the address storing the time counting data in the first area 142a of the RAM 142, and any carry operation necessary for the scale-of-60, scale-of-12, scale-of-24, etc.
counting operations used in timekeeping is carried out. Through this processing, if there is no change of day (passing 24 hours), other processes such as arithmetic operation or display are performed, followed by a process step G. In the process step G, when the change of day is detected, one day is added to the calendar data in the first area 142a of the RAM 142 and a decision is made as to the whether the current month is a "30 days month", "31 days month", "FEB (common year)" or "FEB (leap year)".
Thus, an operator depresses the calendar display key "CAL" on the input unit 148 with an intention to know the calendar of the current month. In this case, the step H reads out from the calendar data storing area in the first area 142a of the RAM 142 only the data of "year" and "month", and then sets the data in the A register in the 3rd area 142c. Then, the above mentioned process and steps A to E are executed to display the calendar of the month, as in the "March, 1976" case.
It will be seen from the foregoing that the calendar of the month may automatically be displayed by incorporating the example of the invention into a timekeeping device.
In the above example, the numeral electrodes 8a to 8g are partly disposed in the spaces between adjacent display members 210 to 280. However, an arrangement of numeral electrodes 8a to 8g for calendar display as shown in Figure 20 is possible. In the figure, two numeral electrodes are vertically disposed one above another in each space defined by four segments and a single numeral electrode is disposed under the bottom of each of the display members 260 to 280. Alternately, a display shown in Figure 21 is also permitted. In this example, the numeral electrodes 8a to 8g are disposed in the inter-digit spaces 390 to 360 and the spaces formed within the display members 260 to 280.
When it is desired to obtain the calendar of the preceding or succeeding month, this may be done merely by changing the data for the current month. Such is easily realized through the key operation of a given key on the key input unit.
As described above, when the invention is applied to a desk top electronic calculator with time-keeping function, an enlargement of the display area may be obtained, The calendar display device of the invention may be employed in desk top electronic calculators without time-keeping function and in usual digital electronic clocks and the like, in addition to the electronic calculator with time-keeping function.
In the above-described examples, the numeral electrodes for calendar display are disposed on the left-hand side of the display elements for time display; however, this disposition is not limited to this position.
"SUN" representing the day of a week disposed above the calendar display members may be replaced by a decimal point, for example.
Reference should be made to co-pending Patent application No. 12542/78 (Serial No.
1587004) which describes and claims apparatus having some features in common with what is described and claimed herein.
WHAT WE CLAIM IS: 1. An electronic display device comprising a digitial display portion in which a plurality of segmental display members are arranged, each segmental display member being capable of digitally displaying numerals by appropriate energization of its segments; and a calendar display portion in which numeral display members for display of the numerals 1 to 31 for the dates of one month are arranged in plural rows and columns, at least some of said numeral display members being disposed in spaces defined by segments of said digital display portion.
2. An electronic display device according to claim 1, in which said numeral display members for date display are arranged in seven columns.
3. An electronic display device according to claim 1, in which said numeral display members for date display are disposed in the spaces between adjacent digits of said segmental display members.
4. An electronic display device according to claim 1, in which said numeral display members for date display are disposed in the spaces within said segmental display members.
5. An electronic display device according to claim 1, in which said numeral display members for date display are disposed partly in the spaces between adjacent digits of said segmental display members and partly in the spaces within said segmental display members.
6. An electronic display device according to claim 4, in which a plurality of said numeral display members for date display are disposed in a single space within a said segmental display member.
7. An electronic display device according to any preceding claim, in which said calendar display portion further includes indicators each for indicating the column corresponding to a specified day of the week.
8. An electronic display device according to any preceding claim, in which said numeral display members for date display are all connected to a single signal terminal.
9. An electronic display device according to any of claims 1 to 7, in which the numeral display members for date display in each said column are commonly connected.
10. An electronic display device according to any of claims 1 to 7, in which the numerals 1 to 28 in said numeral display members for date display are commonly connected and the numerals 29, 30 and 31 have respective individual signal terminals.
11. An electronic display device according to any preceding claim, further comprising: control means to obtain time data including at least "hour" and "minutes" depending on a reference clock signal, and data for indicating the column corresponding to a specified day of the week in said calendar display portion; normally operative means for displaying the time data from said control means in said digital display portion; operation instruction means for providing a display instruction to said calendar display portion; and display control means which actuates said calendar display portion in response to the display instruction from said operation instruction means and indicates the column corresponding to the specified day of a week in response to the data of the specified day of the week column fed from said control means.
12. An electronic display device according to claim 11 in which said display control means includes selectively operable display means corresponding to the respective columns for denoting the column in said calendar display portion corresponding to a specified day of the week.
13. An electronic display device according to claim 11 in which said display control means includes means for providing a flash instruction signal for flashing said numeral display members for date display belonging to the column of the specified day of the week.
14. An electronic display device according to claim 13, in which said numeral display members for date display in each column are commonly connected to respective signal terminals, and means is provided to provide a flash control signal to one said signal terminal for flashing the numerals in the specified day of the week column in response to a display instruction from said operation instruction means.
15. An electronic display device according to claim 11 as dependent upon claim 10 in which said control means includes means for obtaining the "month" data and means is provided for supplying a display instruction control signal to the signal terminals of the numerals 29, 30 and 31 in dependence on said "month" data.
16. An electronic display device according to claim 1, further comprising: control means to obtain time data including at least "hour" and "minutes" depending on a reference clock signal, and data for indicating the column corresponding to a specified day of the week in said calendar display portion; means for supplying said time data from said control means to said segmental display members and for actuating said calendar display portion; and display control means for indicating the specified day of
**WARNING** end of DESC field may overlap start of CLMS **.

Claims (21)

  1. **WARNING** start of CLMS field may overlap end of DESC **.
    Patent application No. 12542/78 (Serial No.
    1587004) which describes and claims apparatus having some features in common with what is described and claimed herein.
    WHAT WE CLAIM IS: 1. An electronic display device comprising a digitial display portion in which a plurality of segmental display members are arranged, each segmental display member being capable of digitally displaying numerals by appropriate energization of its segments; and a calendar display portion in which numeral display members for display of the numerals 1 to 31 for the dates of one month are arranged in plural rows and columns, at least some of said numeral display members being disposed in spaces defined by segments of said digital display portion.
  2. 2. An electronic display device according to claim 1, in which said numeral display members for date display are arranged in seven columns.
  3. 3. An electronic display device according to claim 1, in which said numeral display members for date display are disposed in the spaces between adjacent digits of said segmental display members.
  4. 4. An electronic display device according to claim 1, in which said numeral display members for date display are disposed in the spaces within said segmental display members.
  5. 5. An electronic display device according to claim 1, in which said numeral display members for date display are disposed partly in the spaces between adjacent digits of said segmental display members and partly in the spaces within said segmental display members.
  6. 6. An electronic display device according to claim 4, in which a plurality of said numeral display members for date display are disposed in a single space within a said segmental display member.
  7. 7. An electronic display device according to any preceding claim, in which said calendar display portion further includes indicators each for indicating the column corresponding to a specified day of the week.
  8. 8. An electronic display device according to any preceding claim, in which said numeral display members for date display are all connected to a single signal terminal.
  9. 9. An electronic display device according to any of claims 1 to 7, in which the numeral display members for date display in each said column are commonly connected.
  10. 10. An electronic display device according to any of claims 1 to 7, in which the numerals 1 to 28 in said numeral display members for date display are commonly connected and the numerals 29, 30 and 31 have respective individual signal terminals.
  11. 11. An electronic display device according to any preceding claim, further comprising: control means to obtain time data including at least "hour" and "minutes" depending on a reference clock signal, and data for indicating the column corresponding to a specified day of the week in said calendar display portion; normally operative means for displaying the time data from said control means in said digital display portion; operation instruction means for providing a display instruction to said calendar display portion; and display control means which actuates said calendar display portion in response to the display instruction from said operation instruction means and indicates the column corresponding to the specified day of a week in response to the data of the specified day of the week column fed from said control means.
  12. 12. An electronic display device according to claim 11 in which said display control means includes selectively operable display means corresponding to the respective columns for denoting the column in said calendar display portion corresponding to a specified day of the week.
  13. 13. An electronic display device according to claim 11 in which said display control means includes means for providing a flash instruction signal for flashing said numeral display members for date display belonging to the column of the specified day of the week.
  14. 14. An electronic display device according to claim 13, in which said numeral display members for date display in each column are commonly connected to respective signal terminals, and means is provided to provide a flash control signal to one said signal terminal for flashing the numerals in the specified day of the week column in response to a display instruction from said operation instruction means.
  15. 15. An electronic display device according to claim 11 as dependent upon claim 10 in which said control means includes means for obtaining the "month" data and means is provided for supplying a display instruction control signal to the signal terminals of the numerals 29, 30 and 31 in dependence on said "month" data.
  16. 16. An electronic display device according to claim 1, further comprising: control means to obtain time data including at least "hour" and "minutes" depending on a reference clock signal, and data for indicating the column corresponding to a specified day of the week in said calendar display portion; means for supplying said time data from said control means to said segmental display members and for actuating said calendar display portion; and display control means for indicating the specified day of
    the week column in said calendar display portion in response to the data of the specified day of the week column from said control means.
  17. 17. An electronic display device according to claim 16 in which said control means includes means for obtaining "month" data, said numeral display members for date display of at least the numerals 29, 30 and 31 have individual respective signal terminals, and a display instruction signal depending on said "month" data is applied to said respective signal terminals.
  18. 18. An electronic display device according to claim 1, further comprising: control means to obtain time data including at least "hours" and "minutes" depending on a reference clock signal, and data for indicating the column corresponding to a specified day of week in said calendar display portion; normally operative means for displaying the time data from said control means in said digital display portion; selectively operable operation instruction means for providing a display instruction to said calendar display portion; and display control means which actuates said calendar display portion in response to the display instruction from said operation instruction means and indicates the column corresponding to the specified day of a week in response to the data of the specified day of the week column fed from said control means and further digitally displays at least the "month" information from said control means by means of said segmental display members in said digital display portion.
  19. 19. An electronic display device according to claim 18, further comprising means for digitally displaying date data from said control means by means of said segmental display members in response to a respective display instruction from said operation instruction means.
  20. 20. An electronic display device according to any preceding claim, in which the display device is a liquid crystal display device.
  21. 21. An electronic display device, substantially as hereinbefore described with reference to the accompanying drawings.
GB12541/78A 1977-03-30 1978-03-30 Electronic display device Expired GB1587003A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP3568877A JPS53120558A (en) 1977-03-30 1977-03-30 Calendar display device
JP3569177A JPS6045387B2 (en) 1977-03-30 1977-03-30 Digital display clock display device
JP3568977A JPS53120559A (en) 1977-03-30 1977-03-30 Calendar display device

Publications (1)

Publication Number Publication Date
GB1587003A true GB1587003A (en) 1981-03-25

Family

ID=27288839

Family Applications (1)

Application Number Title Priority Date Filing Date
GB12541/78A Expired GB1587003A (en) 1977-03-30 1978-03-30 Electronic display device

Country Status (5)

Country Link
CA (1) CA1088764A (en)
CH (1) CH620090GA3 (en)
DE (1) DE2813478C2 (en)
GB (1) GB1587003A (en)
HK (1) HK52383A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5587084A (en) * 1978-12-25 1980-07-01 Casio Comput Co Ltd Electronic watch

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5241673B1 (en) * 1971-06-09 1977-10-19
JPS5616431B2 (en) * 1973-06-18 1981-04-16
JPS5098373A (en) * 1973-12-25 1975-08-05

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HK52383A (en) 1983-11-18
DE2813478C2 (en) 1982-03-11
CH620090GA3 (en) 1980-11-14
DE2813478A1 (en) 1978-10-05
CA1088764A (en) 1980-11-04
CH620090B (en)

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19960330