CA1088764A - Electronic display device - Google Patents

Abstract

Abstract of the Disclosure An electronic display device has numerals 1 to 31 for days of one month arranged in plural columns and rows, and numerals for displaying time such as "hours", "minutes" and "seconds" and including a plurality of segments. At least a part of the numerals for date display are disposed in the spaces defined by the segments for the numerals for time display. The device is useful for devices with restricted display space.

Description

1~88764 The invention relates to an electronic display device in which numerals for date display are partly disposed in the spaces defined by segments forming numerals for time display.
Digital timepieces for digitally displaying time by using the liquid crystal display (LCD), light emitting display (LED) and the like are on the verge of superseding conventional mechanical drive timepieces. The digital timepiece is constructed by using a quartz crystal oscillator, an electronic time counting circuit and the like. Accordingly, the counting accuracy is high and date data such as days, weeks and months may readily be counted in addition to time data such as hours, minutes, and seconds. This enables it to digitally display the days, weeks and months. For example, in the case of wristwatches, the date data is frequently displayed through switching from the time data display, since its display space is restrictively small. The business execution often demands the date covering a necessary time range, in order to make a schedule or confirm the specified past date. In the above-mentioned calendar system, the year and month determine the corre- -sponding day and its day of the week. A substitutional calendar system is possible in which numerals 1 to 31 for one month days are -arranged in a matrix like fashion with rows and columns. The columns are arranged corresponding to the days of a week and one specified column of them is disposed aligning with Sunday. If the calendar system is embodied by using electronic technology, we can instantly seen any desired date.
However, if the date data must additionally be displayed on the same display space as that for the time data, the display space must be expanded. This is unfavorable for a device with narrow display space such as a wristwatch.
For this, a metal place on which the date data is printed is attached to a wristwatch band. This method, however, is defective in that the attaching work of the metal plate is troublesome and the metal plate attached is nuisance and unattractive. Further, if .

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the metal plate is unobtainable, users feel very unconvenient.
In the field of electronic desk top type calculator, thin and small-sized calculators have appeared recently and prevalently sold in the market. Such type calculators often need the ordinary calculating function and the time counting functions such the time and date counting functions, stopwatch function, alarm function, and timer function, as well. As a matter of course, if such type calculator has the calendar function like timepiece, it is very convenient for users.
Any way, it is very difficult to doubly display the calendar data on the same space as that the time data display, in the electronic devices needing a digital display of the data and time data and the calculating data, but having a restricted narrow display space.
Accordingly, an object of the invention is to provide an electronic display device in which the calendar data as well as the time data is effectively arranged in a common display space.
To achieve the above object, an electronic display device comprises a digital display portion having a plurality of digits of segmental display members for digitally displaying numerals by using proper combination of segments and a calendar display portion in which at least a part of display members for date numerals are arranged in plural rows and columns in the spaces defined by segments of the segmental display member.
With such an arrangement, the calendar data as well as characters or numerals may be displayed in a common display space without enlarging the display device per se. Those display members may readily be combined without complexing the wiring in the display device, so that the calendar data may be displayed as a situation demands. Accordingly, it is very convenient in practical use.
Further, there is eliminated the need of unattractive and nuisance metal plate which is needed in the conventional wristwatch.
Other objects and advantages of the invention will be apparent .: ~

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from the following description taken in connection with the accompanying drawings, in which:
Fig. 1 shows a plan view of a display surface of an embodiment of an electronic device according to the invention;
Fig. 2 shows one form of the displays on the display surface shown in Fig. l;
Fig. 3 shows another form of the displays of the same;
Figs. 4(A) and 4(B) show one form of the displays where the date data is displayed on the display surface of Fig. l;
Fig. 5 shows a control circuit for controlling the drive of the character electrodes in the display surface which is an embodiment of the invention;
Fig. 6 shows a block diagram of a time counting circuit for carrying out a clock operation of the display device with the -display surface shown in Fig. l;
Fig. 7 shows a block and schematic circuit diagram of a month control circuit of the time counting circuit shown in Fig. 6;
Fig. 8 shows a block and schematic circuit of a switching control unit in the time counting circuit shown in Fig. 6;
Figs. 9(A) and 9(B) illustrate one form of the displays on the display surface and a circuit diagram of a control circuit of the calendar display according to another embodiment of the invention;
Fig. 10 is one form of the displays of the calendar display shown in Figs. 9(A) and 9(B);
Fig. 11 shows a display surface of the display device which is another embodiment of the invention;
Figs. 12(A) and 12(B) illustrate the structures and connections of first and second electrodes in the display surface of Fig. 11;
Figs. 13(A) and 13(B) tabulate drive signals supplied to the electrodes in the respective digits shown in Figs. 12(A) and 12(B);
Fig. 14 shows a block diagram of a circuit construction when the display device of the invention is applied to a microcomputer;

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Figs. 15(A) and 15 (B) illustrate wiring of major blocks for illustrating the operation of the Fig. 19 circuit;
Fig. 16 schematically shows the contents of the register included in RAM in Fig. 14;
Fig. 17 shows flow charts useful in explaining the operation of the circuit in Fig. 14;
Fig. 18 shows a wiring diagram of the major part of Figs. 15(A) and 15 (B) for explaining the operation of the circuit of Figs. 15(A) and 15 (B ) ;
Fig. 19 shows the display surface in Fig. 14 when the calendar data is displayed on the display surface;
Fig. 20 illustrates an arrangement of display segments and character electrodes on the display surface of the display device which is another embodiment of the invention; and Fig. 21 illustrates an arrangement of display segments and character electrodes on the display surface of the d~splay device which is still another embodiment of the invention.
An embodiment of the invention to follow is the case where a display device of the invention is applied to an electronic wristwatch. Referring now to Fig. 1, there is shown the surface of -a display device 34 according to the invention. A date display portion 11 has numerals for one month date representation 1 to 31 which are arranged in matrix like fashion with rows having seven days corresponding to the days of the week, Sunday to Monday, and with columns. The numerals are denoted as lla, llb ... and each constructed by a character electrode. Four digits time display members 12 to 15 for displaying hours and minutes and display members 16 for displaying a colon to mark the hour section off from the minute section are disposed on the data display portion 11.
The time display members 12 to 15 are each constructed by a plurality of segment electrodes 12a, 12b, 13a, 13b ..., 14a, 14b ....

15a, 15b ... . As is known, a numeral is formed by properly combining the segments. Each segment is disposed in the space .

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among the character electrodes lla, llb ... .
On the upper portion of the date display portion 11, there are disposed arrow shaped indicators 17a to 17g for specifying any one of the days of the week, an auxiliary time display portion 18 including second indicators "0", "10" ... "50" designated by 18a to 18f for indicating seconds and an indicator 18g denoted as "A/P"
for indicating morning or afternoon, and an indicator 19 for indicating the days of the week, Sunday to Saturday, individually designated by l9a to l9g. When one of the arrow shaped indicators 17a to 17g is energized, other corresponding indicators are auto-matically energized, seconds, morning or afternoon, and the day of the week.
The respective character electrodes of the date display portion 11, the time display members 12 to 15, the auxiliary time display portion 18 and the indicator 19 are all constructed by liquid crystal display elements, for example. More specifically, a liquid crystal layer is sandwiched by a pair of transparent substrates made of glass. On the inner surface of the upper transparent substrate, formed are transparent electrodes forming numeral electrodes lla, llb ..., segment electrodes 12a to 15b, colon display member 16, arrow shaped indicators 17a to 17g, the respective indicators 18a to 18g of the auxiliary time display portion 18, and the respective characters l9a to l9g of the indicator 19. On the other hand, a common transparent electrode is formed on the inner surface of the lower transparent substrate.
Molecules of liquid crystal sandwiched between both the substrates are twisted about 90 therebetween in a spiral fashion. When an electric field is applied to the selected electrode, the spiral structure of the liquid crystal molecules decays to lose its optical rotary power and light is shielded by a polarizing plate (not shown), with the result that characters or numerals corresponding to the selected electrodes are displayed.
In a normal time display mode, the display operation of the 108~7~;~

numeral electrodes lla, llb ... and the indicator 19 is shut off.
The time display members 12 to 15, the indicator 17a to 17g, and the auxiliary display portion 18 are activated to display the time at that time, "10:58 and 20 seconds a.m.", for example, as shown in Fig. 2.
As shown in Fig. 3, if the indicator 19 for indicating the days of the week is used in place of the auxiliary time display portion 18 and the time display portions 12 to 15 is used for indicating "month" and "day", the date of the day is displayed, for example, "February 8th, Thursday" as shown in Fig. 3. A knob, for example, may be used to switch from the date display to the time display and vice versa.
As shown in Fig. 4(A), if only the electrodes of the date-display portion 11 and the indicators 17a to 17g are actuated, a calendar is displayed in place of the specified time and date, and the column corresponding to a specified day of the week, for example, Sunday, is indicated by using the indicators 17a to 17g. In this case, the month corresponding to the calendar, for example, 2 (February) may be displayed as shown in Fig. 4(B) by using the time display members 12 and 13.
In the calendar display, there are "28 days month", "29 days month" (in leap year), "30 days month" and "31 days month".
Accordingly, it is impracticable that the arrangement "1 to 31" for the date display is constantly applied to every kinds of the month. ~- -One of the solutions of this is illustrated in Fig. 5. Asshown, a display drive signal is commonly applied to a common terminal 20a connected to the numeral electrodes for the dates 1 to 28, and display drive signals are separately applied to terminals 20b to 20d connected to the numeral electrodes llx to llz for the dates 29 to 31, respectively. The display drive signals applied to the terminals 20b to 20d are fed from a month-end adjusting logic circuit 21. The logic circuit 21 includes AND gates 23a to 23d which are connected at one input terminals to a 31 days month - . . . . .
' , :-' ' '-' '- ' ,' .. ", .
- ' ! . ' ' terminal, 30 days month terminal, FEB (leap year) terminal, and FEB
(common year) terminal of a month control circuit 39 in a clock control unit to be deseribed later. The other input terminals of these AND gates are eommonly connected to an S2 terminal for supplying a calendar display instruction signal. The outputs of the AND gates 23a to 23d are applied to an OR gate 24a. The outputs of the AND gates 23a to 23c are applied to an OR gate 24b. The outputs of the AND gates 23a and 23b are connected to an OR gate 24c.
The output of the OR gate 24a is connected to the terminal 20a.
The output of the OR gate 24b is connected to the terminal 20b.
The output of the OR gate 24c is connected to the terminal 20c.
The output of the AND gate 23a is connected to the terminal 20d.
With such a cireuit eonneetion, when an output signal is applied from the "31 days month" terminal of the month eontrol eireuit 39, the ealendar display instruetion applied enables the AND gate 23a to produee an output signal whieh in turn is applied direetly to the terminal 20d and via the OR gates 24a to 24e to the terminals 20a to 20e. In this manner, the display drive signal is applied to all the dates 1 to 31. When an output signal is applied from the "FEB (eommon year)" of the month eontrol eircuit 39, the ealendar display instruetion applied at this time enables the ; AND gates 23d to produee the display drive whieh in turn goes via the OR gate 24a to the terminal 20a of the display device 34.
Aceordingly, the display drive signal is applied to only the dates 1 to 28. In a similar manner, the display up to 29 or 30 days is performed through the month-end adjusting logic circuit 21. The eonstruetion of the month eontrol circuit 39 will be described in detail later.
Referring now to Fig. 6, there is shown a clock control unit of a eloek with a display deviee as mentioned above. A referenee oseillator 25 produees a eloek signal to be applied to a frequeney divider 26 where it is frequeney-divided to produee a time eounting eloek signal. The time eounting eloek signal has one pulse every ., ' -~: ' :- ''. :

~0887~;4 ten seconds (lP/10 seconds). The time counting clock signal is then applied to a scale-of-6 counter 27 for "seconds" counting.
The counter 27 produces a "second" signal expressed in ten seconds and produces a carry signal every one minute. The carry signal drives a scale-of-60 counter 28 for "minutes" counting. The counter 28 produces a "minute" counting signal expressed in one minute and produces a carry signal every 60 minutes, i.e. one hour.
The carry signal drives a scale-of-12 counter for "hours" counting which produces a "hour" counting signal. The "second", "minute"
and "hour" counting signals from the counters 27 to 28 are all applied to a switching control unit 30. In the absence of a switching instruction from a switch unit 31, the time counting signal is applied to a decoder 32 and a driver 33. The output of the driver 33 activates a display device 34 with a display surface as mentioned above, so that the time display as shown in Fig. 2 is carried out.
A carry produced from the counter 29 every 12 hours is applied to a binary counter 35 which in turn produces a "day" signal and an -A/P signal representing morning or afternoon depending on the contents of the counter 35. The A/P signal is then applied to the switching control unit 30. The A/P signal actuates the indicator 17g when the time display is performed to indicate whether it is morning or afternoon.
A carry signal from the binary counter 35 is used as a "day"
counting signal and is counted by a scale-of-31 counter 36. The carry signal is also counted by a scale-of-7 counter 37. The counter 37 produces a signal representing any one of the days of the week. The output signal of the counter 37 will be referred to as a "week" counting signal, for easy of explanation.
A scale-of-12 counter 38 for "month" counting is provided corresponding to the "day" counter 36. The count of the counter 38 is used as a "month" display signal and under control of the month control circuit 39. Depending on the count of the "month"

--.: - - - .. :

~088764 counter 38, the month control circuit 39 judges the "31 days month", "30 days month", "28 days month" or "29 days month" and compares it with the date counted by the "day" counting circuit 36 to issue a reset instruction to the "day" counter 36, and a step instruction to the "month" counter 38. In this way, the month-end controlled counting is performed for the "month" and "day".
The count data of the "day" counter 36, "week" counter 37 and "month" counter 38 are guided to the switch control unit 30. Under this condition, when a date display instruction is produced from 10 the switch unit 31, the date data including "month", "week" and "day" are selectively applied to the decoder 32 which in turn drives the display device 34 through the driver 33 to display the date as shown in Fig. 3.
The month control circuit 39 includes the circuit function as shown in Fig. 5 to provide display control instructions to the numeral electrodes llX, llY and llZ representing the month-end dates 29, 30 and 31 for the purpose of the month-end adjustment, and provides an instruction to the switch control unit while at the same time controls the count of a referential day of the week 20 counter 40. The counter 40 stores the column of the date numerals corresponding to a specified day of the week as a reference, for example, Sunday, in a calendar display mode. In response to the signal outputted from the month control circuit 39 when month changes, the counter 40 corrects its contents to produce a selective signal for selecting a proper one of the indicators 17a to 17g which in turn is applied to the switch control unit 30. When the switch unit 31 issues a calendar display instruction, the switching control unit 30 provides a display instruction for the date display portion 11 to the decoder 32 and couples the signals from the month 30 control circuit 39 and the referential day of the week counter 40 with the decoder 32. As a result, the calendar is displayed as shown in Fig. 4(A). In this case, when the data from the "month"
counter 38 is also used, the display as shown in Fig. 4(B) is .- :

10~8764 obtained.
Fig. 7 shows the month control circuit 39 and its related circuits. A month detecting circuit 22 is connected to the "month"
counter 38. The circuit 22 detects the count data of the "month"
counter 38 and judges as to whether the month is the "30 days month", "31 days month", "28 days month" or "29 days month". The outputs of the detecting circuit 22 are applied to AND gates 39a, 39b and 39c and also to the logical circuit 21 shown in Fig. 5 for the month-end adjustment. The "day" counter 36 produces at the respective output terminals for the dates "28", "29", "30" and "31"
output signals when it steps from these counting states. These output signals representing these dates except the date 31 are ~-applied to one input terminals of AND gates 39d, 39e and 39f, respectively. The outputs of these AND gates are applied to an OR
gate 39g, together with the output terminal for "31" day of the counter 36. The output of the OR gate 39g is applied as a gate signal to the AND gates 39a to 39c, as a reset signal to the "day"
counter 36, and as a step signal to the "month" counter 38. The outputs of the AND gates 39a to 39c are applied as counting 20 correction instructions "+4", "+5" and "+6" to the referential day of the week.
The "30 days month" terminal of the detecting circuit 22 is coupled with the other input terminal of the AND circuit 39f. The "FEB" terminal of the detecting circuit 22 is applied to the other input terminals of the AND gates 39e and 39d.
In the calendar display, the leap year control on February must be made every four year. A leap year instruction signal for this control is formed by counting four carry signals each of which is outputted from, for example, the "month" counter 38 every one 30 year. Thus formed leap year instruction signal is applied via an inverter 39h to an additional input terminal of the AND gate 39d, and directly to additional input t,orminals of the AND gates 39c and 39e and one input terminal of an AND gate 39i. The "FEB" terminal ~08~'7~

of the detecting circuit 22 is connected to the other input terminal of the AND circuit 39i. The output signal of the AND gate 39i is applied as a signal for designating February in the leap year to the month-end adjusting circuit 21 for adjusting the month-end.
Assume now that this month is October. The "month" detecting circuit 22 provides a gate signal to the AND gate 39a. Under this condition, the "day" counter 36 counts 31 days and produces an output signal representing 31 when the next step instruction is coupled. The output signal is applied through the OR gate 39g to 10 the AND gate 39a so that the AND gate 39a is enabled to produce the "+4" signal to be directed to the referential day of the week counter 40. The output signal passing through the OR gate 39g is applied as a reset signal to the counter 31 so that the content of the counter 31 is "1". The same output signal also reaches as a step signal the "month" counter 38 to set up the contents of it at "November". Accordingly, the indicators 17a to 17g is shifted four to indicate the column of the date numerals corresponding to Sunday, for example, in the calendar of November.
In this manner, when the "month" counting circuit 38 starts to 20 count the "November", the detecting circuit 22 produces the "30 days month" output signal which is applied as a gate signal to the AND
gates 39b and 39f. Under this condition, the counting operation of the "day" counting circuit 36 progresses to produce an output signal at the "30" output. Upon receipt of the output signal, the AND gate 39f is enabled to produce an output signal which in turn goes through the OR gate 39g to the "day" counter 36, and to the "month" counter 38. Upon receipt of the signal, the counter 36 is reset and the counter 38 is stepped, with the result that the counter states of them indicate "December 1". At the same time, 3~ the AND gate 39b produces an output signal of "+5" to be directed to the referential day of the week counter 40. As a result, the Sunday column is indicated by the indicator 17, as in the previous case.

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Assume again that this month is February. In a common year, the last day of February is 28th. The Sunday column in the February calendar is the same as that in the March calendar. In a common year, the output of the inverter 39h is at "1" level. Accordingly, when the "day" counter 36 produces the "28" output, the AND gate 39d is enabled to produce an output signal which in turn goes through the OR gate 39g to the counter 36 and the counter 38. Accordingly, the counter 36 is reset and the counter 38 counts March so that the counter state is "March 1". At this time, the contents of the -10 counter 40 is not changed.
In the case of February in a leap year, the leap year instruction presents. Accordingly, when the "day" counter 36 produces the "29" output, the AND circuit 39e is enabled so that the date counting is changed from "February 29" to "March 1". At the same time, the AND gate 39c has received the "FEB" signal and the leap year signal. Therefore, when the output of the AND gate 39e is applied through the OR gate 39g to the AND gate 39c, the AND
gate 39c is enabled to provide the "+6" signal to the counter 40.
The result is the indication of the Sunday column in March of the 20 leap year by the indicator 17.
Fig. 8 shows the details of the switching control unit 30 and its associated circuit shown in Fig. 6. In Fig. 8, AND gates 30a to 30c are coupled at the first input terminals with time counting -~
signals of "10 seconds", "minute" and "hour" from the counters 27, 28 and 29, respectively. AND gates 30d to 30f are coupled at the first input terminals with time counting signals of "month", "week"
and "day" from the counters 37 to 38, respectlvely. AND gate 30g is coupled at the first input terminal with the "A/P" signal from the counter 35. AND gate 30h is coupled at the first input terminal 30 with the counting signal from the referential day of the week counter 40. A logic circuit 21 is coupled at one input terminal with the month-end adjusting signal from the month control circuit 39, by means as shown in Fig. 5. The switch unit 31 comprises ., - - . - ~:

~088764 switches Sl and S2 which are actuated in the operation to provide a logical "1" signal. When actuated, logical "1" signals appear on lines Ll and L2, while, when not actuated, such signals appear on lines L3 and L4 via inverters 30j and 30k. The line Ll connected to the switch Sl is connected to the AND gates 30d to 30f. The line connected to the switch S2 is connected to the AND gate 30h and the logic circuit 21. The line L3 connected via the inverter 30j to the switch Sl is connected to the second input terminals of the AND gates 3Oa to 30c, and 30g and the third input terminal of the AND gate 30h. The line L4 connected to the switch S2 via the inverter 30k is connected to the third input terminals of the AND
gates 30a to 30g. In a normal state where both switches Sl and S2 are open as shown in the figure, the AND gates 30a to 30c, and 30g are enabled to select the data necessary for the time display such as "10 seconds", "minute", "second" and "A/P". When only the switch Sl is actuated, the AND gates 30d to 30f are enabled to select the data necessary for date display such as "month", "week"
and "day". When only the switch S2 is actuated, the AND gate 30h is enabled and the logic circuit 21 is actuated so that the referential day of the week signal is selected and the month-end adjusting signal for calendar display is outputted from the logic circuit 21 as described referring to Fig. 5. The outputs of the AND gates 30a, 30d and 30h is connected to OR gate 30Q; the outputs of the AND gates 30b and 30e, to the OR circuit 30m; the outputs of the AND gates 30c and 30f, to OR gate 30n. The outputs of OR
gates 30Q to 30n are connected to decoders 32a to 32c. The decoder 32a is used to select any one of the indicators 17a to 17g for indicating the days of the week. The decoder 32b is used to selectively provide display signals for driving the time display electrodes 14 and 15 for minute. The decoder 32c selectively provides display signals for driving the "hour" display electrodes 12 and 13. The outputs of these decoders are applied via corre-sponding drivers 33a to 33c to the display device 34.

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As described above, auxiliary display portions 18 and 19 are provided for "second" and "week" displays. These display portions are properly and selectively used in accordance with the display mode, as shown in Figs. 2 to 4. The selection of them is carried out by the switching control unit 30 is accordance with the operation of the switch unit 31. More specifically, the outputs of the inverters 30j and 30k are detected by an AND gate 30p and a signal is taken in a normal state where both switches Sl and S2 are not actuated. The signal is applied to an OR circuit 30q, together with the signal on the line L2. The OR circuit 30q provides a display prohibit signal to the "week" display portion 19, through a display control unit 62. When both switches Sl and S2 are actuated, the signals on the lines Ll and L2 are detected by an OR circuit 30r.
Upon detection of the signals, the OR circuit 30r provides a display prohibit signal to the time auxiliary display portion 18, via the display control unit 62. Depending on the signals from the OR
circuits 30q and 30r, the display control unit 62 controls the display of the upper and lower auxiliary display portions 19 and 18 in the display device 34.
More precisely, when both switches Sl and S2 are open, the auxiliary display portion 18 is driven as shown in Fig. 2. When only the switch Sl is actuated, the auxiliary display portion 19 is driven, as in Fig. 3. When only the switch S2 is actuated, both the display portions are not driven, as shown in Figs. 4(A) and 4(B)-With such a construction, in the normal state, the AND gates 30a, 30c and 30g are enabled so that the time display is performed as shown in Fig. 2 by using the time counting signals "hour", ~-"minutes", "10 seconds" and "A/P". When only the switch Sl is actuated, the date display is made as shown in Fig. 3 by using numeral display segments for the time display. When only the switch S2 is actuated, the calendar display is carried out as shown in Fig. 4(A) without using the time display electrodes 12 to 15.

~088764 It is to be noted here that the time and date displays by using numerals and the calendar display are performed by using the same display space of the display device 34. As described above, the segment electrodes 12 to 15 are partly disposed in the spaces defined by the numeral electrodes lla, llb .... Therefore, the segments as display elements may be effectively disposed by using only one set of liquid crystal display members.
Another embodiment of the invention will be given with reference to Figs. 9(A) and 9(B) in which the date display portion 11 and its display control circuit are illustrated in detail. The numeral electrodes as numeral display means for dates "1" to "31"
are constructed by liquid crystal display means, and those except the month end dates "29" to "31" arranged in a matrix of which rows each include seven numeral electrodes corresponding to the days of the week. The numeral electrodes on the same column are commonly connected to be guided to terminals 41a to 41g. Display drive signals are applied via the terminals 41a to 41g to those column electrodes. The numeral electrodes for dates "29" to "31" are connected to terminals 42a to 42c, respectively. The outputs of OR
circuits 43a to 43g shown in Fig. 9(B) are connected to the terminals 41a to 41g and the outputs of OR gates 44a to 44c shown in Fig. 9(B), to the terminals 42a to 42c, respectively.
The outputs of AND gates 45a to 45g and 46a to 46g are applied to the OR gates 43a to 43g, respectively. The outputs of AND
gates 47a to 47c and 48a to 48c are connected to the OR gates 44a to 44c, respectively. A clock signal of lHz is applied to the AND
gates 46a to 46g and 48a to 48g. These AND gates and the OR gates cooperate to form the decoder/driver for the date display portion 11. A month-end adjusting control circuit 60 and a referential day of the week calendar 61 are coupled with the decoder/driver. The month-end adjusting control circuit 60 is comprised of AND gates 49a to 49d to which a gate signal is applied when the switch S2 is actuated. The AND gates 49a to 49d receive at other input terminals 1088~64 "FEB (common year)", "FEs (leap year)", "30 days month" and "31 days month". The outputs of the AND gates 49a to 49d are all coupled with an OR gate 50a. The outputs of the AND gates 49b to 49d are coupled with an OR gate 50b. The outputs of the AND gates 49c and 49d are coupled with an OR gate 50c. In the "31 days month", the AND gate 49d and the OR gates 50a to 50c provide output signals to the decoder/driver. In the "30 days month", the OR gates 50a to 50c provide output signals to the same. In February of the leap year, the OR circuits 50a and 50b provide output signals to the 10 same. In February of the common year, only the OR gate 50a provides an output signal to the same.
The output signal of the OR gate 50a is supplied as a gate signal to the AND gates 45a to 45g. The output signals from the OR
gates 50b and 50c and the AND gate 49d are applied as gate signals to the AND gates 47a to 47c and 48a to 48c.
The referential day of the week counter 61 corresponds to that 40 in Fig. 7, and is provided with seven output lines providing count signals corresponding to the respective columns of the calendar. The seven output lines are coupled with the AND gates 46a to 46g, respectively, and the first three output lines are further coupled with the AND gates 48a to 48c, respectively. The output lines connected to the AND gates 46a to 46g and 48a to 48c are also connected to the AND gates 45a to 45g and 47a to 47g through inverters 51a to 51g and 52a to 52c, respectively.
In the above-mentioned construction, it is unnecessary to use the indicator 17 to indicate Sunday for dates "1" to "31". That is, when the switch S2 is actuated, the date display portion 11 is set up as shown Fig. 10. In this case, when the month is the "31 days" one, actuation of the switch S2 causes the AND gate 49d to produce an output signal and at the same time the OR circuits 50a to 50c produce output signals. For this, the AND gates 45a to 45g, 47a to 47c and 48a to 48c are all enabled to permit display drive signals to be applied to the terminals 41a to 41g, and 42a to 42c. The numeral electrodes of "1" to "31" in the date display portion 11 are all energized.
In the referential day of the week 61, only the output lines corresponding to the "Sunday" in the month is activated to provide logical "1" thereon. Assume now that the logical "1" appears on the second output lines from the head, for example. No gate signal is applied to the AND gates 45b and 47b. On the other hand, the AND gates 46b and 48b are enabled. Accordingly, the second column in the calendar is driven by the lHz clock so that only the second column is flashed as indicated by a broken line in Fig. 10. In this manner, the specified column corresponding to the day of the week, for example, Sunday, is specified.
In the just mentioned example! the specified column is specified by flashing but other columns than the specified one may be flashed. Further, in the above-mentioned examples, the liquid crystal is used as a display means but other suitable means may be used such as LED, cataphoresis, and the like.
The explanation to follow is the case where the invention is applied to an electronic calculator with time counting function, the called multifunction electronic calculator. Fig. 11 shows one form of the displays in this example. Further, in this example, liquid crystal is employed for the display means. In this display designated by 110, a series of numeral or character display members are separately arranged and each of the display members is comprised - of segments Q to r and Dp. The display members are designated by reference numerals 210 to 280, and capable of displaying number up to eight digits. Additionally, numeral electrodes 8a to 8g are disposed in the spaces 320 to 380 each between adjacent numeral display members 210 to 280, in the space 310 on the right side of the display member 210 of the most significant digit and in the space 390 on the left side of the display member 280 of the least significant digit. These spaces will be referred to as digit in-between spaces, for simplicity. More specifically, the numeral .
.

~0~876i4 electrodes 8g representing the dates 1, 8, 15, 22 and 29 are vertically arranged in the digit in-between space 390 to form a column. The seven days starting at each of the column dates 1, 8, 15, 22 and 29 are horizontally arranged in the rest of the digit in-between spaces 380, 370 ... 320 to form a row. In the display in Fig. 11, above the uppermost row of the numeral electrodes for the dates 1 to 7, are horizontally disposed a series of character display members 500a to 500g each representing Sunday SUN. As shown, the character display members 500a to 500g are vertically aligned with the corresponding columns of the numeral electrodes.
Referring now to Figs. 12(A) and 12(B), there are illustrated the structures and connections of first and second electrodes in the display 110. The drive system of the display system in this example is of dynamic drive system of 1/3 duty. Fig. 12(A) shows the structure of one of transparent electrode plates 600 on which first electrodes are formed each being shaped like a numeral 8 and designated by 710 to 780. The first electrodes except the electrode 710 are each comprised of five segmental electrodes 7a to 7e and one dot li}ce electrode 7f for representing a decimal point.
The dot electrode 7f corresponds to the segment Dp in Fig. 11 and is connected to the vertical electrode 7a. First electrodes drive signals a2 to a8 are successively applied to the dot electrodes 7f of the respective digits. The vertical segmental electrodes 7a to 7b are formed by segments m and n in Fig. 11. The horizontal segmental electrodes 7c to 7e of the segments Q, _ and _ are commonly connected. First electrodes drive signals b2 to b8 are successively applied to the vertical electrodes of the respective digits. The vertical segmental electrode 7b of the segments _ and _ of each digit receives one of first electrode drive signal c2 to ~ 30 c8. The first electrode 710 has a connection substantially equal ; to that of other first electrodes 720 to 780. One of the vertical electrodes is divided into two parts; one is an electrode 7bl corresponding to the segment q and the other is an electrode 7b2 .

corresponding to the segment _. The reason why it is divided is to avoid its intersecting the wiring of second electrodes to be described later. The partitioned electrodes 7bl and 7b2 are connected at the place outside the visual region of the display 110 and receives there a first electrode signal cl. The other electrodes 7a, 7c to 7f of the first electrode 710 are the same as those of the other first electrodes 720 to 780 in the structure and the connection. The vertical segmental electrode 7a is connected to the dot like electrode 7f for a decimal point to which a first electrode drive signal al is applied. The vertical segmental electrodes 7c, 7d and 7e are connected together to which a first electrode drive signal bl is applied.
As previously stated, numeral electrodes representing the dates "1" to "31" are disposed in the digit in-between spaces 330 to 390 with an arrangement of a matrix. Those numeral electrodes are commonly connected and coupled with the partitioned electrode 7bl of the first electrode 710 to which the first electrode drive signal cl is applied. First electrodes 500a to 500g for representing Sunday denoted as SUN which are disposed above the uppermost numeral electrodes of the respective columns, as stated above, are each connected to the vertical segmental electrode 7b of each first electrode 720 to 780 which is positioned at the right lower side of the corresponding SUN electrode, as viewed in the drawing. The first electrode drive signals c2 to c8 are successively applied to the vertical segmental electrodes 7b of the respective digits which are connected to the corresponding first electrodes 500a to 500g.
Fig. 12(B) illustrates the structure of the other transparent electrode 70Q of the display 110. On the transparent electrode 700 are formed second electrodes 810 to 880 shaped like numeral 8 which are disposed correspondingly opposite to the first electrodes 710 to 780, respectively. The second electrodes other than the one 810 are each comprised of three segmental electrodes 110a to 110c and a dot like electrode llOd for a decimal point. The segmental electrode llOa corresponds to the coupled segments Q and m of the display member 210 in Fig. 11; the segmental electrode llOb to the coupled segments _, r and q; the segmental electrode llOc to the coupled segments _ and p. the second electrode 810 has segmental electrodes similar in shape to those llOc and llOd of the other second electrodes and segmental electrodes llOe and llOf different in shape from those llOa and llOb. The segmental electrode llOe corresponds to the coupled segments Q, m and _ and the electrode llOf, to the coupled segments m and r. Second electrodes 120a to 120g for date display are disposed in the spaces between adjacent second electrodes 820 and 830, 830 and 840, ... 870 and 880, and on the left side of the electrode 880. These spaces correspond to the digit in-between spaces in Fig. 11. The second electrodes 12Oa to 120g are disposed correspondingly opposite to the corresponding numeral electrodes 8a to 8g. Second electrodes 130a to 130g are disposed above the corresponding electrodes 120a to 120g and opposite to the first electrodes 500a to 500g in Fig. 12(A). As shown, the segmental electrodes llOa of the second Plectrodes 820 to 880, the segmental electrode llOe of the second electrode 810, and all the second electrodes 130a to 130g for SUN representation are all connected commonly and led to a terminal 140a on the transparent electrode 700. The terminal 140a is connected via a lead wire (not shown) to a terminal 140b provided on the transparent electrode 600. A second electrode drive signal X is applied to the terminals. The segmental electrode llOf of the second electrode 810, the segmental electrodes llOb of the other electrodes 820 to 880, and the date display electrodes 120a to 120g are all connected in series and led to a terminal 150a on the transparent electrode plate 700. The terminal 150a is connected via a lead wire (not shown) to a terminal 150b on the other transparent electrode plate 600. A second electrode drive signal Y is applied to the terminals connected. The segmental electrodes llOc of the 108876~

electrodes 810 to 880 and the dot like electrodes llOd corresponding to the segments Dp in Fig. 11 are all connected commonly and led to a terminal 160a on the plate 700. The terminal 160a is connected via a lead wire (not shown) to a terminal 160b on the other plate 600. Another second electrode drive signal Z is applied to the terminals connected. The segmental electrode llOb of the second electrode 820 and the segmental electrode llOf of the second electrode 810 are connected at the place outside the visual region of the display as in the connection of the partitioned electrodes 7bl and 7b2, in order to prevent appearance of abnormal display due to its crossing with the wiring of the electrodes 7bl and 7b2 f the first electrode 710. Additionally, the electrodes 7a to 7g, the numeral electrodes 8a to 8g, and the first electrodes 500a to 500g, the segmental electrodes llOa to llOf, the date display electrodes 120a to 120g, and the second electrodes 130a to 130g must be wired so as not to cross one another for preventing the abnormal display. For obtaining a desired display by using thus constructed display device, suitable voltages are selectively applied to the electrodes on the transparent electrode plates 600 and 700, such as the first electrodes 710 to 780, numeral electrodes 8a to 8g, electrodes 500a to 500g and the second electrodes 810 to 880, electrodes 120a to 120g and electrodes 130a to 130g.
Figs. 13(A) and 13(B) illustrate the relation between the ~ -first electrode drive signals a, _ and c and the second electrode drive signals X, Y and Z when numerals, decimal point and calendar data at the first and second to eighth digits are displayed. For -example, when numeral "1" is displayed, the first electrode drive signal _ is applied at the timing of the second electrode drive signals X, Y and Z in all digits, first to eighth digits. When numeral "8" is displayed, the first electrode drive signals a, _ and c must be applied at the timing of the second electrode drive signal X application in the first digit, as shown in Fig. 13(A).

.
.:

~0887~

Further, the first electrode drive signals _ and _ must be applied at the timing of the application of the second electrode drive signal Y, and the first electrode drive signals _ and c must be applied at the timing of the application of the second electrode drive signal Z. In the second to eighth digits, the first electrodes drive signals a and _ must be applied at the timing of the second electrode drive signal X; the first electrode drive signals _, and _, at the timing of the second electrode drive signal Y; the first electrode drive signals _ and c, at the timing of the second electrode drive signal Z, as shown in Fig. 13(B). As seen from the above, there are some difference of the drive signal combination in the first and the second and eighth digits for the same numeral or character display. The numerals other than the above-mentioned ones and the decimal point may be displayed by properly applying the first electrode drive signals at the timings of the second electrode drive signals X, Y and Z, as shown in Figs. 13(A) and 13(B).
In order to drive the numeral electrodes 8a to 8g for the ; dates "1" to "31", the first electrode drive signal c must be applied at the timing of the second electrode drive signal Y, as shown in Fig. 13(A). At this time, in the first digit, there is no correspondence between the segmental electrode llOf in Fig. 12(B) and the partitioned electrodes 7bl and 7b2 in Fig. 12(A). Therefore, nothing is displayed. However, there is produced a potential difference between numeral electrodes 8a to 8g connected to the partitioned electrode 7bl to which the first electrode drive signal cl is applied via the applied via the electrode 7b2 and the second electrodes 120a to 120g for the date display. See Figs. 12(A) and 12(B). As a result, the dates "1" to "31" are displayed.
When the SUN electrodes 500a to 500g are displayed, the first electrode drive signal c must be applied at the timing of the second electrode drive signal X. That is, there is no corre-spondence between segmental electrodes llOa and 7b in the second to 10~76~

eighth digits. This causes nothing to be displayed. However, there is produced a given potential difference between the electrodes 500a to 500g connected to the vertical electrodes 7b of the first electrodes 720 to 780 to which the first electrode drive signals c2 to c8 are applied and the second electrodes 130a to 130g to which the second electrode drive signal X is applied. As a result, the SUN electrodes 500a to 500g are driven.
Fig. 14 shows a block diagram of an electronic calculator with time counting function. In the figure, a control unit 141 for controlling the respective portions of the calculator includes an ROM (random access memory) portion 141a for fixedly storing micro-programs and an address portion 141b for addressing the ROM portion 141a. An RAM (random access memory) 142 includes a first area 142a for storing time counting data or calendar data, a second area 142b having an accumulator register and the like for arithmetic operation, a third area 142c having registers for storing other various data.
The data read out of the RAM 142 is fed to an operation/decision section 143 where it is properly processed and again fed to the RAM 142. An address controller 144 specifies the column address (called digit designation) to the RAM 142, and controls the column address to the RAM 142 depending on a single column address -outputted from the ROM portion 141a or the processing initiation/end column address. An instruction decoder 145 decodes an instruction outputted from the ROM portion 141a and produces a control signal "OP" to the respective circuits, a read/write indication signal R/W
to the RAM 142, a control signal to an address controller 144, and a display signal D to a display relating circuit to be described ; later. In addition to the signals to the address controller 145 and the instruction decoder 145, the ROM 141a produces a signal for specifying the column address to the RAM 142 and numeral codes for arithmetic operation, flag codes and the like to the operation/decision circuit 143. A timing signal generator 146 /~6~
includes an oscillation section ~4~b for generating a reference 101~7~;4 frequency for time counting and a clock signal for operating the respective portions and a timing signal generating section 146b for producing various kinds of timing signals from the output of the oscillation section 146a. The output of the oscillation section 146a is applied to the instruction decoder 145 and to other respective portions. The reference frequency signal outputted from G ~
the oscillation section ~4~ is fed to a frequency divider 147a for obtaining one second interval signal, for example. The output of the frequency divider 147a is applied to a latch circuit 147b where the output is latched. The frequency divider 147a and the latch circuit 147b form a time counting signal generator 147. The output of the time counting signal generator 147 is applied to the address section 141b of the control unit 141. A key input unit 148 is provided with various keys such as function keys, and other keys for controlling the time counting or calendar function and other necessary keys. The output of the key input unit 148 is applied to the address section 141b. The key input unit 148 is provided with a "CAL" (calendar display) as a key for controlling a calendar function. To the address section 141b of the control section 141 are applied the outputs of the time counting signal generating section 147 and the key input unit 148 and a branch signal of

2 bits from the operation/decision section 143.
The display processing circuit 149 converts the data fed through the operation/decision section 143 into display data. The display processing circuit 149 includes a decoder 149a for decoding applied data (BCD code) into 0 to 9 and 10 and a segment encoder 149b for encoding the output of the decoder 149a into the segment signals Q, m, _ ... ~. The circuit 149 operates responsive to the display signal "D" from the instruction decoder 145. The output of the decoder 149a is applied to a display buffer 151a for storing ; the data to select the first electrodes 500a to 500g as shown in Fig. l~(A) for "SUN" display, a display buffer 151b for storing the ' display position of decimal point, and a display buffer 151c for iO88764 storing the display of the calendar data. The output of the segment encoder 149b is applied to eight display buffers 151c, 151d 151k for storing the segments Q to q, These display buffers 151a to 151k are controlled by a write-in control circuit 152 which receives the address data outputted from the address controller 144 and the signal outputted from the timing signal generator 146 to produce write-in clock signals. The output signals of these buffers 151a to 151k are applied to a first electrode drive signal generator 153 which produces first electrode drive signals al to a8, bl to b8, and cl to c8, and combined properly. The output of the first electrode drive signal generator 153 is applied via a first electrode drive circuit 154 to a display devlce 156 where it drives the various electrodes as mentioned referring to Figs. 12(A).
A second electrode drive circuit 154 produces second electrode drive signals X, Y and Z which are in turn applied to a first --~
electrode drive signal generating circuit 153. The second electrode drive signal SDS is applied to a display device 156 where it drives the electrodes llOa to lllf, numeral electrodes 120a to 120g and electrodes 130a to 130g.
Figs. 15(A) and 15(B) show the details of a display processing circuit 149, display buffers 151a to 151k, write-in control circuit 152 and first electrode group drive signal generator 152. The address decoder 152 includes a decoder 152a for decoding the address c data fed from the address controller 144 and AND gates 152bl to 152bll which are coupled at one input terminals with the decoder lines and at the other input terminals with the timing signals outputted from the timing generator 146. The output of the AND -gate 152bl is applied as a clock signal ~S to the display buffer 151d. The output of the AND gate 152b2 is applied as a write-in clock signal ~D8 to the display buffer 151d. Similarly, the outputs ~Dl~ ~C of the AND gates 152blo and 152bll are applied to the display buffers 151k and 151c, respectively. In Figs. 15(A) and 15(B), the display buffer 151b for storing the display position ~088764 of the decimal point and the AND gate 152b2 are omitted but the connection of them are similar to that of the above-mentioned ones.
The outputs 0 to 6 of the decoder 149a of the display processing circuit 149 are the display buffer 151a comprising seven flip-flops (not shown) and the output 10 is applied to the display buffer 151c including a single flip-flop. The outputs of the segment encoder 149b are outputted in the order of m, _, Q, r, _, q and _ and coupled with the display buffers 151a, 151d to 151k each including seven flip-flops. The seven bits outputs of each of the buffers 151a, 151d to 151k and one bit output of the buffer 151c are coupled with first electrode group signal generator 153 where they are properly combined. The outputs corresponding to the segments m and _ of the seven bits outputs of each display buffers 151d to 151j for storing the display data in second to eighth digits are outputted through transfer gates 153jl, 153j2 ... 153dl, 153d2 to which the second electrode drive signals X and Y and the output signals are commonly coupled each display buffer 151j to 151d and outputted as a2 a8 The outputs corresponding to the segments Q, _ and _ are outputted through transfer gates 153j3, 153j4, 153j5 .... 153d3, 153d4, 153d5 to which the second electrode drive signals X, Y and Z are applied, and the output signals are commonly coupled each display buffer 151j to 151d and outputted as b2 to b8. The outputs corresponding to the segments q and _ are commonly coupled through transfer gates 153j6, 153j7 ... 153d6, 153d7 to which the second electrode drive signals Y and Z are applied and outputted from the display buffers 151j to 151d as c2 to c8.
The outputs corresponding to the segments m and _ of the display buffer 151k for storing the first digit display data are -~ outputted through transfer gates 153kl and 153k2 to which the second electrode drive signals X and Y are applied and the outputs are commonly coupled and outputted as a first electrode drive signal al. The outputs corresponding to the segments Q, and c are outputted through transfer gates 153k3, 153k4 and 153k5 to ` 1088764 which second electrode drive signals X, Y and Z are applied and the outputs are coupled commonly and outputted as a first electrode drive signal bl. The outputs corresponding to the segments q and _ are outputted through transfer gates 153k6 and 153k7 to which the second electrode drive signals X and Z are applied and the outputs are commonly coupled and outputted as a first electrode drive signal cl.
The seven bits outputs of the display buffer 151a for storing the day of the week data are outputted through transfer gates 153 to 153a7 to which the second electrode drive signal X is applied.
The output of the flip-flop connected to a data line "0" of the transfer gate 153al is connected to the common output of the transfer gates 153d6 and 153d7, i.e. the line of the first electrode drive signal c8. In a similar manner, the outputs of the transfer gates 153a2 to 153a7 are coupled with lines of the first electrode drive signals c2 to C7, respectively. The output of the display buffer 151c for storing the calendar data is connected via a transfer gate 153 to which the timing of the second electrode drive signal Y is applied, to the common output of the transfer gates 153k6 and 153k7, i.e. the first electrode drive signal cl line.
Fig. 16 shows the register structure of an A register in the third area 142c of the RAM 142 shown in Fig. 14. As seen from the figure, the first to eighth digits (Ao to A7) stores numerical data. The 9th digit (A8) stores decimal point. The 10th digit (Ag) stores the days of a week corresponding to the 1st day of a month in which "0 to 9" are assigned for the days of a week; for example, "0" is assigned for Sunday and "6" for Saturday. The 11th digit (Alo) stores a flag for calendar data.
Let us consider the operation to make a display of "March in 1976" on the device with the above-mentioned construction. Fig. 17 is a flow chart for illustrating the operation of the calendar display. Proper keys on the key input unit 148 shown in Fig. 14 are first depressed to input "1976" of year and "3" of month. The .,~ .

10~876q~

inputted data are written into a given register of the second area 142b of the RAM 142. After completion of this input operation, the controller 142 advances to a process A to calculate "month, day, year ~ date". In preparation for this, the date "1" is added to "1976, 3" stored therein to obtain "1976, 3, 1". Then, the controller outputs a series of instructions for calculating the days from a virtual reference day (March 1, 0 A.D.) of the "1976,

3, 1". And the following calculation will be executed by using the respective registers in the second area 142b of the RAM 142.
If b ~ 3 365.25xa+30.6x(b-3)+c ---- (1) If b < 3 365.25x(a-1)+30.6x(b+9)+c ..... (2) where a=Anno Domini, b=month, c=day.
The days from the virtual reference day of the "1976, 3, 1" is calculated by using the equation (1). The result of the calculation is "721735". This is loaded into a given register in the second area 142b of the RAM 142. Then, a process B is executed. In the process B, the days calculated from the reference day is divided by 20 "7" and the day of a week is calculated by using the remainder and correction is made of a departure of the day of the week due to the fact that the days calculated from the virtual reference day is "1". Firstly, the calculation to obtain the remainder when the "721735" is divided by "7", under control of a series of instructions given from the ROM 141a and through the second area 142b and the operation/decision unit 143. The result of it is Quotient ...... 103105 Remainder ..... 0 After obtaining of the remainder "0", the correction of the day of 30 the week will be executed. The virtual reference day is assumed to be Sunday. When the days of the week, Sunday to Saturday, are expressed by "0" to "6", "1" is added to "0" of the remainder since the departure is "1". As a result, the data for the day of the . . .

week is "1" which in turn is loaded into the 10th digit (Ag) of the register A in the third area 142c of the RAM 142. Then, a process step C is executed. In this step, the contents of the Ag is loaded into the display buffer 151a via the display processing circuit 199. The address controller 144 specifies the column address "9" and at the same time to select the control circuit 152 to which the "9" is loaded. At this time, the write-in control circuit 152 has received the display signal D from the instruction decoder 145. Accordingly, the decoder 152a decodes the column 10 address "9" selected from the address controller 144 to enable the AND gate 152bl to produce the clock signal ~S as shown in Fig. 10.
The data "1" being stored in the Ag which is fed to the display processing circuit 149 via the operation/decision section 143, is decoded by the decoder 149a. The decoded signal is applied to the ; display buffer 151a. Therefore, the display buffer 151a is controlled by the write-in clock outputted from the write-in control circuit 152 to have the contents "0100000" from above, as shown in Fig. 18. Then, the process advances a step D where a flag code "10" is loaded into the flag digit (Alo) of the A register for directing the calendar display. The process further advances a step E. The loading of the code "lO'i is conducted through an operation that the code "10" outputted from the ROM 141a is applied to the RAM 142 via the operation/decision section 143. In the step E, the flag code "10" loaded into the 11th digit (Alo) of the register A included in the third area 142c in the RAM 142 is set in the display buffer 151c via the display processing circuit 149. At this time, the address controller 144 outputs the flat code "10", and the decoder 152a of the write-in control circuit 152 enables the AND gate 152bll after decoding the code "10", thereby to produce the write-in clock signal ~C The contents "10" of the digit Alo read out from the third area 142c of the RAM 142 is applied to the display processing circuit 149 via the ; - operation/decision section 143 where it is decoded by a decoder 149a.

''' ~ ' . ~ , .
,: . , . . . .. - ~ : -iO~87~;4 As a result of the decoding, the decoder produces outputs at the output lines corresponding to the code "10" which are then set in the display buffer 151c as shown in Fig. 18, with its contents of "1". Accordingly, when the data of month and year are inputted from the key input unit 148 in Fig. 14, it passes through processes A and B or the steps C to E. As a result, the data corresponding to the day of a week corresponding to the first day of the month is loaded into the display buffer 151a and the "1" representing the calendar data is loaded into the display buffer 151c. Then, the operation shifts to the display process where the calendar data is displayed. In this example, the display system is of dynamic drive type of 1/3 duty. Accordingly, the second electrode drive signals X, Y and Z are repeatedly produced so that a desired display is performed depending on the memory contents of the display buffers 151a to 151k at the respective timings. At present, the contents of the buffers 151a to 151k is as shown in Fig. 18. Accordingly, the "1" outputted through the transfer gate 153a2 at the timing of the second electrode drive signal X is outputted as a first electrode drive signal c2 which in turn is applied to the terminal c2 of the display device 156 via the first electrode drive circuit 154. As a consequence, there is produced a given potential between the first electrode 500a and the second electrode 130a to indicate that the column of the date "7, 14, 21, 28" corresponds to Sunday, as seen from Fig. 13(B) and Figs. 12(A) and 12(B). The "1"
outputted through the transfer gate 153c at the timing of the outputting of the signal Y, is outputted as a first electrode drive signal cl which in turn is applied to the terminal cl of the display device 156 via the first electrode drive circuit 156. In the display devicej there is produced a given potential difference between the electrodes 8a to 8g and the second electrodes 120a to 120g thereby to display the "1 to 31". The display obtained at this time is as shown in Fig. 19. In the above description, the week and day data are displayed at the timings of the outputting of the second electrode drive signals X, Y and z. In fact, however, the display in the device 156 is carried out by the effective value during the output periods of the signals X, Y and Z. Also, in the above description, there is no combination at the timing of the second electrode drive signal Z and only the day of a week and day are displayed. However, when the data relating year and month are loaded into the display buffers 151a to 151d, such data may be displayed.
As described above, the example of the invention may auto-matically calculate the day corresponding to Sunday depending on the "year" and "month" and display a calendar as a usual one.
Additionally, a calendar may automatically be displayed by using the time counting function performed by using the first area 142a. As shown in Fig. 14, the one-second interval signal (one-second signal) from the frequency divider 147a for frequency f OSc~ //of, On s~c~, 0,~
dividing the output of the-oscillator 146a, is outputted and the output is set in the latch circuit 147b. The output of the latch circuit 147b is applied as an address modifier signal to the address section 141b of the controller 141. On this application, the process F shown in Fig. 17 starts. In the step, the operation/decision section 143 performs a "+1" operation to the area storing the time counting data in the first area 142a of the RAM 142, and carry operation such as scale-of-60, scale-of-12, scale-of-24, etc. is carried out. Through this processing, if there is no change of day (passing 24 hours), it directly advances other processes such as arithmetic operation or display, and then a -process G. In the process G, when the change of day is detected, one day is added to the area storing the calendar data in the first area 142a of the RAM 142 and it is judged as to the "30 days month", "31 days month", "FEB (common year)" or "EEB (leap year)".
Thus, an operator depresses the calendar display key "CAL" on the input unit 148 with an intention to know the calendar of this month. In this case, the step H reads out from the calendar data storing area in the first area 142a of the RAM 142 only the data of "year" and "month", and then sets the data in the A register in the 3rd area 142c. Then, the above mentioned process and steps A to E
are executed to display the calendar of the month, as in the "March, 1976" case.
It will be seen from the foregoing that the calendar of the month may be automatically be displayed by incorporating the example of the invention into the time counting device.
In the above example, the numeral electrodes 8a to 8g are partly disposed in the spaces between adjacent display members 210 to 280. However, an arrangement of numeral electrodes 8a to 8g for calendar display as shown in Fig. 20 is possible. In the figure, two numeral electrodes are vertically disposed one above another in each space defined by four segments and a single numeral electrode is disposed under the bottom of each of the display members 260 to 280. Alternately, a display shown in Fig. 21 is also permitted.
In this example, the numeral electrodes 8a to 8g are disposed in the digit in-between spaces 390 to 360 and the spaces formed in the display members 260 to 280.
When it is desired to obtain the calendar of the preceding or succeeding month, it is obtainable merely by changing the data in the month now used. Such is easily realized through the key operation of a given key on the key input unit.
As described above, when the invention is applied to the desk top electronic calculator with time counting function, there is no ; need for any special circuit for the calendar display and a remarkable enlargement of the display surface.
The display device of the invention may be applied for desk top electronic calculators without time counting function and usual digital electronic clocks and the like, in addition to the electronic calculator with time counting function.
In the above-described examples, the numeral electrodes for calendar display are disposed on the higher digit side of the - : :

10t~87~;4 display members for time display; however, the disposition of them is not limited to such disposition. Essentially, it is necessary that at least a part of the calendar display members is disposed in the digit in-between spaces of the time display members.
"SUN" representing the day of a week disposed above the calendar display members may be replaced by decimal point, for example.

:,

Claims (30)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. An electronic display device comprising:
a digital display portion having a plurality of segmental display members which are arranged such that each segmental display member digitally displays a numeral by using segments, the segments of said segmental display members being arranged to define a plurality of spaces between segments;
and a calendar display portion having numeral display members 1 to 31 for displaying dates of one month arranged in plural rows and plural columns, at least some of said numeral display members being disposed in the spaces defined by the segments of said digital display portion.

2. An electronic display device according to claim 1, in which said numeral display members for date display are arranged in seven columns.

3. An electronic display device according to claim 1, in which said numeral display members for date display are disposed in the spaces between adjacent digits of said segmental display members.

4. An electronic display device according to claim 1, in which said numeral display members for date display are disposed in the spaces in said segmental display members.

5. An electronic display device according to claim 1, in which said numeral display members for date display are disposed in the spaces between adjacent digits of said segmental display members and in the spaces in said segmental display members.

6. An electronic display device according to claim 4, in which a plurality of said numeral display members for date display are disposed in a single space in said segmental display member.

7. An electronic display device according to claim 1, in which said calendar display portion has numerals 1 to 31 for one month dates arranged in five rows and seven columns.

8. An electronic display device according to claim 1, in which said calendar display portion has numerals 1 to 31 for one month dates arranged in three rows and fourteen columns.

9. An electronic display device according to claim 1, in which said calendar display portion further includes indicators, each indicator indicating the column corresponding to the specified day of the week.

10. An electronic display device according to claim 1, comprising a single input terminal to which said numeral display members for date display are all commonly connected.

11. An electronic display device according to claim 1, in which said numeral display members for date display are commonly connected in each column.

12. An electronic display device according to claim 1, in which said numeral display members for date display are provided with corresponding input terminals, respectively.

13. An electronic display device according to claim 1, comprising an input terminal to which the numerals 1 to 28 of said numeral display members for date display are commonly connected; and wherein the numerals 29, 30 and 31 have corresponding input terminals, respectively.

14. An electronic display device according to claim 1, further comprising:
control means to obtain at least time data including at least "hour" and "minutes" as a function of a reference clock sig-nal and the date for indicating the column corresponding to a specified day of a week in said calendar display portion;
means for displaying the time data from said control means in said digital display portion in a normal state;
operation instruction means for providing a display instruction to said calendar display portion; and display control means coupled to said operation instruction means and to said control means for actuating said calendar display portion in response to a display instruction from said operation instruction means and for indicating the column corresponding to the specified day of a week in response to the data of the specified day of the week column fed from said control means.

15. An electronic display device according to claim 14, comprising a single input terminal to which said numeral display members for date display of 1 to 31 are all commonly connected.

16. An electronic display device according to claim 14, comprising an input terminal to which the numerals 1 to 28 of said numeral display members for date display are commonly connected; and wherein the numerals 29, 30 and 31 have corresponding input terminals, respectively.

17. An electronic display device according to claim 14, in which said numeral display members for date display in said calendar display portion are commonly connected in each column.

18. An electronic display device according to claim 14, in which numerals 29, 30 and 31 of said numeral display members have corresponding input terminals, respectively, and the numerals 1 to 28 are commonly connected in each column and coupled to a single input terminal.

19. An electronic display device according to claim 14, in which said calendar display portion includes a plurality of indicators, each associated with a respective one of said columns; and said display control means includes means for actuating at least one of said indicators for indicating the column corresponding to the specified day of a week in said calendar display portion.

20. An electronic display device according to claim 14, in which said display control means includes means for providing a flash instruction signal for flashing said numeral display members for date display belonging to the column of the specified day of a week.

21. An electronic display device according to claim 14, in which said numeral display members for date display are commonly connected in each column to corresponding input terminals, respectively, and means is provided to provide a flash control signal to said input terminals for flashing the numerals in the column containing the specified day of a week in response to a display instruction signal from said display control means.

22. An electronic display device according to claim 18 or 20, in which said control means includes means for obtaining the "month" data; and means responsive to said "month" data for supplying a display instruction control signal to the input terminals of the numerals 29, 30 and 31 as a function of said "month" data.

23. An electronic display device according to claim 1, further comprising:
control means to obtain at least time data including at least "hour" and "minutes" as a function of a reference clock signal and the data for indicating the column corresponding to a specified day of a week in said calendar display portion;
means for constantly supplying said time data from said control means to said segmental display members and for constantly actuating said calendar display portion; and display control means coupled to said control means for indicating the specified day of a week column in said calendar display portion in response to the data indicating the specified day of the week column from said control means.

24. An electronic display device according to claim 23, in which said control means includes means for obtaining the "month" data; said numeral display members for date display of at least 29, 30 and 31 have individual input terminals, respectively; and further comprising means coupled to said control means for applying a display instruction signal which is a function of said "month" data to selected ones of said input terminals of said 29, 30 and 31 numeral display members of said date display.

25. An electronic display device according to claim 8, further comprising:
control means to obtain at least time data including at least "hours" and "minutes" as a function of a reference clock signal and the date for indicating the column corresponding to a specified day of a week in said calendar display portion (at this time, said calendar display portion is not actuated);
means for displaying the time data from said control means in said digital display portion in a normal state;

operation instruction means for providing a display instruction to said calendar display portion; and display control means coupled to said operation instructions means and to said control means for actuating said calendar display portion in response to a display instruction from said operation instruction means, for indicating the column corresponding to the specified day of a week in response to the data of the specified day of the week column fed from said control means and for digitally displaying the "month"
information from said control means by means of said segmental display members in said digital display portion.

26. An electronic display device according to claim 25, further comprising means for digitally displaying the date data from said control means in response to a display instruction from said operation instruction means.

27. An electronic display device according to claim 1, in which the display device is a liquid crystal display device.

28. An electronic display device according to claim 1, in which said numeral display members for date display are arranged in fourteen columns.

29. An electronic display device according to claim 1, in which said display device is a part of an electronic wrist watch.

30. An electronic display device according to claim 1, in which said display device is a part of an electronic calculator.