GB1585889A - Load current representation circuits - Google Patents

Description

(54) IMPROVEMENTS IN LOAD CURRENT REPRESENTATION CIRCUITS (71) We, GENERAL ELECTRIC COMPANY, a corporation organized and existing under the laws of the State of New York, United States of America, of 1 River Road, Schenectady 12305, State of New York, United States of America, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement:- The present invention relates to circuits which provide an isolated representation of the current supplied to a load from a source.

There are many instances in which it is desired to measure or determine accurately the amount and/or nature of the current which is supplied to a load from a source.

For example, in the motor control discipline, it is quite often desirable to cevelop a feedback signal which is proportional to and representative of the motor armature current.

The uses for such feedback signals are well known and include such functions as providing current limiting and effecting a system shutdown if the motor current exceeds certain bounds. Such signals are also used for compensation for IR drop in a speed control system and for basic current regulation all in a manner well known in the art.

There are many circuits known to perform this general function, perhaps the simplest of which is a resistor connected in series with the power supply and the motor. A suitable sensing means to sense the voltage across the resistor provides an output signal which represents the armature or load current. It is also known to be advantageous, in certain instances, to isolate the feedback signal from the main power circuit by such means as transformers, light isolation, and the like.

known circuits of this nature, however, generally suffer from one of two basic problems; that is, they are normally either inaccurate or, if accurate, extremely expensive to build and maintain.

The present invention accordingly provides a circuit for providing a signal representative of the current supplied to a load from a power source comprising: means to provide a voltage proportional to the magnitude of said load current; a transfer having a primary winding and a secondary winding; means including a first switching means to connect said primary winding across said first recited means whereby said voltage produces a current in said primary winding to thereby induce a voltage in said secondary winding; á sample-and-hold circuit including second switching means; means for connecting said secondary winding to said sample-and-hold circuit means to effect simultaneous operation of said switching means; and, means connected to said sample-and-hold circuit to deliver said signal representative of said load current.

Thus, the circuit utilizes synchronously operated switches in both the primary and secondary circuits of an isolation transformer. When the switches are closed, the primary of the transformer is supplied with a signal representative of or proportional to the load current to thereby induce, in the secondary circuit, a signal which is passed through the secondary circuit switch to a sample-and-hold circuit. The output of the sample-and-hold circuit is an accurate representative of the load current.

The invention will become more readily apparent from the following description of a preferred embodiment thereof shown, by way of example, in the accompanying drawings, in which: Fig. 1 is a schematic drawing, partially in block form, illustrating the present invention in its more basic form; and, Fig. 2 is a schematic drawing illustrating the present invention in its preferred embodiment as applied to the generation of a feedback signal proportional to the armature current of a d.c. motor.

Referring now to Fig. 1, there is shown the circuit of the present invention in its basic form. As illustrated, an electrical power supply 10, which as will be more fully understood as this discussion proceeds may be either an a.c. power supply or a d.c. power supply, furnishes a load current 1L by means of suitable conductors 11 and 12 to a load 14.

Disposed within the load circuit is a suitable means 16 for developing a voltage signal proportional to the load current. In its simplest and most representative form, device 16 comprises a simple low resistance shunt, such as an ammeter shunt, to provide a low voltage signal across its output terminals 15 and 17.

This low voltage signal is applied to a primary winding 20 of a pulse transformer shown generally at 18 by way of a switching means 24 which switch is periodically opened and closed as will be more fully described hereinafter. When the switch 24 is closed, the voltage across the shunt terminals 15 and 17 will cause a current to flow in the primary winding 20 to thereby induce, in a secondary winding 22 of the transformer 18, a voltage signal representative of the current in the primary circuit. The secondary winding 22 is connected to a sample-and-hold circuit including second switching means 28 and a sample-and-hold device 26 the output of which is designated V0 and which is an accurate representation of the load current IL.

Switches 24 and 28 are simultaneously actuated, as diagrammatically illustrated in Fig. 1, by an actuator 30 which is connected to the switches by the dashed lines 25 and 29, respectively.

The exact nature of the switches 24 and 28 is not highly critical to the present invention excepting that they must exhibit certain characteristics in order not to degrade the overall performance of the circuit of the present invention. Specifically, the switches should not exhibit any appreciable voltage drop and they should be capable of operation, without creating any line disturbances, at a repetition rate higher than the frequency of the power supply 10. Experience has shown that the operational frequency of the switches 24 and 28 is preferably at least 10 times as high as the frequency of any basic frequency or ripple within the load circuit in order that the output signal of the sample-and-hold device 26 is not seriously degraded. It has been found that repetition rates less than this tend to cause a phase shift in the output signal V0 with respect to the actual load current such that the output signal is not an accurate representation of the load current. In addition, if the load current is of the alternating current variety, the switches 24 and 28 must be bidirectional. As such, while it is theoretically possible to use mechanical switches for the switches means 24 and 28, in a more practical sense and particularly where a.c. is involved, bidirectional semiconductor switches are preferred as will be evident from the description which follows with respect to Fig. 2. It has been found that field effect transistors (FET) give very satisfactory performance as the switching means.

While it is believed that the operation of the Fig. 1 circuit can be understood from the previous description, the operation may be briefly summarized as follows. The load current 1L through the shunt 16 produces a voltage signal across the terminals 15 and 17 thereof and this voltage signal, upon the closure of the switch 24, causes a current to flow in the primary winding 20 which in turn induces a voltage across the secondary winding 22. Switch 28 is closed simultaneously with switch 24 such that the voltage signal appearing across the winding 22 is applied to the sample-and-hold circuit including device 26 which may be any of those well known in the art. The output of that sampleand-hold device serves as the output V0 which is a representation of the load current IL.

Fig. 2 depicts the present invention in its preferred embodiment as applied to the generation of a feedback signal representative of the armature current of a d.c. motor. As shown in Fig. 2, a d.c. power supply 32, which may be of any suitable type such as batteries or any of the well-known a.c. to d.c.

power conversion units, supplies a current 1A to the armature of a d.c. motor 34. Suitable means 36 are included within the power supply/motor circuit to provide a voltage which is proportional to the load current. As was the case in Fig. 1, the means 36 may be at simple shunt device such as an ammeter shunt whereby there appears, between terminals 35 and 37 of the means 36, a voltage which is representative of the current 1A The voltage appearing at terminals 35 and 37 is applied by way of a suitable switching means, shown as a FET 38, and a resistor 40 to the primary winding 45 of a transformer 44. FET 38, in accordance with standard terminology, has three terminals designated, respectively, gate (G), source (S) and drain (D). Resistor 40 is included within the circuit showing not as an essential part but for the purpose of completeness. Resistor 40 serves as what may be termed a "swamping" resistor and as such will have a very high resistance as compared to any resistance of the switching device 38.

Preferably resistor 40 has a nearly zero temperature coefficient whereby any changes in the resistance of the device 38 due to temperature, component ageing, etc., will be inconsequential or "swamped" by the value of the resistor 40. For further completeness, Fig. 2 shows a capacitor 42 connected across the terminals 35 and 37. This capacitor is also not critical to the present invention but, as is well understood in the art, serves as a transient suppressor to prevent high frequency transients from reaching the transformer 44.

Similarly, as was discussed with respect to Fig. 1, when the switch device 38 is closed the voltage across terminals 35 and 37 will appear across the primary winding 45 to thereby induce into secondary winding 46 of the transformer 44 a representation of the primary winding current. The secondary winding 46 is connected to a sample-and-hold circuit including a second switching device shown as a FET 48 which is preferably identical to FET 38. The drain terminal of FET 48 is connected to the upper plate of a capacitor 50 which, in the present embodiment, serves as the sample-and-hold device. The other plate of the capacitor 50 is connected to the free end of the secondary winding 46 and also to ground. A resistor 54 is preferably connected in a series circuit including the capacitor 50 and the FET 48 to provide a noninductive discharge path for the capacitor 50.

While it is true that even in the absence of resistor 54 the discharge path will exist for the capacitor 50 by way of the secondary winding 46 when the FET 48 was closed, this path is inductive and might tend to provide a "ringing" within the circuit.

As was the case in Fig. 1, the two switching devices 38 and 48 are under the control of a single actuator shown here as a gate control 54 which simultaneously applies a gating signal to the gate terminal of each of the FET switches. Any suitable gate control may be utilized in the present invention provided that at least the control to gate 38 is of the isolated variety. Preferably, however, this gate control is that which is described in our copending patent application No. 33320/77 (Serial No. 1585890).

The operation of Fig. 2 closely parallels that described with respect to Fig. 1. With the closing of the FET switch 38, the signal between the shunt terminals 35 and 37 is applied to the primary winding 45 and magnetically coupled to the secondary winding 46. In that FET switch 48 is also closed at this time, the voltage across the secondary winding 46 will serve to charge capacitor 50 to the value thereof. After a short period of time, for example 10 to 20 microseconds, both switches 38 and 48 are opened but the capacitor will remain charged to the voltage applied during the period in which the switches were closed. The value of the voltage to which the capacitor is now charged is an accurate representation of the load current which existed while the switches 38 and 40 were closed.

Any suitable means may be utilized to properly employ this signal. In the illustrated embodiment, the signal is shown as being applied to the noninverting input input of an operational amplifier 55 which is connected as a high gain amplifier (typically having a gain of approximately 60) the output of which, V,, is the desired feedback signal.

To provide the requisite gain, amplifier 55 is provided with the parallel combination of a resistor 56 and a capacitor 58 connected between its output and its inverting input which inverting input is further connected by way of a resistor 60 to ground. The values of the resistors 56 and 60 and capacitor 58 will determine the gain of the amplifier and, in the present example of a gain of 60, the resistor 56 will be approximately 60 times as large as resistor 60. The value of capacitor 58 is chosen to provide smoothing of the output of the sample-and-hold circuit but to have minimal phase shift at the frequency of the current 1A Returning to the operation of the basic circuit, when the FET switches are opened, the voltage across the transformer windings reverses to magnetically reset the transformer.

After a period of time, typically about 150 microseconds for the type of pulse transformer which would joe here employed, the transformer voltage is again at zero volts and the FET switches 38 and 48 are again closed and another current "sample" is coupled to the transformer to be stored by the capacitor 50. If the second sample is of a higher voltage than the first, then capacitor 50 will charge to that higher value. If, however, the second sample was of a lower value than the first, then the capacitor 50 will be allowed to discharge by way of resistor 54 as previously described.

Thus it is seen that by periodically sampling the load current in the manner described, the voltage of capacitor 50 will closely follow in waveshape and scaled magnitude the actual armature current supplied to the motor 34.

This voltage, when brought to the desired value by the amplifier; i.e., the signal VO, is an accurate representation of the load (armature) current.

WHAT WE CLAIM IS: 1. A circuit for providing a signal representative of the current supplied to a load from a power source comprising: means to provide a voltage proportional to the magnitude of said load current; a transformer having a primary winding and a secondary winding; means including first switching means to connect said primary winding across said first recited means whereby said voltage produces a current in said primary winding to thereby induce a voltage in said secondary winding; a sample-and-hold circuit including second switching means; means for connecting said secondary winding to said sample-and-hold circuit; means to effect simultaneous operation of said switching means; and, means connected to said sample-and-hold circuit to deliver said signal representative of said load current.

2. A circuit as claimed in claim 1, wherein said first recited means is a shunt in a circuit with said source and said load.

**WARNING** end of DESC field may overlap start of CLMS **.

Claims (9)

**WARNING** start of CLMS field may overlap end of DESC **. Fig. 1, when the switch device 38 is closed the voltage across terminals 35 and 37 will appear across the primary winding 45 to thereby induce into secondary winding 46 of the transformer 44 a representation of the primary winding current. The secondary winding 46 is connected to a sample-and-hold circuit including a second switching device shown as a FET 48 which is preferably identical to FET 38. The drain terminal of FET 48 is connected to the upper plate of a capacitor 50 which, in the present embodiment, serves as the sample-and-hold device. The other plate of the capacitor 50 is connected to the free end of the secondary winding 46 and also to ground. A resistor 54 is preferably connected in a series circuit including the capacitor 50 and the FET 48 to provide a noninductive discharge path for the capacitor 50. While it is true that even in the absence of resistor 54 the discharge path will exist for the capacitor 50 by way of the secondary winding 46 when the FET 48 was closed, this path is inductive and might tend to provide a "ringing" within the circuit. As was the case in Fig. 1, the two switching devices 38 and 48 are under the control of a single actuator shown here as a gate control 54 which simultaneously applies a gating signal to the gate terminal of each of the FET switches. Any suitable gate control may be utilized in the present invention provided that at least the control to gate 38 is of the isolated variety. Preferably, however, this gate control is that which is described in our copending patent application No. 33320/77 (Serial No. 1585890). The operation of Fig. 2 closely parallels that described with respect to Fig. 1. With the closing of the FET switch 38, the signal between the shunt terminals 35 and 37 is applied to the primary winding 45 and magnetically coupled to the secondary winding 46. In that FET switch 48 is also closed at this time, the voltage across the secondary winding 46 will serve to charge capacitor 50 to the value thereof. After a short period of time, for example 10 to 20 microseconds, both switches 38 and 48 are opened but the capacitor will remain charged to the voltage applied during the period in which the switches were closed. The value of the voltage to which the capacitor is now charged is an accurate representation of the load current which existed while the switches 38 and 40 were closed. Any suitable means may be utilized to properly employ this signal. In the illustrated embodiment, the signal is shown as being applied to the noninverting input input of an operational amplifier 55 which is connected as a high gain amplifier (typically having a gain of approximately 60) the output of which, V,, is the desired feedback signal. To provide the requisite gain, amplifier 55 is provided with the parallel combination of a resistor 56 and a capacitor 58 connected between its output and its inverting input which inverting input is further connected by way of a resistor 60 to ground. The values of the resistors 56 and 60 and capacitor 58 will determine the gain of the amplifier and, in the present example of a gain of 60, the resistor 56 will be approximately 60 times as large as resistor 60. The value of capacitor 58 is chosen to provide smoothing of the output of the sample-and-hold circuit but to have minimal phase shift at the frequency of the current 1A Returning to the operation of the basic circuit, when the FET switches are opened, the voltage across the transformer windings reverses to magnetically reset the transformer. After a period of time, typically about 150 microseconds for the type of pulse transformer which would joe here employed, the transformer voltage is again at zero volts and the FET switches 38 and 48 are again closed and another current "sample" is coupled to the transformer to be stored by the capacitor 50. If the second sample is of a higher voltage than the first, then capacitor 50 will charge to that higher value. If, however, the second sample was of a lower value than the first, then the capacitor 50 will be allowed to discharge by way of resistor 54 as previously described. Thus it is seen that by periodically sampling the load current in the manner described, the voltage of capacitor 50 will closely follow in waveshape and scaled magnitude the actual armature current supplied to the motor 34. This voltage, when brought to the desired value by the amplifier; i.e., the signal VO, is an accurate representation of the load (armature) current. WHAT WE CLAIM IS:

1. A circuit for providing a signal representative of the current supplied to a load from a power source comprising: means to provide a voltage proportional to the magnitude of said load current; a transformer having a primary winding and a secondary winding; means including first switching means to connect said primary winding across said first recited means whereby said voltage produces a current in said primary winding to thereby induce a voltage in said secondary winding; a sample-and-hold circuit including second switching means; means for connecting said secondary winding to said sample-and-hold circuit; means to effect simultaneous operation of said switching means; and, means connected to said sample-and-hold circuit to deliver said signal representative of said load current.

2. A circuit as claimed in claim 1, wherein said first recited means is a shunt in a circuit with said source and said load.

3. A circuit as claimed in claim 1 or

claim 2, wherein said switching means are field effect transistors.

4. A circuit as claimed in any one of claims 1 to 3, where said sample-and-hold circuit comprises a capacitor connected in parallel with said secondary winding.

5. A circuit as claimed in claim 4, wherein said capacitor is provided with a discharge path comprising a series circuit including a field effect transistor and a resistor.

6. A circuit as claimed in claim 4, wherein the time said switches are closed is sufficient to allow said capacitor to charge to the value of the induced voltage across said secondary winding and the time the switches are open is sufficient to allow the transformer to reset.

7. A circuit as claimed in any one of the preceding claims, wherein said signal is proportional to the armature current of a d.c motor supplied from a source of power and wherein said first recited means provide a voltage proportional to the magnitude of said armature current.

8. A circuit as claimed in claim 3, wherein said transistors are controlled by a common means.

9. A circuit for providing a signal representative of the current supplied to a load from a power source as claimed in claim 1, substantially as hereinbefore described with reference to and as illustrated in the accompanying drawings.