US3201604A - Timing static device - Google Patents

Description

vAug- 1965 P. J. SCHWANENFLUGEL 3,201,604

TIMING STATIC DEVICE Filed July 9, 1962 I TRANSLATOR LL] (D l O WITNESSES: P I J S hmvsrmfi I cu c wonen uge ATTORNEY United States Patent 3;.tlL6tl-4 TlMlNG STATKC DEVECE Paul J. Schwanentlugel, Beileville, N.J., assignor to Westinghouse Electric Corporation, East Pittsburgh, Pa, a corporation of Pennsylvania Filed July 9, 1962, Sea. No. 293,241 5 Claims. (Cl. 307-883) This invention relates to timing devices and it has particular relation to timing devices employing static components.

For many applications it is desirable to provide a timing device which is energized in accordance with a variable quantity and which introduces a time delay substantially independent of the magnitude of the variable quantity. For example such a timing device may be associated with protective relays employed for protecting an electric transmission line. Under fault conditions the transmission line voltage may drop to a low magnitude and the line current may increase to a large magnitude dependent on the nature and location of the fault. By energizing the timing device in accordance with line current, adequate energization under fault conditions is assured.

In accordance with the invention a capacitor is charged at a rate dependent on the magnitude of a variable quantity such as the line current. The voltage across the capacitor is compared with a reference voltage which varies in magnitude dependent on the line current. A translator is controlled in dependence on the dilference between the voltage across the capacitor and the reference voltage. The translator may be employed in any desired manner, as to operate an alarm, a relay or the trip coil of a circuit breaker. Inasmuch as the rate of voltage increase across the capacitor and the magnitude of the reference voltage both vary similarly in dependence on the line current, the time delay in operation of the translator is independent of the magnitude of the line current.

It is therefore an object of the invention to provide an improved timing device.

It is another object of the invention to provide an improved timing device employing static components.

It is an additional object of the invention to provide an improved timing device which is energized in accordance with the variable quantity and which provides a time delay substantially independent of the magnitude of the variable quantity.

Other objects of the invention will be apparent from the following description taken in conjunction with the accompanying drawing in which:

FIGURE 1 is a schematic view of a timing bodying the invention; and

FIG. 2 is a graphical representation of curves useful in explaining the invention.

FIG. 1 shows a timing tion by a variable quantity. The invention is particularly suitable for association with protective relaysfor the purpose of protecting an electric system. For this reason it will be described as associated with a transmission line having line conductors L1 and L2 designed to transmit single phase alternating current at a power frequency such as 60 cycles per second. A circuit breaker CB may be associated with the transmission line for the purpose of disconnecting portions of the transmission line from each other.

The timing device may be energized in accordance with the voltage of the transmission line. However, as previously explained, this voltage may drop to a very low value upon the occurrence of a fault on the transmission line. The drop in voltage may occur at the very time the operation of the timing device is desired.

device em device designed for energiza- In a preferred embodiment of the invention the timing device is energized in accordance with line current through a current transformer CT which is associated with the line conductor L2. The secondary winding of the current transformer is connected to the primary Winding of a transformer T1. The transformer T1 desirably may have an iron core designed to saturate when the line current reaches a large value.

A direct voltage E0 is derived from the transformer T1 which is dependent on the line current. In the embodiment of FIG. 1 the center tap on the secondary winding of the transformer T1 is connected through a negative bus N to the lower terminal of a load resistor R1. The terminals of this secondary winding are connected respectively through rectifiers D1 and D2 to the upper terminal of the resistor R1. A capacitor C1 is connected across the load resistor R1 to filter the output of the rectifiers.

For the purpose of providing protection for components of the timing device, a non-linear resistor NR is connected across the secondary winding of the transformer T1. This non-linear resistor has a resistance which varies inversely with current flowing through the resistor. Such a resistor is known as a van'stor.

The voltage across the resistor R1 is employed for charging a capacitor C through a circuit which may be traced from the upper terminal of the resistor R1 through a switch SW, an adjustable resistor R the primary wind ing of a transformer T2 and the capacitor C to the lower terminal of the resistor R1. The charging rate may be adjusted by adjustment of the resistor R At the start of each timing cycle it is desirable that the capacitor C be in a discharged condition. Preferably the increase in current through the primary winding of the transformer T2 following the closure of the switch SW is employed for discharging the capacitor C The discharge of the capacitor C is effected through the emitter and collector of a transistor TRl. The base of this transistor is connected to the emitter through the secondary winding of the transformer T2. Conventional polarity markings for the windings of the transformer T2 are shown in FIG. 1. Preferably the transformer T2 is a mutual reactor. The transistor TRl may be of any suitable type, a transistor of the p-n-p type being illustrated.

When the switch SW is closed eration, the increase in current through the primary winding of the transformer T2 produces a pulse in the secondary winding of proper polarity to turn on the transistor TR1. This results in the discharge of the capacitor C This discharge of the capacitor assists in removing any residual voltage present in the capacitor and thus assures a uniform time delay measurement. When the current through the primary winding of the transformer T2 passes its peak value, this current starts to drop and voltage applied between the base and emitter of the transistor TRl consequently reverses to assure turn off of the transistor, to permit charging of the capacitor C The discharge of the capacitor in this manner is discussed in the copending patent application of W. K. Sonnemann, Serial No. 166,028, filed January 15, 1962, and assigned to the same assignee.

When the switch SW opens, a discharge circuit for the capacitor C may be traced from the upper terminal of the capacitor through the primary winding of the transformer T2, a rectifier D3 which shunts the resistor R and a resistor R2 to the lower terminal of the capacitor C The voltage V appearing across the capacitor C is compared with a reference voltage ER which is derived between an adjustable tap on the resistor R1 and the negative bus N. The difference between these voltages to initiate a timing opis utilized to control a translating unit which includes a transistor TRZ.

The difference between the voltages V and ER is applied between the emitter and base of the transistor TRZ. Conveniently, the transistor TRZ may be of the same type as the transistor TRl. As long as the reference voltage ER exceeds the voltage V, across the capacitor the transistor T R2 remains turned off. When the voltage V,, across the capacitor increases to a value exceeding the reference voltage ER, the transistor TRZ turns on for the purpose of operating a suitable translator 15. In the embodiment of FIG. 1 the input terminals of the translator 15 are connected in series with a source of direct current DC through the emitter an collector of the transistor TR2. A source of direct current may be provided by a full wave rectifier energized from a line conductor L2 in the same manner by which the voltage E is derived from the line conductor. However, to simplify the illustration the source is represented in FIG. 1 by a battery.

The translator may be of any suitable type. For example, the translator may represent an alarm, a relay or a trip coil for the circuit breaker CB to be operated upon expiration of the time delay introduced by the timing device.

The capacitor C1 also is desirable for the reason that it prevents the voltages EO and ER from dropping to zero when the alternating voltage applied to the rectifiers D1 and D2 passes through Zero. The voltage ER is always maintained at a value greater than that of the voltage V when the switch SW is open. This also keeps the capacitor C from discharging during a charging cycle.

Although the timing device of FIG. 1 as thus far described is suitable for general application it is particularly desirable for use in association with protective relays. To illustrate such an application, a distance relay DR has output terminals DR1 and DRZ connected respectively to the terminals of the switch SW. For

this application, the switch SW is left inopen condition. The distance relay DR receives a current energization through a current transformer GT1 associated with the line conductor L2 and receives voltage energization from the line conductors. transmission line or in the presence of a fault beyond the reach of a distance relay, an open circuit is present between the terminals DR1 and DRZ of the relay. If a fault on the transmission line occurs within the reach of the relay DR, the relay closes the circuit between the terminals DR1 and DRZ. Such distance relays are well known in the art.

For second and third zone operation of distance relays, it is conventional to introduce a time delay in the control exercised by the distance relay. Such a time delay is provided by the timing device of the invention.

The overall operation of the system of FIG. 1 now will be considered. It will be assumed that the transmission line is in operation and that no fault is present on the transmission line. Under these circumstances an open circuit is present between the terminals DR1 and DRZ. Through the operation of the transformer T1 and the associated rectifiers a direct voltage E0 appears across a resistor R1.. However this voltage is not effective for charging the capacitor C because of the open circuit between the terminals DR1 and DRZ.

It will be recalled that a discharge circuit for the capacitor C is established through the primary winding of the transformer T2, the rectifier D3 and the resistor R2. The voltage V is smaller in value than the reference In the absence of a fault on the voltage ER except for the comparatively short time when the transistor TR2 is turned on. e

If a fault occurs on the transmission line within the reach of the relay DR, the relay operates to close the circuit between the terminals DR1 and DR2. This connects the voltage EO across the capacitor C through the resistor R and the primary winding of the trans-.

l former T2. The initial rush of current through this charging circuit induces a voltage in the secondary winding of the transformer T2 which turns on the transistor TRl to discharge the capacitor C The current through the primary winding promptly reaches a peak value and then decreases in value; The voltage across the secondary winding of the transformer T2 therefore reverses in polarity to assure turn off of the transistor TRl. Capacitor C, now starts to charge at a rate determined by the capacitance value of the capacitor and the value of the resistance in the charging circuit of the capacitor. It will be recalled that the value of the resistor R may be adjusted for the purpose of adjusting the charging current for the capacitor C The initial discharge of the capacitor at the start of a timing cycle assures a uinform time delay measurement.

The voltage V across the capacitor now starts to increase along a curve Cu as shown in FIG. 2. This curve is plotted on coordinates wherein ordinates represent voltage and abscissas represent time. The voltage across the capacitor rises in accordance with the well known equation V EO(l-e The value of the reference voltage ER is shown in FIG. 2 by a dotted line.

As long as the reference voltage is larger than'the voltage V, across the capacitor, the transistor TRZ remains turned off. However, as soon as the voltage V exceeds the reference voltage ER which occurs at a time T1, the transistor TRZ turns on to operate the translator 15.

It should be noted that an increase in line current results in corresponding increases of the voltage E0 and the reference voltage ER. For this reason an increase in the line current does not alter the time of operation of the timing device.

To illustrate the fact that the time delay introduced by the timing device is independent of the line current, let it be assumed that the line current increases to produce a corresponding increase in the voltage E0 and a corresponding increase in the charging rate of the capacitor 0,. This new charging rate results in the curve Cul of FIG. 2. At the same time the reference voltage ER increases to a new value ERl.

It will be noted that the time required for the curve Cul to produce a voltage which exceeds the reference voltage ERl is still fl. Consequently, the variation of the line current has not altered the time delay introduced by the timing device. 7

Although the invention has been described with reference to certain specific embodiments thereof, numerous modifications falling within the spirit and scope of the invention are possible.

7 I claim as my invention:

ll. ln'a timing device, a pair of input terminals, means forderiving from the input terminals a direct first voltage having a first magnitude which varies as a function of the magnitude of a variable magnitude alternating constantfrequency electric quantity applied to the input terminals, means for deriving from said input terminals a direct second voltage having a second magnitude which varies as said function of the magnitude of a variable electric quantity applied to said input terminals, delay means. for deriving from the first voltage a direct third voltage: which increases in magnitude as a function of time and at a rate dependent on the magnitude of the first voltagefollowing application of said first voltage thereto, and translating means responsive to the difference between said second and third voltages.

2. In a timing device, a pair of input terminals, means. for deriving from the input terminals a direct first voltage: having a first magnitude which varies as a function of a variable-magnitude alternating constant-freqglen y 616Cw tric quantity applied to the input terminals, means for deriving from said input terminals a direct second voltage having a second magnitude which varies as said function of a variable electric quantity applied to said input terminals, a charge resistor, a capacitor, switch means connecting the capacitor through said resistor for energization in accordance with said first voltage to provide a third voltage across said capacitor which increases with time to a value exceeding the second magnitude, and translating means responsive to the difference between the second and third voltages.

3. In a timing device, a pair of input terminals, means for deriving from the input terminals a direct first voltage having a first magnitude which varies as a function of a variable-magnitude alternating constant-frequency electric quantity applied to the input terminals, means for deriving from said input terminals a direct second voltage having a second magnitude which varies as said function of a variable electric quantity applied to said input terminals, a charge resistor, a capacitor, switch means connecting the capacitor through said resistor for energization in accordance with said first voltage to provide a third voltage across said capacitor which increases with time to a value exceeding the second magnitude, discharge means responsive to closure of said switch means for promptly discharging said capacitor and thereafter while said switch is closed permitting charging of the capacitor, and translating means responsive to the difference between the second and third voltages.

4. In a timing device, a pair of input terminals, means for deriving from the input terminals a first voltage having a first magnitude which varies as a function of a variable electric quantity applied to the input terminals, means for driving from said input terminals a second voltage having a second magnitude which varies as said function of a variable electric quantity applied to said input terminals, a charge resistor, a capacitor, switch means connecting the capacitor through said resistor for energization in accordance with said first voltage to provide a third voltage across said capacitor which increases with time to a value exceeding the second magnitude, a discharge resistor, a discharge rectifier connected across said charge resistor, a discharge circuit connecting said discharge rectifier, said discharge resistor and said capacitor in a closed circuit independent of said switch means for discharging the capacitor when the switch means is in open condition, said rectifier connected across said charge resistor being poled to bypass discharge current from the capacitor around the charge resistor, and translating means responsive to the difference between the second and third voltages.

5. In a timing device, a pair of input terminals, means for deriving from the input terminals a first voltage having a first magnitude which varies as a function of a variable electric quantity applied to the input terminals, means for deriving from said input terminals 2. second voltage having a second magnitude which varies as said function of a variable electric quantity applied to said input terminals, a charge resistor, a capacitor, switch means connecting the capacitor through said resistor for energization in accordance with said first voltage to provide a third voltage across said capacitor which increases with time to a value exceeding the second magnitude, a discharge resistor, a discharge rectifier connected across said charge resistor, a discharge circuit connecting said discharge rectifier, said discharge resistor and said ca pacitor in a closed circuit independent of said switch means for discharging the capacitor when the switch means is in open condition, said rectifier connected across said charge resistor being poled to bypass discharge current from the capacitor around the charge resistor, discharge means responsive to closure of said switch means for promptly discharging said capacitor and thereafter permitting charging of the capacitor, and translating means responsive to the diiference between the second and third voltages.

References Cited by the Examiner UNITED STATES PATENTS 2,925,535 2/60 Titze 31736 2,977,510 3/61 Adamson et a1. 31733 X 2,985,808 5/61 Ketchledge 30788.5 3,073,971 1/63 Daigle 307-8845 3,105,920 10/63 Dewey 3l7-33 X ARTHUR GAUSS, Primary Examiner.

Claims (1)

1. IN A TIMING DEVICE, A PAIR OF INPUT TERMINALS, MEANS FOR DERIVING FROM THE INPUT TERMINALS A DIRECT FIRST VOLTAGE HAVING A MAGNITUDE WHICH VARIES AS A FUNCTION OF THE MAGNITUDE OF A VARIABLE MAGNITUDE ALTERNATING CONSTANT FREQUENCY ELECTRIC QUANTITY APPLIED TO THE INPUT TERMINALS, MEANS FOR DERIVING FROM SAID INPUT TERMINALS A DIRECT SECOND VOLTAGE HAVING A SECOND MAGNITUDE WHICH VARIES AS SAID FUNCTION OF THE MAGNITUDE OF A VARIABLE ELECTRIC QUANTITY APPLIED TO SAID INPUT TERMINALS, DELAY MEANS FOR DERIVING FROM THE FIRST VOLTAGE A DIRECT THIRD VOLTAGE WHICH INCREASES IN MAGNITUDE AS A FUNCTION OF TIME AND AT A RATE DEPENDENT ON THE MAGNITUDE OF THE FIRST VOLTAGE FOLLOWING APPLICATION OF SAID FIRST VOLTAGE THERETO, AND TRANSLATING MEANS RESPONSIVE TO THE DIFFERENCE BETWEEN SAID SECOND AND THIRD VOLTAGES.

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