GB1535249A - Image display device - Google Patents
Image display deviceInfo
- Publication number
- GB1535249A GB1535249A GB3918076A GB3918076A GB1535249A GB 1535249 A GB1535249 A GB 1535249A GB 3918076 A GB3918076 A GB 3918076A GB 3918076 A GB3918076 A GB 3918076A GB 1535249 A GB1535249 A GB 1535249A
- Authority
- GB
- United Kingdom
- Prior art keywords
- delay line
- matrix
- sept
- fed
- shift register
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
- H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
- H04N3/14—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by means of electrically scanned solid-state devices
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Control Of El Displays (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
1535249 Displays INDESIT INDUSTRIA ELETTRODOMESTICI ITALIANA SpA 21 Sept 1976 [23 Sept 1975] 39180/76 Headings G4H and G5C An image display device for a TV receiver comprises a matrix of illuminable elements, each column of the matrix being connected to, or fed with a signal representing, a respective output of a delay line of the charge displacement type, which delay line, in use, is fed with a video signal representative of the image to be reproduced, and a clock signal at a frequency such that the overall delay time of the delay line is substantially equal to the useful duration of a line scan. As disclosed, the illuminable elements are LEDs, and a clock-driven shift register selects the matrix rows in turn, each to receive the then-current contents of the delay line in parallel. Strobe gates may be provided between the shift register and matrix rows, or a parallel analogue store be provided between the delay line and matrix columns. The device may be produced as an integrated circuit.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT6935375A IT1047441B (en) | 1975-09-23 | 1975-09-23 | IMAGE PRESENTER DEVICE |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1535249A true GB1535249A (en) | 1978-12-13 |
Family
ID=11311949
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB3918076A Expired GB1535249A (en) | 1975-09-23 | 1976-09-21 | Image display device |
Country Status (2)
| Country | Link |
|---|---|
| GB (1) | GB1535249A (en) |
| IT (1) | IT1047441B (en) |
-
1975
- 1975-09-23 IT IT6935375A patent/IT1047441B/en active
-
1976
- 1976-09-21 GB GB3918076A patent/GB1535249A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| IT1047441B (en) | 1980-09-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed | ||
| 732 | Registration of transactions, instruments or events in the register (sect. 32/1977) | ||
| PE20 | Patent expired after termination of 20 years |
Effective date: 19960920 |