GB1528028A - Integrated injection logic semiconductor device - Google Patents
Integrated injection logic semiconductor deviceInfo
- Publication number
- GB1528028A GB1528028A GB5301375A GB5301375A GB1528028A GB 1528028 A GB1528028 A GB 1528028A GB 5301375 A GB5301375 A GB 5301375A GB 5301375 A GB5301375 A GB 5301375A GB 1528028 A GB1528028 A GB 1528028A
- Authority
- GB
- United Kingdom
- Prior art keywords
- zone
- substrate
- zones
- wall
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 238000002347 injection Methods 0.000 title 1
- 239000007924 injection Substances 0.000 title 1
- 239000000758 substrate Substances 0.000 abstract 7
- 230000000295 complement effect Effects 0.000 abstract 1
- 238000010276 construction Methods 0.000 abstract 1
- 238000007796 conventional method Methods 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 abstract 1
- 238000009413 insulation Methods 0.000 abstract 1
- 238000002955 isolation Methods 0.000 abstract 1
- 239000007787 solid Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
- H01L27/0821—Combination of lateral and vertical transistors only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
- H01L27/0233—Integrated injection logic structures [I2L]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/091—Integrated injection logic or merged transistor logic
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Bipolar Integrated Circuits (AREA)
Abstract
1528028 I<SP>2</SP>L semi-conductor device TOKYO SHIBAURA ELECTRIC CO Ltd 29 Dec 1975 [27 Dec 1974] 53013/75 Heading H1K An I<SP>2</SP>L semi-conductor device comprises a substrate, e.g. 11 (Fig. 1) of P(N) type carrying a more lightly doped layer 12 of the opposite type in which are formed two mutually spaced zones 13, 14 of P(N) type, one of which zones 13 is ohmically connected to the substrate and has formed in it a zone 15 of N(P) type, the construction being such the zones 15, 13 and layer 12 constitute the emitter, base and collector of a lateral injector transistor and substrate 11, layer 12 and zone 14 those of a complementary inverse transistor. Ohmic connection between zone 13 and the substrate may be effected as illustrated by additional N zone 17, or by zone 13 itself reaching down to the substrate. The device may be isolated from similar devices by a surrounding groove extending down to the substrate and filled with air or solid insulation or by an N(P) isolating wall in the same location, the wall optionally including a P(N) zone which together with it and the isolated part of layer 12 forms an additional lateral injector transistor. In one embodiment where a rectangular grid of such walls surrounds and mutually isolates a plurality of devices the zones 13, 15 may not even be necessary. In another embodiment, in which isolation of the device is provided by a groove on three sides and a P(N) wall on the fourth, connection of zone 13 to the substrate is made via this wall and a surface diffusion between it and the zone. The devices, which may be formed by conventional techniques, include zone 16 through which the input contact is connected to the base of the vertical transistor which may optionally have a plurality of collector zones.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP49148565A JPS5182578A (en) | 1974-12-27 | 1974-12-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1528028A true GB1528028A (en) | 1978-10-11 |
Family
ID=15455579
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB5301375A Expired GB1528028A (en) | 1974-12-27 | 1975-12-29 | Integrated injection logic semiconductor device |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPS5182578A (en) |
DE (2) | DE2558975C2 (en) |
FR (1) | FR2296269A1 (en) |
GB (1) | GB1528028A (en) |
NL (1) | NL182763C (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3338131A1 (en) * | 1983-10-20 | 1985-05-15 | Telefunken electronic GmbH, 7100 Heilbronn | I (UP ARROW) 2 (UP ARROW) L SWITCH |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5368087A (en) * | 1976-11-29 | 1978-06-17 | Fujitsu Ltd | Semiconductor device |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1507299A (en) * | 1974-03-26 | 1978-04-12 | Signetics Corp | Integrated semiconductor devices |
JPS5513583B2 (en) * | 1974-11-14 | 1980-04-10 |
-
1974
- 1974-12-27 JP JP49148565A patent/JPS5182578A/ja active Pending
-
1975
- 1975-12-24 NL NL7515036A patent/NL182763C/en not_active IP Right Cessation
- 1975-12-29 GB GB5301375A patent/GB1528028A/en not_active Expired
- 1975-12-29 DE DE19752558975 patent/DE2558975C2/en not_active Expired
- 1975-12-29 FR FR7539997A patent/FR2296269A1/en active Granted
- 1975-12-29 DE DE19752560577 patent/DE2560577C2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3338131A1 (en) * | 1983-10-20 | 1985-05-15 | Telefunken electronic GmbH, 7100 Heilbronn | I (UP ARROW) 2 (UP ARROW) L SWITCH |
Also Published As
Publication number | Publication date |
---|---|
FR2296269B1 (en) | 1979-10-05 |
DE2560577C2 (en) | 1986-04-17 |
DE2558975A1 (en) | 1976-07-08 |
NL7515036A (en) | 1976-06-29 |
FR2296269A1 (en) | 1976-07-23 |
JPS5182578A (en) | 1976-07-20 |
NL182763C (en) | 1988-05-02 |
DE2558975C2 (en) | 1985-11-07 |
NL182763B (en) | 1987-12-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
746 | Register noted 'licences of right' (sect. 46/1977) | ||
PCNP | Patent ceased through non-payment of renewal fee |