GB1510498A - Device for checking the continuity of a communication path between two terminals - Google Patents
Device for checking the continuity of a communication path between two terminalsInfo
- Publication number
- GB1510498A GB1510498A GB4434575A GB4434575A GB1510498A GB 1510498 A GB1510498 A GB 1510498A GB 4434575 A GB4434575 A GB 4434575A GB 4434575 A GB4434575 A GB 4434575A GB 1510498 A GB1510498 A GB 1510498A
- Authority
- GB
- United Kingdom
- Prior art keywords
- samples
- tests
- value
- centre
- sample
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Time-Division Multiplex Systems (AREA)
Abstract
1510498 Automatic exchange systems INTERNATIONAL STANDARD ELECTRIC CORP 28 Oct 1975 [6 Nov 1974] 44345/75 Heading H4K In order to perform a loop test through a time division switching centre and an analog switching centre a generator generates in the time division centre coded samples of an AC loop check signal the frequency of which is a sub-multiple of the frame time of the digital centre, the samples are transmitted (via a digital to analog converter) to the analog switching centre which loops the line returning the signals (via an analog to digital converter) to the digital centre where it is recognized as the returned signal if it satisfies three tests i.e. that the sum of the samples is approximately zero, that at least one of the samples is of at least a predetermined minimum value W I and that none of the samples is of more than a maximum value W2. The tests are independent of phase changes due to sampling delays caused by the conversions. The figure shows a receiver circuit for performing these tests. It includes a store 6 having a row for each channel for which a loop test can be performed, an input A for 8 bit P.C.M. samples, an adder 9 which adds each sample to the corresponding accumulated total stored in the first 8 bits of the corresponding row of the store 6 and recirculated via the register 7' and the adder, a comparator 19 which compares each sample with the value W1 and if a sample of magnitude greater than W1 is detected sets the penultimate bit of the corresponding row to "1", and a comparator 20 which compares the samples with the value W2 and if any sample exceeds this value sets the last bit of the corresponding row to "1". At the end of an accumulation cycle a comparator 8' checks that the accumulated totals are approximately zero (not greater than a given error value applied at e) and an AND gate 13 is enabled if the three tests are met. Gates 14, 17 and 18 operate if the corresponding tests fail.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR7436757A FR2290804A1 (en) | 1974-11-06 | 1974-11-06 | DEVICE FOR VERIFYING THE CONTINUITY OF THE DIGITAL AND ANALOGUE SPEAKING PATH BETWEEN DIGITAL AND VOICE FREQUENCY SWITCHING CENTERS |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1510498A true GB1510498A (en) | 1978-05-10 |
Family
ID=9144687
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB4434575A Expired GB1510498A (en) | 1974-11-06 | 1975-10-28 | Device for checking the continuity of a communication path between two terminals |
Country Status (3)
| Country | Link |
|---|---|
| BE (1) | BE835204A (en) |
| FR (1) | FR2290804A1 (en) |
| GB (1) | GB1510498A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0008608A1 (en) * | 1978-09-06 | 1980-03-19 | Felten & Guilleaume Fernmeldeanlagen GmbH | Circuit arrangement for carrying out a loop test for data transmission lines |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| IT1209318B (en) * | 1980-03-21 | 1989-07-16 | Sits Soc It Telecom Siemens | CIRCUIT PROVISION SUITABLE TO DETECT THE ELECTRICAL CHARACTERISTICS OF THE JUNCTION LINES, BOTH ANALOG AND DIGITAL, ATTESTED TO A NUMERIC TYPE TRANSIT TELEPHONE UNIT. |
-
1974
- 1974-11-06 FR FR7436757A patent/FR2290804A1/en active Granted
-
1975
- 1975-10-28 GB GB4434575A patent/GB1510498A/en not_active Expired
- 1975-11-04 BE BE2054644A patent/BE835204A/en unknown
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0008608A1 (en) * | 1978-09-06 | 1980-03-19 | Felten & Guilleaume Fernmeldeanlagen GmbH | Circuit arrangement for carrying out a loop test for data transmission lines |
Also Published As
| Publication number | Publication date |
|---|---|
| BE835204A (en) | 1976-05-04 |
| FR2290804A1 (en) | 1976-06-04 |
| FR2290804B1 (en) | 1978-06-09 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed | ||
| 746 | Register noted 'licences of right' (sect. 46/1977) | ||
| PCNP | Patent ceased through non-payment of renewal fee |