SU1734219A1 - Device for diagnostics of hardware state of digital communication systems - Google Patents

Abstract

The invention relates to radio engineering. The purpose of the invention is to increase the reliability of diagnosis. The proposed technical solution makes it possible to assess the technical state of the apparatus and, if it is not operational, search for a fault site 100–200 times faster with a Q accuracy of 0.99 as compared to the currently used method of determining the technical condition of digital transmission system equipment by measuring its main output parameters. Diagnostics of the state of the equipment of the digital transmission systems is carried out on the basis of measuring the number of incorrectly received pulses as it passes through the transmission path and the reception path of the pseudo-random test pulse train. The device uses a mechanism to enhance the number of incorrectly received pulses to reduce the time interval during which the equipment of digital transmission systems is being tested, thereby increasing the reliability of the state estimation and reducing the measurement time to 2.2 minutes. This goal is achieved by introducing a noise generator, a controlled attenuator, a connection switching unit, a control signal block, a common state analysis and display unit, a divider unit and a transmission speed selector, a memory error counting unit, an error recording unit. 1 il. with C

Description

The invention relates to a communication technique, intended to diagnose digital transmission system equipment.

The purpose of the invention is to increase the reliability of diagnosis.

The drawing shows a structural electrical circuit, device.

A device for diagnosing the state of digital systems equipment contains a transmitting path of digital transmission system equipment 1, a receiving equipment path of 2 digital transmission systems, a transmission path encoder 3, a modulator 4 and a transmitting path, a transmission path frequency converter 5, a transmitting power amplifier 6, block 7 input circuits and a high-frequency amplifier, frequency converter 8 receiving path, demodulator - torus 9 receiving path, decoder 10 receiving path, shaper 11 frequency-phase-manipulated signals, noise generator 12, controlled attenuator 13, connection switching unit 14, controlled pseudo-random sequence generator 15, controllable delay line 16 control signal block 17,

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unit for analyzing and displaying the general state 18, block 19 for dividers and selecting the transmission rate, generator 20 rectangular pulses, block 21 for counting pulses, block 22 for calculating errors with memory, block for registering errors 23, block 24 for displaying faults, controlled electronic keys 25-30.

The device works as follows.

From the generator 20 rectangular pulses through the block 17 of the control signals, the block 19 dividers and select the transmission speed pulses are fed to the controlled generator 15 of a pseudo-random sequence, where a pseudo-random sequence of impulses is formed, which serves as a test for checking the transmitting 1 and receiving 2 paths of digital equipment transfer.

In accordance with the fact that the receiving path 2 can be said to mirror the transmitting path 1 of the equipment of digital transmission systems, for example, the encoder 3 of the transmitting path - the decoder 10 of the receiving path, the modulator 4 of the transmitting path - the demodulator 9 of the receiving path transmitting and the receiving paths are divided into four main mutually functionally displaying parts, which, according to a given algorithm, when the permissible value of the distorted pulses is exceeded, they commute with each other and are checked using the developed test. When finding an inoperative pair of mutually mapping each other block of the receiving and transmitting paths, they are compared with the efficient blocks of the shaper of the frequency-manipulated-induced signals.

In accordance with the installed switching, the developed test passes through the transmitting and receiving paths of the equipment of the digital transmission systems and is compared with the initial test in the error recorder 23, where the number of distorted pulses is counted. If the number of distorted pulses does not exceed the permissible value, then a decision is made about the operability of the equipment of digital transmission systems and the number of distorted pulses is displayed, reflecting the degree of operability. If the permissible number of distorted pulses is exceeded, a faulty block of digital transmission system equipment is detected and the number of distorted pulses is also displayed, which indicates the degree of inoperative status of digital transmission system equipment.

The device operates according to the following algorithm.

With the start of diagnostics, the control signal block 17 issues a command for the following switching: the output of the 15 pseudo-random sequence generator to the input of the encoder 3 of the transmission path; the output of the amplifier 6 of the power of the transmitting path to the input of the controlled attenuator 13: the output of the controlled attenuator 13 to the input of the unit 7 input circuits and the high frequency amplifier; the output of the decoder 10 of the reception to the input of the error recording unit 23; setting the attenuation G 1 on the controlled attenuator 13; setting the delay time P on the controlled delay line 16.

After switching during a cycle (158400 clock pulses), the number of incorrectly received pulses N is determined, which is compared with MDOp.

With N MDOP, the control signal block 17 disables the supply of clock pulses and signals the common state analysis block 18 to display the number of incorrect pulses N. End of operation.

With N MDop, the control signal block 17 issues a command for the following switching: the output of the pseudo-random sequence generator 15 to the input of the encoder 3 of the transmission path; the output of the modulator 4 of the transmitting path to the input of the controlled attenuator 13; the output of the controlled attenuator 13 to the input of the demodulator 9 of the receiving path; the output of the decoder 10 of the receiving path to the input of the block 23 for recording errors; installing attenuation G 2 on the controlled attenuator 13; setting the delay time t2 on the controlled delay line 16; switching off the output of the modulator 4 of the transmitting path from the input of the converter 5 of the frequency of the transmitting path; disconnecting the output of the frequency converter 8 of the receiving path from the input of the demodulator 9 of the receiving path.

Prior to switching, N is compared with NAOn. where MDOp is the number of incorrectly received pulses, in which the equipment of digital transmission systems is considered inoperable, but can still be used to a limited extent, providing less reliability of reception, to indicate the degree of inoperative state. After switching, N is compared with MDOp.

With N MDop, the control signal block 17 issues a command for the following switching: generator 15 output of a pseudo-random sequence to the input of the modulator 4 of the transmitting path, the output of the modulator 4 of the transmitting path to the input of a controlled

attenuator 13; the output of the controlled attenuator 13 to the input of the demodulator 9 of the receiving path; the output of the demodulator of the receiving path 9 to the input of the error recording unit 23; installing attenuation G 2 on the controlled attenuator 13; setting the delay time g 3 on the controlled delay line 16; disconnecting the output of the encoder 3 of the transmit path from the input of the modulator 4 of the transmit path; switching off the output of the modulator 4 of the transmitting path from the input of the converter 5 of the frequency of the transmitting path; disconnection of the output of the converter 8 of the frequency of the receiving path from the input of the demodulator 9 of the receiving path.

After the end of the cycle, N is compared with MDOP.

With N MDop, the control signal block 17 issues a command for the following switching: generator output .15 pseudo-random sequence to the modulator input of the driver of the frequency-phase-manipulated signals 11; the modulator output of the frequency-phase former 11 frequency-manipulated signals to the input of the controlled attenuator 13; the output of the controlled attenuator 13 to the input of the demodulator 9 of the receiving path; the output of the demodulator 9 of the receiving path to the input of the block 23 for recording errors; installing attenuation G 2 on the controlled attenuator 13; setting the delay time TZ on the controlled delay line 16; disconnection of the output of the converter 8 of the frequency of the receiving path from the input of the demodulator 9 of the receiving path; turning off the output of the demodulator 9 of the receiving path from the input of the decoder 10 of the receiving path.

After switching, N is compared to

Mdop

With N MDop, the fault display unit 24 displays: The receive path demodulator is defective. With N Mdop the same block highlights: The transmitting path modulator is defective. The end of the work.

With N MDop, the control signal block 17 issues a command for the following commutation: generator output 15 of a pseudo-random sequence to the input of the coder of the former 11 of frequency-phase-manipulated signals; the output of the encoder of the driver 11 frequency-phase-shift keyed signals to the input of the modulator 4 of the transmitting path; the output of the modulator 4 of the transmitting path to the input of the controlled attenuator 13; the output of the controlled attenuator 13 to the input of the demodulator 9 of the receiving path; the output of the decoder 10 receiving path to the input

block registration error 23; installing attenuation G 2 on the controlled attenuator 13; setting the delay time t 2 on the controlled delay line 16; shutdown

encoder 3 transmit path from the input of the modulator 4 transmit path; disconnecting the input of the demodulator 9 of the receiving path from the output of the converter 8 of the frequency of the receiving path.

. After switching - comparing N with MPOD. With N MDop, the fault display unit displays: The receiving path decoder is defective. When N MDOp the same block highlights: The encoder of the transmitting path is defective. The end of the work.

With N MDop, the control signal block 17 issues a command for the following switching: the output of the 15 pseudo-random sequence generator to the input of the encoder 3 of the transmission path; the output of the frequency converter 5 of the transmission path to the input of the controlled attenuator 13; the output of the controlled attenuator 13 to the input of the frequency converter 8 of the receiving path; output

the decoder 10 of the receiving path to the input of the block 23 for recording errors; installing attenuation G 3 on the controlled attenuator 13; setting the delay time g 4 on the controlled delay line 16; disconnection of the output of the converter of the 5 frequency of the transmitting path from the input of the amplifier 6 of the power of the transmitting 1 path; disconnecting the output of the input circuit and the high-frequency amplifier 7 from the converter input

8 frequency receiving path.

After switching - comparing N with MDOp. With N MDop, the control signal block 17 issues a command for the following switching: generator output 15 is pseudo-random

the sequence at the input of the encoder of the frequency-phase-shift keyed signal generator 11; the output of the converter 11 frequency-phase-manipulated signals to the input of the controlled attenuator 13; output

a controlled attenuator 13 to the input of the converter 8 of the frequency of the receiving path; the output of the decoder 10 of the receiving path to the input of the unit 23 for the registration of errors 23; installing G 3 on a controlled attenuator 13;

setting the delay time t4 on the controlled delay line 16; disconnecting the output of the input circuit and the high-frequency amplifier 7 from the input of the converter 8 of the receiving path.

After switching the comparison of N with MDOp. With N, the MDop block 24 of the fault display flashes. Faulty receiving path frequency converter. When N Mdop the same block highlights:

Transmit path frequency converter defective. The end of the work.

With N MDop, the control signal block 17 issues a command for the next switching; the output of the generator 15 pseudo-random sequence to the input of the encoder of the generator 11 frequency-phase-shift keyed signals; the output of the inverter shaper 11 frequency-phase-shift keyed signals to the input of the controlled attenuator 13; the output of the controlled attenuator 13 to the input of the input circuit unit and the high-frequency amplifier 7; the output of the decoder 10 of the receiving path to the input of the block error recording 23; installing attenuation G 4 on the controlled attenuator 13; setting the delay time t 5 on the controlled delay line. sixteen.

After switching - comparing N with MDOp. With N MDop, the fault display unit 24 displays: The input circuit block and the high frequency amplifier are faulty. At N N, the additional block highlights: The power amplifier of the transmitting path is faulty. The end of the work.

High accuracy of decision making with a small test length (158400 clock pulses) is achieved due to the mechanism of amplifying the number of distorted pulses with the help of a controlled attenuator 3 and a noise generator 12. With a known law of dependence of the error probability on the signal-to-noise ratio at the input of the demodulator of the receiving path Rosh f (h), it is possible to artificially increase the probability of errors, measure it and then, by the opposite law, lead to the real probability of errors. This significantly reduces the length of the space and increases the accuracy of the measurement of the probability of errors.

Claims (1)

Invention Formula A device for diagnosing the state of digital transmission system equipment, comprising a controlled pseudo-random sequence generator, a malfunction unit, a pulse counting unit, a memory error counting unit, characterized in that, in order to increase the diagnostic accuracy, serially connected direct pulse generator is introduced and a control signal unit, the first group of outputs of which is connected to the inputs of the fault display unit, a connection switching unit, a frequency-phase key driver Po- bathrooms signals corresponding to the inputs and outputs of which are connected to respective inputs and outputs of the switching unit connections, which first output is the input of the transmission path of the monitored equipment of the digital transmission systems, the serially connected divider unit and the transmission rate selection, the first input of which is connected to the first output of the control signaling unit, and the error recording unit, the second input and output of which are connected respectively to the second output of the switching unit and with the first input of the memory error counting unit, the analysis and display unit of the general state, the first group of inputs of which is connected to the corresponding outputs of the counting unit that error with a memory, the second input of which is connected to the output of the pulse counting unit, a noise generator, a controlled attenuator, the corresponding inputs and output of which are connected respectively to the third output, the first group of outputs and the first input of the switching switching unit, the first input of which is connected to the generator output noise, controlled delay line, the first input and output of which are connected respectively to the output of the controlled pseudo-random sequence generator and the third input of the error recording block, the fourth the input of which is connected to the first input of the pulse counting unit, the input of the controlled pseudo-random sequence generator and the second output of the divider unit and the transmission rate selection, the second group of outputs and the first group of inputs of the switching unit of the connections are connected respectively to the group of inputs of the controlled delay line signals, the corresponding inputs and outputs of which are connected respectively to the inputs and outputs of the block of analysis and display of the general state, the other input is connected to the third input of the error counting unit with the memory, the second input of the pulse counting unit, the fifth input of the error recording unit and the corresponding output of the control signal unit, the second input of which is connected to the output of the pulse counting unit, the output of the pseudo-random sequence generator is connected to the second input of the switching unit of the connection, the third input of which is the output of the receiving path of the monitored equipment of the digital transmission system, whose input is the fourth output of the switching unit connections, the fourth input of which is the output of the transmitting path of the monitored equipment of the digital transmission system, and between the corresponding blocks of the transmitting and receiving paths of the monitored equipment of the digital transmission system controllable electronic keys, controllably connected to the outputs, the corresponding inputs of which are connected to the corresponding blocks of the transmitting and receiving terminals of the switching unit of the controlled digital system connections, the corresponding inputs of the transmission. five ja