GB1487483A - Data-processing systems - Google Patents

Abstract

1487483 Data transmission; master and slave systems COMPAGNIE INTERNATIONALE POUR L'INFORMATIQUE CII-HONEYWELL BULL 3 Jan 1975 [3 Jan 1974] 326/75 Heading H4P In a system having a processing unit operable to a plurality of remote terminals which may have a variety of formats, e.g. character length, bit rate &c. through separate lines, each line has an adapter controlled by a member receiving tables from the unit which specify the format and transmission speed the adapter is to adopt, also direct operations. An assembly 6 directs communications to the processing unit 3 and control member 5 directs communications to which it is connected together with common store 10, receiving specifying tables from processor 3 via assembly 6; the adapter contains members, e.g. registers which can be operated by the program under control of member 5. The registers are able to contain parameters characteristic of particular lines and which may form bits into blocks; a further control adapts speed of bits to the line. The control member may have a unit associated therewith having a first store section 9 containing specifying tables. The adapters may be connected to the unit via a group of matching members, each member being capable of being connected to a plurality of adapters, the matching members as a whole being directed from the unit by means of priority circuits 18 which locate the member of highest priority to allow access to a table corresponding thereto. At reception when a remote terminal is transmitting to the processor, one of registers, e.g. 12 fills by characters formed by processor 8 from characters passing through adapter 1. Simultaneously another series of registers, e.g. 13 empties towards the processor under control of assembly 6. During transmission, one of register series, e.g. 12, fills with data and control characters while processor 8 feeds adapter 1 with characters developed from those in the other register series, e.g. 13. Control 14 calls assembly 6 so that a character block will be passed to processor 3 each time a complete series is filled at reception. Conversely at transmission, control 14 allows the directing assembly to transmit to control 5 a block of characters coming from the processor thus enable a register series just emptied to be refilled. The directing assembly includes a directing processor 15 and a second section 16 of store 10 which contains the programs and parameters directing the control member and direction of transmission. The hierarchical arrangement determines that the processor directs assembly 6 which issues orders to control 5 causing adapter 1 to adopt the correct format. Details of the line adapter and store layout are described in connection with Figs. 2 and 3 (not shown).