GB1482114A - Bistable trigger stages - Google Patents

Abstract

1482114 Transistor bi-stable circuits SIEMENS AG 30 July 1974 [2 Aug 1973] 33529/74 Heading H3T A bi-stable circuit comprising a pair of cross coupled field effect transistors 1, 2 with load elements 3, 4 and switching elements 5, 6 in the cross-coupling paths is characterized in that each load element is shunted by respective MNOS transistors 8, 9, the gate electrodes of which are coupled to a common control input 16. The MNOS transistors store the state of the bi-stable when the power supply at 13, 14 is disconnected. Assume the bi-stable is in the state in which transistor 1 is conducting making point 11 0 volts, and transistor 2 is non-conducting making point 12 U volts (approximately the supply voltage at 13). If it is desired to switch off the supply, switches 5, 6 are first opened, and a large negative pulse is applied to input 16. Since the full voltage U exists across transistor 8, the negative pulse will switch the threshold value of this transistor to a higher level, but will not affect that of transistor 9, across which no voltage exists. The power supply may now be disconnected. To reset the bistable to its previous state on resumption of the power supply, a small read out pulse is applied to input 16 which is sufficient to switch on transistor 9, but not sufficient to overcome the higher threshold level of transistor 8. The full supply voltage at 13 is thus applied via transistors 9, 6 to the gate of transistor 1 so that this transistor becomes conductive as before. To reset transistor 8 to its low threshold level a large positive pulse is applied to input 16. This does not affect the state of the bi-stable circuit as it turns both transistors 8, 9 off.