GB1385149A - Inverter circuits - Google Patents

Inverter circuits

Info

Publication number
GB1385149A
GB1385149A GB3479073A GB3479073A GB1385149A GB 1385149 A GB1385149 A GB 1385149A GB 3479073 A GB3479073 A GB 3479073A GB 3479073 A GB3479073 A GB 3479073A GB 1385149 A GB1385149 A GB 1385149A
Authority
GB
United Kingdom
Prior art keywords
fets
potential
rapidly
charges
branch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3479073A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1385149A publication Critical patent/GB1385149A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01714Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by bootstrapping, i.e. by positive feed-back

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Static Random-Access Memory (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)

Abstract

1385149 Inverters INTERNATIONAL BUSINESS MACHINES CORP 20 July 1973 [6 Sept 1972] 34790/73 Heading H3T An inverter such as is suitable for use in decoders or driver circuits for memory storage cells comprises two parallel branches each consisting of a series connection of an active circuit element T 1 or T 1 <SP>1</SP> with a controllable resistive element T 2 or T 2 <SP>1</SP>, a feed-back path C 2 between the commoned control electrodes of T 2 , T 2 <SP>1</SP> and a junction point S<SP>1</SP> in one branch, the control electrodes of T 1 , T 1 <SP>1</SP> being connected to a common input terminal and the junction point S in the other branch being for connection to a capacitive load C L . In operation, an application of a positive pulse at input I turns on FETs T 1 , T 1 <SP>1</SP> so that the load C L is rapidly discharged to earth potential via T 1 and points S, S<SP>1</SP> attain this low potential. Subsequently T 1 , T 1 <SP>1</SP> are turned off and as the gate G of T 2 is maintained positive by a diode connected FET T 3 , C L charges up via T 2 . As the stray capacitance at S<SP>1</SP> is less than C L present at S, the potential at S<SP>1</SP> increases faster than at S and due to feed-back via C 2 the potentials at points G, S also increase rapidly and C L charges up very rapidly to the supply potential V D . The diode connected transistor T 3 may be connected to a separate drain supply which can be lowered by switching to block FETs T 2 , T 2 <SP>1</SP> when FETs T 1 , T 1 <SP>1</SP> are conductive.
GB3479073A 1972-09-06 1973-07-20 Inverter circuits Expired GB1385149A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19722243671 DE2243671A1 (en) 1972-09-06 1972-09-06 MONOLITHICALLY INTEGRATED INVERTERING

Publications (1)

Publication Number Publication Date
GB1385149A true GB1385149A (en) 1975-02-26

Family

ID=5855576

Family Applications (1)

Application Number Title Priority Date Filing Date
GB3479073A Expired GB1385149A (en) 1972-09-06 1973-07-20 Inverter circuits

Country Status (5)

Country Link
JP (1) JPS4966040A (en)
DE (1) DE2243671A1 (en)
FR (1) FR2198319B1 (en)
GB (1) GB1385149A (en)
IT (1) IT993603B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1480984A (en) * 1975-09-25 1977-07-27 Standard Telephones Cables Ltd Schmitt trigger circuit
DE2929383A1 (en) * 1979-07-20 1981-02-12 Ibm Deutschland CIRCUIT FOR THE VOLTAGE LEVEL CONVERSION AND RELATED METHOD
US4354123A (en) * 1979-08-13 1982-10-12 Mostek Corporation High voltage clock generator
DE2935465A1 (en) * 1979-09-01 1981-03-19 Ibm Deutschland Gmbh, 7000 Stuttgart TTL LEVEL CONVERTER FOR CONTROLLING FIELD EFFECT TRANSISTORS
JPS59172832A (en) * 1983-03-23 1984-09-29 Fujitsu Ltd Low impedance output circuit
JP5665299B2 (en) * 2008-10-31 2015-02-04 三菱電機株式会社 Shift register circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3710271A (en) * 1971-10-12 1973-01-09 United Aircraft Corp Fet driver for capacitive loads

Also Published As

Publication number Publication date
DE2243671A1 (en) 1974-03-28
FR2198319B1 (en) 1976-05-07
IT993603B (en) 1975-09-30
FR2198319A1 (en) 1974-03-29
JPS4966040A (en) 1974-06-26

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees