GB1405953A - Dimension comparison - Google Patents

Abstract

1405953 Comparing diffraction patterns from dimensions; measuring dimensions photo-electrically WESTERN ELECTRIC CO Inc 6 Oct 1972 [8 Oct 1971 46202/72 Heading G1A and G1M A filament or wire 10, Fig. 1, which may be stationary or drawn through a die 13 passes through substantially coherent radiation (laser or mercury vapour lamp) from a source 17 and beamsplitters 19, 23 so that a diffraction pattern is produced at 20a at the focal point of a lens 24. A portion 18a of the split beam impinges upon a reference or master wire 22 and produces a diffraction pattern 20b for comparison with the pattern 20a. By carefully adjusting mirrors 21, 27 and lens 24 the two patterns are formed slightly off the optical axis of 24 and are displayed side by side, and the distances of wires 10 and 22 from the lens are the same which simplifies calibration. Apart from optical sources, diffraction patterns can be produced by electron beams, and Fresnel patterns used instead of Frannhofer patterns. In Fig. 2 the patterns are not displayed on a screen but are imaged by the lens 31 of a television camera 32 arranged such that the horizintal scanning lines thereof are parallel to the images of the patterns so that one or more of the scanning lines sweep across the image of the patterns. In Fig. 3 the patterns a and b are identical, indicating that the wire is of correct diameter and so then are waveforms c and d representing the video output of scanning lines. If waveform d is inverted and added to c then waveform e will be zero. If the wire diameters and the resulting waveforms are not the same however then the net result will not be zero and a pulse proportional to the pattern difference will be generated and may be measured. Such a measuring means, Fig. 5, comprises an analyzing circuit as in Fig. 2 which has AND gates 41, 42 both receiving on one input thereof the amplified video signal from circuit 36 which contains scanning lines representative of the two patterns. A clock 43 generates a pulse which is fed via unequal time delay circuits 44, 46 to the AND gates which feed via a third delay circuit 47 and an inverter 49 to an adder 48 the output of which is fed to an analog-to-digital converter 5 1 and a display device 52.