GB1402132A - Circuits for incrementing or decrementing binary numbers - Google Patents

Abstract

1402132 Data processing INTERNATIONAL BUSINESS MACHINES CORP 12 July 1972 [16 July 1971] 32504/72 Heading G4A A logic unit for incrementing or decrementing a binary number by unity comprises a first group OE0-OE3 of Exclusive-OR gates each having two inputs respectively connected to receive one denomination of the binary number and a common control signal DE which determines whether the unit increments or decrements; a plurality of AND gates A0-A3; and a second group OE4-OE7 of Exclusive-OR gates each having two inputs connected respectively to receive the one denomination of the binary number and the output of the AND gate of the next lower denomination or the carry signal C of another logic unit dealing with lower denominations, all of the AND gates receiving the carry signal and the outputs of its own and lower denomination exclusive-OR gates OE0-OE3, and the unit including a further exclusive-OR gate OE8 connected to receive a parity bit P for the input number and to deliver a parity bit for the incremented or decrement number. The gate OE8 changes the parity bit only if a generator PG determines that this is necessary. The generator PG receives the outputs of the first three exclusive-OR gates OE0-OE3 and delivers the appropriate output if it detects certain combinations of states (Figs. 3, 8, not shown). The generator PG is composed of an OR-gate OG and AND gate A4 and an inverter I or alternatively three AND-gates (Fig. 2, not shown).