GB1392530A - Address decode logic system - Google Patents

Address decode logic system

Info

Publication number
GB1392530A
GB1392530A GB4491472A GB4491472A GB1392530A GB 1392530 A GB1392530 A GB 1392530A GB 4491472 A GB4491472 A GB 4491472A GB 4491472 A GB4491472 A GB 4491472A GB 1392530 A GB1392530 A GB 1392530A
Authority
GB
United Kingdom
Prior art keywords
lines
decoder
address
fets
address input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4491472A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Boeing North American Inc
Original Assignee
Rockwell International Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rockwell International Corp filed Critical Rockwell International Corp
Publication of GB1392530A publication Critical patent/GB1392530A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
GB4491472A 1971-12-02 1972-09-28 Address decode logic system Expired GB1392530A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00204015A US3806880A (en) 1971-12-02 1971-12-02 Multiplexing system for address decode logic

Publications (1)

Publication Number Publication Date
GB1392530A true GB1392530A (en) 1975-04-30

Family

ID=22756258

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4491472A Expired GB1392530A (en) 1971-12-02 1972-09-28 Address decode logic system

Country Status (6)

Country Link
US (1) US3806880A (cg-RX-API-DMAC7.html)
JP (1) JPS5230218B2 (cg-RX-API-DMAC7.html)
CA (1) CA964377A (cg-RX-API-DMAC7.html)
FR (1) FR2164140A5 (cg-RX-API-DMAC7.html)
GB (1) GB1392530A (cg-RX-API-DMAC7.html)
IT (1) IT965421B (cg-RX-API-DMAC7.html)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5247976B2 (cg-RX-API-DMAC7.html) * 1973-03-16 1977-12-06
US4027285A (en) * 1973-12-26 1977-05-31 Motorola, Inc. Decode circuitry for bipolar random access memory
US4041330A (en) * 1974-04-01 1977-08-09 Rockwell International Corporation Selectable eight or twelve digit integrated circuit calculator and conditional gate output signal modification circuit therefor
US3922643A (en) * 1974-09-04 1975-11-25 Gte Sylvania Inc Memory and memory addressing system
US3969706A (en) * 1974-10-08 1976-07-13 Mostek Corporation Dynamic random access memory misfet integrated circuit
DE2639555C2 (de) * 1975-09-04 1985-07-04 Plessey Overseas Ltd., Ilford, Essex Elektrische integrierte Schaltung
US4044330A (en) * 1976-03-30 1977-08-23 Honeywell Information Systems, Inc. Power strobing to achieve a tri state
US4095265A (en) * 1976-06-07 1978-06-13 International Business Machines Corporation Memory control structure for a pipelined mini-processor system
US4258429A (en) * 1976-08-09 1981-03-24 Texas Instruments Incorporated Multiphase clocking for MOS electronic calculator or digital processor chip
US4124891A (en) * 1976-11-18 1978-11-07 Honeywell Information Systems Inc. Memory access system
US4063117A (en) * 1977-01-07 1977-12-13 National Semiconductor Corporation Circuit for increasing the output current in MOS transistors
US4295064A (en) * 1978-06-30 1981-10-13 International Business Machines Corporation Logic and array logic driving circuits
JPS5833633B2 (ja) * 1978-08-25 1983-07-21 シャープ株式会社 Ｍｏｓトランジスタ・デコ−ダ
JPS5833739A (ja) * 1981-08-21 1983-02-28 Toshiba Corp バスライン駆動回路
US4520464A (en) * 1982-06-01 1985-05-28 Ncr Corporation Transparent instruction word bus memory system
US4488266A (en) * 1982-09-29 1984-12-11 Rockwell International Corporation Low-power address decoder
US4541078A (en) * 1982-12-22 1985-09-10 At&T Bell Laboratories Memory using multiplexed row and column address lines
US4654830A (en) * 1984-11-27 1987-03-31 Monolithic Memories, Inc. Method and structure for disabling and replacing defective memory in a PROM

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL273031A (cg-RX-API-DMAC7.html) * 1960-12-30
DE1449581B2 (de) * 1963-12-20 1972-02-10 Telefunken Patentverwertungsgesell schaft mbH, 7900 Ulm Vorrichtung zum auslesen eines rechenmaschinen grosspeichers
US3478333A (en) * 1964-02-24 1969-11-11 Gen Motors Corp Magnetic memory system
US3354430A (en) * 1965-06-30 1967-11-21 Ibm Memory control matrix
US3409879A (en) * 1966-03-30 1968-11-05 Bell Telephone Labor Inc Computer organization employing plural operand storage
US3564517A (en) * 1968-06-24 1971-02-16 Gen Motors Corp Combined dro and ndro coincident current memory
US3560940A (en) * 1968-07-15 1971-02-02 Ibm Time shared interconnection apparatus
US3560942A (en) * 1968-07-15 1971-02-02 Ibm Clock for overlapped memories with error correction
JPS513185B1 (cg-RX-API-DMAC7.html) * 1969-12-16 1976-01-31
US3623022A (en) * 1969-12-29 1971-11-23 Ibm Multiplexing system for interleaving operations of a processing unit
US3609665A (en) * 1970-03-19 1971-09-28 Burroughs Corp Apparatus for exchanging information between a high-speed memory and a low-speed memory
US3629842A (en) * 1970-04-30 1971-12-21 Bell Telephone Labor Inc Multiple memory-accessing system
US3665426A (en) * 1970-10-07 1972-05-23 Singer Co Alterable read only memory organization
US3691534A (en) * 1970-11-04 1972-09-12 Gen Instrument Corp Read only memory system having increased data rate with alternate data readout
US3703707A (en) * 1971-04-28 1972-11-21 Burroughs Corp Dual clock memory access control

Also Published As

Publication number Publication date
CA964377A (en) 1975-03-11
US3806880A (en) 1974-04-23
JPS5230218B2 (cg-RX-API-DMAC7.html) 1977-08-06
DE2258842B2 (de) 1976-02-12
FR2164140A5 (cg-RX-API-DMAC7.html) 1973-07-27
IT965421B (it) 1974-01-31
DE2258842A1 (de) 1973-06-14
JPS4865855A (cg-RX-API-DMAC7.html) 1973-09-10

Similar Documents

Publication Publication Date Title
AU1156670A (en) Improvements in or relating to percussion drill bit
AU1189270A (en) Improvements in or relating to percussion drill bit
GB1390387A (en) Computer for processing variable length operands
AU458351B2 (en) Improvements in or relating to collapsible steering columns
GB1522638A (en) Mosfet decoding arrangement
ES403243A1 (es) Mejoras en los procesos de senalizacion en sistemas de transmision por modulacion de impulsos codificados (nic).
HK7086A (en) Memory
GB1351590A (en) Digital data storage addressing system
CA1012654A (en) Monolithic memory sense amplifier/bit driver having active bit/sense line pull-up
CA936596A (en) Monolithic memory sense amplifier/bit driver
AU2119470A (en) Improvements in or relating to twist drills.
GB1074739A (en) Content addressable memory
GB1302105A (cg-RX-API-DMAC7.html)
GB1312502A (en) Logic circuits
IE38634B1 (en) A decoder
JPS5654681A (en) Decoding circuit
GB1363778A (en) Capacitive matrix
AU1697770A (en) Polyazo dyes, their production and use
AU452061B2 (en) Improvements in or relating to builders scaffolding
SU478304A1 (ru) Матричный сумматор
JPS5750385A (en) Semiconductor device
GB1239109A (cg-RX-API-DMAC7.html)
SU461451A1 (ru) Посто нное запоминающее устройство
GB1484170A (en) Logic circuits
AU462255B2 (en) Cutter bit and block

Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PE20 Patent expired after termination of 20 years