GB1378753A - Multipelex telecommunications systems - Google Patents

Abstract

1378753 Multiplex transmission DEFENCE SECRETARY OF STATE FOR 17 May 1972 [9 June 1971 24 Sept 1971] 19657/71 and 44637/71 Headings H4R and H4P In a Boolean function multiplex transmission system binary information from a plurality of sources is used to modulate corresponding binary code words, the modulated code words being combined in a majority circuit, transmitted and separated by correlation using majority logic. The invention is restricted to the use of specific 7 bit codes which are truncated Walsh functions. To each code is added a synchronization bit. As shown the codes are repeatedly generated at respective outputs W1 to W7 of a generator, modulated by corresponding binary sources C1 to C7 in modulo two adders 2, and combined into a single pulse stream in a majority gate 5. The resultant codes have a synchronizing bit added at 6 and a shift register arrangement 7 delays alternative bits by eight bits before transmission over path 8. At the receiver the synchronization bit is extracted at 9 and a further shift arrangement 10 delays the remaining undelayed bits by eight bits such that all bit s have been delayed by the same amount. The delayed codes are fed to a shift register 11 and majority gates 12/1 to 12/7 each wired to the "0" and "1" outputs of the stages of the register 11 in accordance with the particular code they are intended to detect, and arranged to reproduce to synchronization flip-flops 13/1 to 13/7 the signals at C1 to C7. The delays are introduced to reduce the risk that adjacent bits in the resultant codes are received erroneously due to transmission noise. While less than the maximum number of channels are in use it is possible to correct errors at the receiver. Alternative codes with + 1 and - 1 elements may be used if multiplication rather than logical addition is employed.