GB1375063A - - Google Patents

Info

Publication number
GB1375063A
GB1375063A GB789672A GB789672A GB1375063A GB 1375063 A GB1375063 A GB 1375063A GB 789672 A GB789672 A GB 789672A GB 789672 A GB789672 A GB 789672A GB 1375063 A GB1375063 A GB 1375063A
Authority
GB
United Kingdom
Prior art keywords
troughs
layer
adjacent
plates
ridges
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB789672A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1375063A publication Critical patent/GB1375063A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42396Gate electrodes for field effect devices for charge coupled devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/28Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
    • G11C19/282Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements with charge storage in a depletion layer, i.e. charge coupled devices [CCD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/762Charge transfer devices
    • H01L29/765Charge-coupled devices
    • H01L29/768Charge-coupled devices with field effect produced by an insulated gate
    • H01L29/76866Surface Channel CCD

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

1375063 Charge coupled devices INTERNATIONAL BUSINESS MACHINES CORP 21 Feb 1972 [29 March 1971 (2)] 7896/72 Heading H1K In a charge coupled device the charge is transferred along a serpentine path in the substrate by means of a two-phase supply applied to electrodes comprising a pair of fingered structures arranged so that the transfer path is completely covered by the combination of the fingers of the electrodes. As shown, Fig. 1, an N-type Si wafer 10 is provided with a thick SiO 2 layer which is processed to form ridges 11, and thin insulating layers 14 are formed in the troughs 12 which form the charge transfer paths. A layer of conductive material, e.g. Al, Ag or heavily doped Si is deposited and selectively etched to form a plurality of spaced plates 15 in each trough, the plates in adjacent troughs being staggered. A layer 16 of SiO 2 or Si 3 N 4 is deposited and apertures are formed to expose a portion of each plate 15. A layer of Al is then deposited and etehed to form conductive strips 18 which extend transversely to the ridges 11 in such a way that in each trough they overlap the spaces between a pair of adjacent plates 15 and extend through an aperture in the insulating layer 16 to contact one of these plates. The staggered arrangement of the plates 15 enables the conductive strip to be connected to alternately disposed plates in adjacent troughs so that the charges are shifted in opposite directions. The ends of adjacent troughs can be coupled to form a folded track shift register. In a second embodiment, Figs. 6 to 8 (not shown), the thick insulation ridges are arranged to provide pairs of closely spaced troughs separated by greater distances from adjacent pairs, the lower parts of the electrodes are in the form of zig-zag tracks which cross each pair of troughs perpendicularly and are then bent to cross the adjacent pairs of troughs at points staggered relative to the first crossing point. A layer of insulating material covers these tracks and is provided with apertures through which upper electrode strips extending perpendicularly to the thick ridges contact the lower tracks. The upper strips overlap the spaces between adjacent lower electrode tracks within the troughs and the arrangement is such that charge transport is in the same direction in both of the members of each pair of closely spaced troughs but in opposite directions in adjacent pairs of troughs. The ends of one trough of a pair may be coupled to those of the trough in the adjacent pair to form a circulating shift register. The thin insulating layer on the floor of each trough may comprise a layer of SiO 2 covered with a layer of Si 3 N 4 . Alternatively this insulation may be Al 2 O 3 , AlN or BeO. In a further embodiment, Figs. 9 to 13 (not shown), thick ridges of SiO 2 are formed on a Si wafer, a layer of oxide of medium thickness is formed in the troughs and openings are etched, and the exposed parts of the surface are covered with a thin oxide layer. A metal, e.g. Cr, or Mo is then applied by sputtering to form conductive layers on the top surfaces of all the oxide layers but not on the vertical surfaces joining them. The conductive layers on the thick ridges of oxide are then etched off so that within each trough self-aligned electrode plates are provided which are alternately separated from the surface by the thin and medium thickness oxide layers, the relative positions being alternated (staggered), in adjacent troughs. A layer of Al is deposited over the surface and etched using an etchant which wil not attack the conductive plates (Mo or Cr) to form conductive strips extending perpendicularly to the thick oxide ridges and overlapping adjacent pairs of electrode plates to form twolevel electrodes. The charge is shifted in opposite directions in adjacent troughs becuase of the staggered arrangement of the electrode plates. Contact wires may be thermocompression bonded to one end of each conductive strip and a thick film of quartz may be sputtered over the electrodes and connections. Si 3 N 4 , Al 2 O 3 , AlN or BeO may be used instead of SiO 2 .
GB789672A 1971-03-29 1972-02-21 Expired GB1375063A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12909871A 1971-03-29 1971-03-29

Publications (1)

Publication Number Publication Date
GB1375063A true GB1375063A (en) 1974-11-27

Family

ID=22438445

Family Applications (1)

Application Number Title Priority Date Filing Date
GB789672A Expired GB1375063A (en) 1971-03-29 1972-02-21

Country Status (8)

Country Link
AU (1) AU3944172A (en)
BE (1) BE779499A (en)
CH (1) CH539917A (en)
DE (1) DE2213656A1 (en)
FR (1) FR2131959B1 (en)
GB (1) GB1375063A (en)
IT (1) IT1044825B (en)
NL (1) NL7203859A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4646119A (en) * 1971-01-14 1987-02-24 Rca Corporation Charge coupled circuits

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3651349A (en) * 1970-02-16 1972-03-21 Bell Telephone Labor Inc Monolithic semiconductor apparatus adapted for sequential charge transfer
NL7106968A (en) * 1970-07-20 1972-01-24

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4646119A (en) * 1971-01-14 1987-02-24 Rca Corporation Charge coupled circuits

Also Published As

Publication number Publication date
CH539917A (en) 1973-07-31
NL7203859A (en) 1972-10-03
BE779499A (en) 1972-06-16
IT1044825B (en) 1980-04-21
FR2131959A1 (en) 1972-11-17
AU3944172A (en) 1973-08-30
FR2131959B1 (en) 1974-06-28
DE2213656A1 (en) 1972-10-12

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee