GB1357576A - Digital data processing systems - Google Patents
Digital data processing systemsInfo
- Publication number
- GB1357576A GB1357576A GB4731971A GB4731971A GB1357576A GB 1357576 A GB1357576 A GB 1357576A GB 4731971 A GB4731971 A GB 4731971A GB 4731971 A GB4731971 A GB 4731971A GB 1357576 A GB1357576 A GB 1357576A
- Authority
- GB
- United Kingdom
- Prior art keywords
- interrupt
- processor
- program
- priority
- interrupts
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
- G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Bus Control (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10277170A | 1970-12-30 | 1970-12-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1357576A true GB1357576A (en) | 1974-06-26 |
Family
ID=22291598
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB4731971A Expired GB1357576A (en) | 1970-12-30 | 1971-10-11 | Digital data processing systems |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US3676861A (enExample) |
| JP (1) | JPS5852B1 (enExample) |
| CA (1) | CA948784A (enExample) |
| DE (1) | DE2165767A1 (enExample) |
| FR (1) | FR2121114A5 (enExample) |
| GB (1) | GB1357576A (enExample) |
| IT (1) | IT941293B (enExample) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2277388A (en) * | 1993-04-19 | 1994-10-26 | Intel Corp | Programmable multi-processor interrupt controller system with a processor integrated local interrupt controller |
| US5619705A (en) * | 1993-12-16 | 1997-04-08 | Intel Corporation | System and method for cascading multiple programmable interrupt controllers utilizing separate bus for broadcasting interrupt request data packet in a multi-processor system |
| US5696976A (en) * | 1990-12-21 | 1997-12-09 | Intel Corporation | Protocol for interrupt bus arbitration in a multi-processor system |
Families Citing this family (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3798591A (en) * | 1971-09-28 | 1974-03-19 | Gen Electric Co Ltd | Access circuit for a time-shared data processing equipment |
| US4099235A (en) * | 1972-02-08 | 1978-07-04 | Siemens Aktiengesellschaft | Method of operating a data processing system |
| US4044333A (en) * | 1972-07-26 | 1977-08-23 | Siemens Aktiengesellschaft | Data processing switching system |
| US4318182A (en) * | 1974-04-19 | 1982-03-02 | Honeywell Information Systems Inc. | Deadlock detection and prevention mechanism for a computer system |
| US4130865A (en) * | 1974-06-05 | 1978-12-19 | Bolt Beranek And Newman Inc. | Multiprocessor computer apparatus employing distributed communications paths and a passive task register |
| US3967246A (en) * | 1974-06-05 | 1976-06-29 | Bell Telephone Laboratories, Incorporated | Digital computer arrangement for communicating data via data buses |
| US4048623A (en) * | 1974-09-25 | 1977-09-13 | Data General Corporation | Data processing system |
| US4001783A (en) * | 1975-03-26 | 1977-01-04 | Honeywell Information Systems, Inc. | Priority interrupt mechanism |
| US4028664A (en) * | 1975-03-26 | 1977-06-07 | Honeywell Information Systems, Inc. | Apparatus for dispatching data of the highest priority process having the highest priority channel to a processor |
| US4006466A (en) * | 1975-03-26 | 1977-02-01 | Honeywell Information Systems, Inc. | Programmable interface apparatus and method |
| CH608902A5 (enExample) * | 1975-04-21 | 1979-01-31 | Siemens Ag | |
| DE2517565C3 (de) * | 1975-04-21 | 1978-10-26 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Schaltungsanordnung für ein Datenverarbeitungssystem |
| US4400771A (en) * | 1975-12-04 | 1983-08-23 | Tokyo Shibaura Electric Co., Ltd. | Multi-processor system with programmable memory-access priority control |
| US4344134A (en) * | 1980-06-30 | 1982-08-10 | Burroughs Corporation | Partitionable parallel processor |
| US4420806A (en) * | 1981-01-15 | 1983-12-13 | Harris Corporation | Interrupt coupling and monitoring system |
| US4703419A (en) * | 1982-11-26 | 1987-10-27 | Zenith Electronics Corporation | Switchcover means and method for dual mode microprocessor system |
| US4782462A (en) * | 1985-12-30 | 1988-11-01 | Signetics Corporation | Raster scan video controller with programmable prioritized sharing of display memory between update and display processes and programmable memory access termination |
| JPH01126751A (ja) * | 1987-11-11 | 1989-05-18 | Fujitsu Ltd | グルーピング装置 |
| US5161228A (en) * | 1988-03-02 | 1992-11-03 | Ricoh Company, Ltd. | System with selectively exclusionary enablement for plural indirect address type interrupt control circuit |
| US5197130A (en) * | 1989-12-29 | 1993-03-23 | Supercomputer Systems Limited Partnership | Cluster architecture for a highly parallel scalar/vector multiprocessor system |
| US5239629A (en) * | 1989-12-29 | 1993-08-24 | Supercomputer Systems Limited Partnership | Dedicated centralized signaling mechanism for selectively signaling devices in a multiprocessor system |
| KR940001878B1 (ko) * | 1990-03-08 | 1994-03-10 | 가부시끼가이샤 히다찌세이사꾸쇼 | 멀티 프로세서시스템 및 인터럽션 제어장치 |
| US5551033A (en) * | 1991-05-17 | 1996-08-27 | Zenith Data Systems Corporation | Apparatus for maintaining one interrupt mask register in conformity with another in a manner invisible to an executing program |
| US5652890A (en) * | 1991-05-17 | 1997-07-29 | Vantus Technologies, Inc. | Interrupt for a protected mode microprocessor which facilitates transparent entry to and exit from suspend mode |
| DE59206826D1 (de) * | 1992-09-28 | 1996-08-29 | Siemens Ag | Prozesssteuerungssystem |
| US5493655A (en) * | 1993-02-20 | 1996-02-20 | Acer Incorporated | Method and apparatus for upgrading a data processing system from a single processor system to a multiprocessor system |
| EP0647891B1 (de) * | 1993-10-11 | 1998-04-29 | Siemens Aktiengesellschaft | Verarbeitungsmodul für ein modulares Automatisierungssystem |
| JP3676882B2 (ja) | 1996-06-12 | 2005-07-27 | 株式会社リコー | マイクロプロセッサ及びその周辺装置 |
| US6430643B1 (en) * | 1999-09-02 | 2002-08-06 | International Business Machines Corporation | Method and system for assigning interrupts among multiple interrupt presentation controllers |
| US6574693B1 (en) * | 1999-10-11 | 2003-06-03 | Ati International Srl | Method and apparatus for gating interrupts in a computing system |
| US6823414B2 (en) * | 2002-03-01 | 2004-11-23 | Intel Corporation | Interrupt disabling apparatus, system, and method |
| US7487503B2 (en) * | 2004-08-12 | 2009-02-03 | International Business Machines Corporation | Scheduling threads in a multiprocessor computer |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3374465A (en) * | 1965-03-19 | 1968-03-19 | Hughes Aircraft Co | Multiprocessor system having floating executive control |
| US3479649A (en) * | 1966-07-22 | 1969-11-18 | Gen Electric | Data processing system including means for masking program interrupt requests |
| US3421150A (en) * | 1966-08-26 | 1969-01-07 | Sperry Rand Corp | Multiprocessor interrupt directory |
| US3500329A (en) * | 1966-10-06 | 1970-03-10 | Gen Electric | Data processing system |
| US3540000A (en) * | 1967-11-02 | 1970-11-10 | Ibm | Criss-cross sorting method and means |
| US3560935A (en) * | 1968-03-15 | 1971-02-02 | Burroughs Corp | Interrupt apparatus for a modular data processing system |
| US3523283A (en) * | 1969-05-07 | 1970-08-04 | Gen Electric | Data processing system including means for interrupting a program being executed |
-
1970
- 1970-12-30 US US102771A patent/US3676861A/en not_active Expired - Lifetime
-
1971
- 1971-08-12 CA CA120,430A patent/CA948784A/en not_active Expired
- 1971-10-11 GB GB4731971A patent/GB1357576A/en not_active Expired
- 1971-11-24 IT IT31567/71A patent/IT941293B/it active
- 1971-12-27 JP JP46105599A patent/JPS5852B1/ja active Granted
- 1971-12-29 FR FR7147424A patent/FR2121114A5/fr not_active Expired
- 1971-12-30 DE DE19712165767 patent/DE2165767A1/de not_active Withdrawn
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5696976A (en) * | 1990-12-21 | 1997-12-09 | Intel Corporation | Protocol for interrupt bus arbitration in a multi-processor system |
| US5701496A (en) * | 1990-12-21 | 1997-12-23 | Intel Corporation | Multi-processor computer system with interrupt controllers providing remote reading |
| GB2277388A (en) * | 1993-04-19 | 1994-10-26 | Intel Corp | Programmable multi-processor interrupt controller system with a processor integrated local interrupt controller |
| GB2277388B (en) * | 1993-04-19 | 1997-08-13 | Intel Corp | Programmable multi-processor interrupt controller system with a processor integrated local interrupt controller |
| US5619705A (en) * | 1993-12-16 | 1997-04-08 | Intel Corporation | System and method for cascading multiple programmable interrupt controllers utilizing separate bus for broadcasting interrupt request data packet in a multi-processor system |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5852B1 (enExample) | 1983-01-05 |
| IT941293B (it) | 1973-03-01 |
| CA948784A (en) | 1974-06-04 |
| AU3417771A (en) | 1973-04-12 |
| DE2165767A1 (de) | 1972-08-31 |
| US3676861A (en) | 1972-07-11 |
| FR2121114A5 (enExample) | 1972-08-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| GB1357576A (en) | Digital data processing systems | |
| GB1063141A (en) | Automatic interrupt system for a data processor | |
| US3560934A (en) | Arrangement for effecting vector mode operation in multiprocessing systems | |
| CA1081857A (en) | Apparatus for processing interrupts in microprocessing systems | |
| EP0535821B1 (en) | Method and apparatus for dynamically steering undirected interrupts | |
| US3573855A (en) | Computer memory protection | |
| US3833888A (en) | General purpose digital processor for terminal devices | |
| US3984820A (en) | Apparatus for changing the interrupt level of a process executing in a data processing system | |
| US4020471A (en) | Interrupt scan and processing system for a data processing system | |
| GB1343454A (en) | Multiprogramming data processing apparatus and equipment for use therein | |
| CA1099820A (en) | Interval timer for use in an input/output system | |
| GB1352577A (en) | Multi-processor processing system having inter-processor interrupt transfer apparatus | |
| GB1347423A (en) | Input/output control system | |
| US5291605A (en) | Arrangement and a method for handling interrupt requests in a data processing system in a virtual machine mode | |
| ATE88821T1 (de) | Unterbrechungsabwicklung in einem multiprozessorrechnersystem. | |
| US3895353A (en) | Data processing systems | |
| GB1435047A (en) | Interrupt control system for a computer | |
| GB1373828A (en) | Data processing systems | |
| US3829839A (en) | Priority interrupt system | |
| US4152763A (en) | Control system for central processing unit with plural execution units | |
| US3360780A (en) | Data processor utilizing combined order instructions | |
| GB1521449A (en) | Digital data processing apparatus | |
| FR2170659A5 (enExample) | ||
| US3479649A (en) | Data processing system including means for masking program interrupt requests | |
| US3611312A (en) | Method and apparatus for establishing states in a data-processing system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed [section 19, patents act 1949] | ||
| PCNP | Patent ceased through non-payment of renewal fee |