GB1354717A - Flip-flop arrangements - Google Patents

Flip-flop arrangements

Info

Publication number
GB1354717A
GB1354717A GB4667871A GB4667871A GB1354717A GB 1354717 A GB1354717 A GB 1354717A GB 4667871 A GB4667871 A GB 4667871A GB 4667871 A GB4667871 A GB 4667871A GB 1354717 A GB1354717 A GB 1354717A
Authority
GB
United Kingdom
Prior art keywords
gate
register
bit
low
enable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4667871A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of GB1354717A publication Critical patent/GB1354717A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4022Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Shift Register Type Memory (AREA)
  • Logic Circuits (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
GB4667871A 1970-10-12 1971-10-07 Flip-flop arrangements Expired GB1354717A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US7997670A 1970-10-12 1970-10-12

Publications (1)

Publication Number Publication Date
GB1354717A true GB1354717A (en) 1974-06-05

Family

ID=22154007

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4667871A Expired GB1354717A (en) 1970-10-12 1971-10-07 Flip-flop arrangements

Country Status (13)

Country Link
US (1) US3716728A (enExample)
AU (1) AU432586B2 (enExample)
BE (1) BE773669A (enExample)
CA (1) CA932407A (enExample)
CH (1) CH537620A (enExample)
DE (1) DE2150011C3 (enExample)
ES (1) ES396205A1 (enExample)
FR (1) FR2111237A5 (enExample)
GB (1) GB1354717A (enExample)
IE (1) IE35717B1 (enExample)
IT (1) IT939983B (enExample)
NL (1) NL7113930A (enExample)
SE (1) SE365627B (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2558114C3 (de) * 1975-12-23 1980-10-02 Robert Bosch Gmbh, 7000 Stuttgart Schaltungsanordnung für Brennkraftmaschinen zur Gewinnung eines ungestörten Rechteck-Steuersignales, insbesondere für die Verwendung in einer elektrisch gesteuerten Benzin-Einspritzanlage
US4398103A (en) * 1981-06-19 1983-08-09 Motorola, Inc. Enabling circuitry for logic circuits

Also Published As

Publication number Publication date
ES396205A1 (es) 1975-03-16
BE773669A (fr) 1972-01-31
IE35717B1 (en) 1976-04-28
DE2150011A1 (de) 1972-04-13
DE2150011C3 (de) 1974-06-27
IT939983B (it) 1973-02-10
US3716728A (en) 1973-02-13
DE2150011B2 (de) 1973-11-29
FR2111237A5 (enExample) 1972-06-02
NL7113930A (enExample) 1972-04-14
CA932407A (en) 1973-08-21
AU432586B2 (en) 1973-03-01
AU3388971A (en) 1973-03-01
CH537620A (de) 1973-05-31
SE365627B (enExample) 1974-03-25
IE35717L (en) 1972-04-12

Similar Documents

Publication Publication Date Title
GB1513096A (en) Ultra high sensitivity sense amplifier
GB1083879A (en) Improvements in fluid control system
GB957203A (en) Transistor signal storage and transfer circuits
GB1283623A (en) Logical circuit building block
GB1334508A (en) Polarity hold latch
GB1452306A (en) Asynchronous multi-stable state circuit
GB1302952A (enExample)
GB1354717A (en) Flip-flop arrangements
GB1295525A (enExample)
GB1240110A (en) Improvements in or relating to switching circuits
GB1281029A (en) Binary signal sensing circuit
GB1426191A (en) Digital circuits
GB1324793A (en) Logic gates
GB1101660A (en) A bistable circuit
GB1413923A (en) Automatic selector for a peripheral unit capable of selectively exchanging data with one or other of two computers
GB959390A (en) Data latching circuits
GB1434771A (en) Logical circuits
GB1259237A (enExample)
GB1196763A (en) High Speed Memory Logic Network.
GB932502A (en) Number comparing systems
GB1289251A (enExample)
GB1135268A (en) Improvements in or relating to bistable devices
ES403566A1 (es) Memoria de apilamiento con indicacion de desbordamiento pa-ra transmision de datos en forma binaria en el orden crono- logico de su entrada.
GB1495372A (en) Bistable multivibrator circuit
GB1197977A (en) Circuit Arrangement for Transferring the Contents of One Register to another Register

Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee