GB1341969A - Electrical signal waveform generators - Google Patents

Abstract

1341969 Control of stepping motors FERRANTI Ltd 25 Feb 1972 [8 Dec 1970] 58135/70 Heading H2J [Also in Divisions G4 and H3] A frequency divider produces rectangular pulses and a counter is used to form the pulse edges into staircase form so as to reduce the slope. The pulses so produced are suitable for operating a stepping motor. In Fig. 3 the original pulses are applied at 11 and pulses of equal mark and space ratio from a divider (not shown) are applied at 15. The first four pulses at 11 step a counter 13 and by digital to analogue conversion produce a four tread staircase at output 17. At this point an output appears at 2<SP>2</SP> and this inhibits an AND gate 41 so that no more pulses reach the counter and the output remains steady. When the output at 15 of the divider switches to its low value, gate 41 is held closed and gate 42 opened whereby the input pulses are applied to the subtract input of the counter. After four downward steps have been produced the counter output is such that gate 43 closes gate 42 and the counter output is held at the new value until the divider output again reverses. Fig. 4 (not shown) illustrates a modification of the logic for use with counters having a single input and a separate add and subtract control and Fig. 5 (not shown) illustrates a modification using NAND gates. The mark and space durations of the pulse output from the divider may be unequal and a different number of steps may be provided by selecting a different combination of signals from the divider to operate the gates. The circuit may be used to operate a five phase stepping motor, the phasing being arranged so that the end of the staircase of one pulse coincides with the commencement of an oppositely going staircase of a pulse of a different phase. Five circuits as described may be used, the different dividers being initially partly filled to provide different phasing. Alternatively (Fig. 7, not shown), to avoid phase slip, a single divider and decoder can be used to produce the pulses for the five phases in which case only the logic and counter circuits need be repeated. A suitable connection diagram for the decoder is given in Fig. 8 (not shown).