GB1337275A - Integrating amplifier circuits - Google Patents

Integrating amplifier circuits

Info

Publication number
GB1337275A
GB1337275A GB1337275DA GB1337275A GB 1337275 A GB1337275 A GB 1337275A GB 1337275D A GB1337275D A GB 1337275DA GB 1337275 A GB1337275 A GB 1337275A
Authority
GB
United Kingdom
Prior art keywords
output
input
periods
during
integrator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taylor Servomex Ltd
Original Assignee
Taylor Servomex Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taylor Servomex Ltd filed Critical Taylor Servomex Ltd
Publication of GB1337275A publication Critical patent/GB1337275A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06GANALOGUE COMPUTERS
    • G06G7/00Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12Arrangements for performing computing operations, e.g. operational amplifiers
    • G06G7/18Arrangements for performing computing operations, e.g. operational amplifiers for integration or differentiation; for forming integrals
    • G06G7/184Arrangements for performing computing operations, e.g. operational amplifiers for integration or differentiation; for forming integrals using capacitive elements
    • G06G7/186Arrangements for performing computing operations, e.g. operational amplifiers for integration or differentiation; for forming integrals using capacitive elements using an operational amplifier comprising a capacitor or a resistor in the feedback loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/70Charge amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K4/00Generating pulses having essentially a finite slope or stepped portions
    • H03K4/06Generating pulses having essentially a finite slope or stepped portions having triangular shape
    • H03K4/08Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape
    • H03K4/48Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices
    • H03K4/50Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices in which a sawtooth voltage is produced across a capacitor
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K4/00Generating pulses having essentially a finite slope or stepped portions
    • H03K4/06Generating pulses having essentially a finite slope or stepped portions having triangular shape
    • H03K4/08Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape
    • H03K4/48Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices
    • H03K4/50Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices in which a sawtooth voltage is produced across a capacitor
    • H03K4/501Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices in which a sawtooth voltage is produced across a capacitor the starting point of the flyback period being determined by the amplitude of the voltage across the capacitor, e.g. by a comparator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K7/00Modulating pulses with a continuously-variable modulating signal
    • H03K7/08Duration or width modulation ; Duty cycle modulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Amplifiers (AREA)
  • Indication And Recording Devices For Special Purposes And Tariff Metering Devices (AREA)

Abstract

1337275 Integrating amplifiers TAYLOR SERVOMEX Ltd and A J BORER 4 June 1971 [5 June 1970] 27283/70 Heading G4G An integrating amplifier A3, Fig. 1, is fed from a pulse-width modulating circuit A1, A2 through a switch S which is open during the space periods of the modulated signal. Integration proceeds only during the mark periods of the modulated signal. During the space periods, the input of the integrator floats in potential and balances itself with zero output increment thereby eliminating the effect of offset during these periods. If the average mark/space ratio is made very small, the error in the output signal due to offset may be made correspondingly small. The ramp generator of Fig. 3 has three inputs 1, 1<SP>1</SP>, 1<SP>11</SP> to which signals representative of temperature in three ranges may be applied. The output of amplifier A1 is connected to triggers VT1, VT2 which control current sources VT3, VT4. When turned on, the latter feed respectively a current of the order of milliamps to the input of A1 and a signal of the order of microamps to the input of integrator A3 through the field-effect transistor VT5. When VT4 is turned off, the diode VR3 is reversed biased whereby the input to the integrator floats in potential as required. The circuit is linearized by means of feedback from the output 2 through network R28, R22, R29. To set up the circuit R8 is adjusted such that the output of A1 is constant in the absence of any input, and R17 is adjusted for a suitable ratio between the collector currents of VT3, VT4 such that the rate of change of output at terminal 2 is correctly related to the inputs at terminls 1, 1<SP>1</SP>, 1<SP>11</SP>.
GB1337275D 1970-06-05 1970-06-05 Integrating amplifier circuits Expired GB1337275A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB2728370 1970-06-05
DE19712166875 DE2166875A1 (en) 1970-06-05 1971-06-05 CURRENT MEASURING CIRCUIT

Publications (1)

Publication Number Publication Date
GB1337275A true GB1337275A (en) 1973-11-14

Family

ID=25762301

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1337275D Expired GB1337275A (en) 1970-06-05 1970-06-05 Integrating amplifier circuits

Country Status (2)

Country Link
DE (2) DE2166875A1 (en)
GB (1) GB1337275A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002075923A2 (en) * 2001-03-20 2002-09-26 Honeywell International Inc. Circuit for voltage to linear duty cycle conversion

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3226168C2 (en) * 1982-07-13 1984-10-04 Siemens AG, 1000 Berlin und 8000 München Device for the integration of alternating voltages

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002075923A2 (en) * 2001-03-20 2002-09-26 Honeywell International Inc. Circuit for voltage to linear duty cycle conversion
WO2002075923A3 (en) * 2001-03-20 2003-02-27 Honeywell Int Inc Circuit for voltage to linear duty cycle conversion

Also Published As

Publication number Publication date
DE2128063A1 (en) 1971-12-09
DE2166875A1 (en) 1976-05-20

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees