GB1314449A - Electric signal converter - Google Patents

Abstract

1314449 Stochastic converters; random numbers SOC GENERALE DE CONSTRUCTIONS ELECTRIQUES ET MECANIQUES ALSTHOM 2 June 1970 [2 June 1969 2 Dec 1969 18 Dec 1969 20 Jan 1970 13 Feb 1970 9 March 1970] 26660/70 Headings G4D and G4H [Also in Division H4] In an analogue to digital or digital to analogue converter an intermediate step is made to a stochastic representation of the input signal which is then converted to the output signal. In one arrangement of an analogue to digital converter (Fig. 15) a counter 57 generates an output digital signal on parallel lines 49 which is converted to a stochastic representation 22 by comparison at 19 with a quasi-random noise signal 20. A band-pass filter 23 converts the stochastic signal to an analogue signal which is compared (53-54) with the input analogue signal to drive the counter 57 up or down. The frequency of clock pulses driving the counter 57 is made dependent upon the size of the error signal from comparator 54 (Figs. 19 and 20, not shown). The time constant of the band-pass filter 23 is made dependent upon the size of the output analogue signal 24 (Figs. 24-26, not shown). In another arrangement of an analogue to digital converter (Fig. 3, not shown) the input analogue signal is converted to a stochastic representation which drives a two-way counter in one direction. The digital output of the counter is converted to a stochastic representation to drive the counter in the opposite direction so that the output of the counter is the digital representation of the input analogue signal. In an arrangement of a digital to analogue converter (Fig. 4) an input digital signal on parallel leads 18 is compared at 19 with the signal 20 of a quasi-random noise generator 21 consisting of a clock-driven shift register 25 having feed-back via an exclusive OR-gate 26. The stochastic digital signal 29 is shaped by trigger stages 28 and 30 and converted to the output analogue signal by band-pass filter 23. Instead of a comparator 19 the input signal may be presented in complement form and a halfadder used (Figs. 7-12, not shown).