GB1288728A - - Google Patents

Info

Publication number
GB1288728A
GB1288728A GB1288728DA GB1288728A GB 1288728 A GB1288728 A GB 1288728A GB 1288728D A GB1288728D A GB 1288728DA GB 1288728 A GB1288728 A GB 1288728A
Authority
GB
United Kingdom
Prior art keywords
address
register
store
word
words
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
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English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1288728A publication Critical patent/GB1288728A/en
Expired legal-status Critical Current

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615Address space extension
    • G06F12/0623Address space extension for memory modules
GB1288728D 1970-04-16 1971-04-19 Expired GB1288728A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US2922670A 1970-04-16 1970-04-16

Publications (1)

Publication Number Publication Date
GB1288728A true GB1288728A (ja) 1972-09-13

Family

ID=21847926

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1288728D Expired GB1288728A (ja) 1970-04-16 1971-04-19

Country Status (6)

Country Link
US (1) US3651475A (ja)
JP (1) JPS543335B1 (ja)
CA (1) CA934065A (ja)
DE (1) DE2117581C3 (ja)
FR (1) FR2092531A5 (ja)
GB (1) GB1288728A (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4025903A (en) 1973-09-10 1977-05-24 Computer Automation, Inc. Automatic modular memory address allocation system
USRE31318E (en) 1973-09-10 1983-07-19 Computer Automation, Inc. Automatic modular memory address allocation system
US4882700A (en) * 1988-06-08 1989-11-21 Micron Technology, Inc. Switched memory module

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3725868A (en) * 1970-10-19 1973-04-03 Burroughs Corp Small reconfigurable processor for a variety of data processing applications
BE789583A (fr) * 1971-10-01 1973-02-01 Sanders Associates Inc Appareil de controle de programme pour machine de traitement del'information
US3828320A (en) * 1972-12-29 1974-08-06 Burroughs Corp Shared memory addressor
US3914747A (en) * 1974-02-26 1975-10-21 Periphonics Corp Memory having non-fixed relationships between addresses and storage locations
US3984812A (en) * 1974-04-15 1976-10-05 Burroughs Corporation Computer memory read delay
DE3036926C2 (de) * 1980-09-30 1984-07-26 Siemens AG, 1000 Berlin und 8000 München Verfahren und Anordnung zur Steuerung des Arbeitsablaufes in Datenverarbeitungsanlagen mit Mikroprogrammsteuerung
US4445170A (en) * 1981-03-19 1984-04-24 Zilog, Inc. Computer segmented memory management technique wherein two expandable memory portions are contained within a single segment
DE3609715A1 (de) * 1986-03-21 1987-10-01 Siemens Ag Taktgenerator mit mehreren taktphasen zur erzeugung von gleichstromimpulsen mit extern steuerbaren muttertaktabhaengigen periodenlaengen
JPH05233834A (ja) * 1991-11-13 1993-09-10 Nec Corp シングルチップマイクロコンピュータ
US5568622A (en) * 1993-04-15 1996-10-22 Bull Hn Information Systems Inc. Method and apparatus for minimizing the number of control words in a brom control store of a microprogrammed central processor
US5873126A (en) * 1995-06-12 1999-02-16 International Business Machines Corporation Memory array based data reorganizer
US20060294443A1 (en) * 2005-06-03 2006-12-28 Khaled Fekih-Romdhane On-chip address generation
US20180181504A1 (en) * 2016-12-23 2018-06-28 Intel Corporation Apparatuses and methods for training one or more signal timing relations of a memory interface

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3340539A (en) * 1964-10-27 1967-09-05 Anelex Corp Stored data protection system
US3377624A (en) * 1966-01-07 1968-04-09 Ibm Memory protection system
US3496551A (en) * 1967-07-13 1970-02-17 Ibm Task selection in a multi-processor computing system
US3533077A (en) * 1967-11-08 1970-10-06 Ibm Address modification

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4025903A (en) 1973-09-10 1977-05-24 Computer Automation, Inc. Automatic modular memory address allocation system
USRE31318E (en) 1973-09-10 1983-07-19 Computer Automation, Inc. Automatic modular memory address allocation system
US4882700A (en) * 1988-06-08 1989-11-21 Micron Technology, Inc. Switched memory module

Also Published As

Publication number Publication date
FR2092531A5 (ja) 1972-01-21
CA934065A (en) 1973-09-18
DE2117581B2 (de) 1978-12-14
JPS543335B1 (ja) 1979-02-21
DE2117581A1 (de) 1971-10-28
DE2117581C3 (de) 1979-08-16
US3651475A (en) 1972-03-21

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee