GB1277988A - Low noise level semiconductor device and method of manufacturing same - Google Patents

Low noise level semiconductor device and method of manufacturing same

Info

Publication number
GB1277988A
GB1277988A GB04771/70A GB1477170A GB1277988A GB 1277988 A GB1277988 A GB 1277988A GB 04771/70 A GB04771/70 A GB 04771/70A GB 1477170 A GB1477170 A GB 1477170A GB 1277988 A GB1277988 A GB 1277988A
Authority
GB
United Kingdom
Prior art keywords
layer
dislocation density
emitter region
nitrogen
ethyl silicate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB04771/70A
Other languages
English (en)
Inventor
Takatoshi Matsuo
Morio Inoue
Yoichi Okabayashi
Seiki Yamao
Hiroshi Ishihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP44024027A external-priority patent/JPS5116311B1/ja
Priority claimed from JP44024028A external-priority patent/JPS5122347B1/ja
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Publication of GB1277988A publication Critical patent/GB1277988A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/834—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/133—Emitter regions of BJTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Bipolar Transistors (AREA)
GB04771/70A 1969-03-28 1970-03-26 Low noise level semiconductor device and method of manufacturing same Expired GB1277988A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP44024027A JPS5116311B1 (enrdf_load_stackoverflow) 1969-03-28 1969-03-28
JP44024028A JPS5122347B1 (enrdf_load_stackoverflow) 1969-03-28 1969-03-28
JP2402969 1969-03-28

Publications (1)

Publication Number Publication Date
GB1277988A true GB1277988A (en) 1972-06-14

Family

ID=27284487

Family Applications (1)

Application Number Title Priority Date Filing Date
GB04771/70A Expired GB1277988A (en) 1969-03-28 1970-03-26 Low noise level semiconductor device and method of manufacturing same

Country Status (3)

Country Link
DE (1) DE2014903B2 (enrdf_load_stackoverflow)
FR (1) FR2037280B1 (enrdf_load_stackoverflow)
GB (1) GB1277988A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0176409A3 (en) * 1984-09-06 1987-05-06 Fairchild Camera & Instrument Corporation Cmos circuit having a reduced tendency to latch
US4728998A (en) * 1984-09-06 1988-03-01 Fairchild Semiconductor Corporation CMOS circuit having a reduced tendency to latch

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2189876A1 (en) * 1972-06-23 1974-01-25 Anvar Radiation resistant silicon wafers - and solar cells made therefrom for use in space
GB2049643B (en) * 1979-05-30 1983-07-20 Siemens Ag Process for the production of silicon having semiconducting proprties

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3346428A (en) * 1964-02-27 1967-10-10 Matsushita Electronics Corp Method of making semiconductor devices by double diffusion

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0176409A3 (en) * 1984-09-06 1987-05-06 Fairchild Camera & Instrument Corporation Cmos circuit having a reduced tendency to latch
US4728998A (en) * 1984-09-06 1988-03-01 Fairchild Semiconductor Corporation CMOS circuit having a reduced tendency to latch

Also Published As

Publication number Publication date
DE2014903B2 (de) 1973-06-28
FR2037280B1 (enrdf_load_stackoverflow) 1974-10-11
DE2014903A1 (de) 1970-10-01
FR2037280A1 (enrdf_load_stackoverflow) 1970-12-31

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
746 Register noted 'licences of right' (sect. 46/1977)
PE20 Patent expired after termination of 20 years